CN207938610U - The integrated chip of microfluidic chromatography column and micro- thermal conductivity detector (TCD) based on SOI - Google Patents
The integrated chip of microfluidic chromatography column and micro- thermal conductivity detector (TCD) based on SOI Download PDFInfo
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- CN207938610U CN207938610U CN201721815749.7U CN201721815749U CN207938610U CN 207938610 U CN207938610 U CN 207938610U CN 201721815749 U CN201721815749 U CN 201721815749U CN 207938610 U CN207938610 U CN 207938610U
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- 238000004587 chromatography analysis Methods 0.000 title claims abstract description 48
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 94
- 239000010703 silicon Substances 0.000 claims abstract description 94
- 239000000758 substrate Substances 0.000 claims abstract description 80
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 14
- 239000001301 oxygen Substances 0.000 claims abstract description 14
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 14
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 87
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 31
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 25
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 25
- 238000003475 lamination Methods 0.000 claims description 20
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 19
- 238000010276 construction Methods 0.000 claims description 16
- 239000011521 glass Substances 0.000 claims description 12
- 239000006059 cover glass Substances 0.000 claims description 9
- 239000002184 metal Substances 0.000 claims description 7
- 239000000203 mixture Substances 0.000 claims description 7
- 238000005452 bending Methods 0.000 claims description 6
- 238000000034 method Methods 0.000 abstract description 20
- 230000035945 sensitivity Effects 0.000 abstract description 4
- 238000002360 preparation method Methods 0.000 description 10
- 239000007789 gas Substances 0.000 description 8
- 230000008569 process Effects 0.000 description 7
- 238000000992 sputter etching Methods 0.000 description 7
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 6
- 230000008859 change Effects 0.000 description 6
- 230000005611 electricity Effects 0.000 description 6
- 239000000377 silicon dioxide Substances 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 5
- 238000005530 etching Methods 0.000 description 5
- 230000001012 protector Effects 0.000 description 4
- 230000003068 static effect Effects 0.000 description 4
- 229910003978 SiClx Inorganic materials 0.000 description 3
- 238000001514 detection method Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 229910052757 nitrogen Inorganic materials 0.000 description 3
- 238000001020 plasma etching Methods 0.000 description 3
- 238000000926 separation method Methods 0.000 description 3
- 230000007812 deficiency Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 208000030208 low-grade fever Diseases 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- 230000004075 alteration Effects 0.000 description 1
- 230000003026 anti-oxygenic effect Effects 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 238000004817 gas chromatography Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 230000002035 prolonged effect Effects 0.000 description 1
- -1 thermistor 51 Chemical compound 0.000 description 1
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Abstract
The utility model provides the integrated chip of a kind of microfluidic chromatography column based on SOI and micro- thermal conductivity detector (TCD), including：Soi wafer has substrate silicon, oxygen buried layer and top layer silicon；Graphical stacked structure, including cross network structure, there is release groove, graphical stacked structure are hung below in release groove；Lid substrate, is bonded to top layer silicon, and there is lid substrate very low power, graphical stacked structure to be located in very low power；Micro- raceway groove of microfluidic chromatography column, is formed in substrate silicon, and there is micro-pillar array, micro- raceway groove to be connected to release groove in micro- raceway groove；Bottom substrate is bonded to substrate silicon, to form the microchannel comprising very low power, release groove and micro- raceway groove.Micro- thermal conductivity detector (TCD) and microfluidic chromatography column of the utility model are located in the top layer silicon and substrate silicon of soi wafer, increase the controllability of the flexibility and technique making of design.The utility model is not necessarily to additional connecting component, has many advantages, such as that dead volume is low, high sensitivity.
Description
Technical field
The utility model belongs to microelectromechanical systems field, more particularly to a kind of microfluidic chromatography column based on SOI and micro-
The integrated chip and preparation method of thermal conductivity detector (TCD).
Background technology
Gas chromatograph is a kind of important analytical instrument, using very extensive.Traditional gas chromatograph is due to body
Product is big, power consumption is high, weight weight, can only generally be used in laboratory.However, in current environment safety, production safety, food peace
Entirely, public safety monitoring etc. needs to carry out real-time, scene, quickly detection to complicated gas composition, is badly in need of researching and developing a kind of micro-
Type gas chromatograph.Chromatographic column and thermal conductivity detector (TCD) are two critical components of gas chromatograph, domestic and international correlative study group
MEMS technology is generally used, by chromatographic column, thermal conductivity detector (TCD) chip, the final micromation for realizing gas chromatograph.
The connection of chromatographic column chip and thermal conductivity detector (TCD) chip can bring new dead volume, this is unfavorable for improving miniature gas phase
The separation detection performance of chromatography.In order to further increase separation, detection performance, researcher attempts to lead on microfluidic chromatography column and low-grade fever
Detector is integrated on same chip, and microfluidic chromatography column and micro- thermal conductivity detector (TCD) (Bradley are prepared in the same surface design of silicon
C Kaanta,Hua Chen and Xin Zhang,A monolithically fabricated gas
chromatography separation column with an integrated high sensitivity thermal
conductivity detector,J.Micromech.Microeng.20(2010)055016(6pp)).However in silicon substrate
Same surface when preparing the integrated chip of microfluidic chromatography column and micro- thermal conductivity detector (TCD), due to take into account micro- thermal conductivity detector (TCD) temperature-sensitive electricity
The release of resistance will also use the silicon below isotropic etch method removal thermistor after the completion of deep etching, at this moment hot
Micro- raceway groove, micro- raceway groove of chromatographic column and the micro-pillar array in micro- raceway groove will also be corroded simultaneously where quick resistance, that is to say, that nothing
Method accurately controls the geometric dimension of device, and the controllability of technique is poor, and the integrated chip dead volume made is big, reduces device
Part performance.
Based on the above, provide it is a kind of can with the integrated chip of effective integration gas chromatographic column and micro- thermal conductivity detector (TCD) and
Preparation method is necessary.
Utility model content
In view of the foregoing deficiencies of prior art, the purpose of this utility model is to provide a kind of micro- color based on SOI
The integrated chip and preparation method for composing column and micro- thermal conductivity detector (TCD), for solving microfluidic chromatography column and micro- Thermal Conductivity in the prior art
Integrated more difficult or device performance deficiency the problem of device.
To achieve the above object and his related purpose, the utility model provide a kind of microfluidic chromatography column and low-grade fever based on SOI
The integrated chip of detector is led, including：Soi wafer has substrate silicon, oxygen buried layer and top layer silicon；Including top layer silicon-the first is situated between
The graphical stacked structure that matter film-thermistor-second medium film is formed, the graphical stacked structure include crossing net
There is the substrate silicon and the oxygen buried layer to be patterned the release groove to be formed for shape structure, the graphical stacked structure lower section,
The graphical stacked structure is hung in the release groove；Lid substrate, is bonded to the top layer silicon, and the lid substrate has micro-
Groove, the graphical stacked structure are located in the very low power；Micro- raceway groove of microfluidic chromatography column, is formed in the substrate silicon,
There is micro-pillar array, micro- raceway groove to be connected to the release groove in micro- raceway groove；And bottom substrate, it is bonded to the SOI
The substrate silicon of silicon chip, to form the microchannel comprising the very low power, the release groove and micro- raceway groove.
Preferably, it is also formed with pad recess in the top layer silicon of the soi wafer, pad is formed in the pad recess
Structure, the pad structure are electrical connected with the thermistor.
Preferably, there are the cross network structure multiple extensions, each extension to be connect with the soi wafer, with branch
Support the cross network structure.
Preferably, the thermistor be serrated along the cross network structure extend, and with the pad structure phase
Connection.
Preferably, metal used by the thermistor includes Pt/Ti laminations, Ni/Cr laminations, W/Ti laminations and W/Re
One kind in lamination.
Preferably, the first medium film and second medium film include one kind of silicon oxide film and silicon nitride film
Or the laminated construction of two kinds of compositions.
Preferably, the first medium film and second medium film be silicon oxide film and silicon nitride film form it is folded
Layer structure, the first medium film are silicon oxide film and silicon nitride film laminated construction, the second medium from bottom to top
Film is silicon nitride film and silicon oxide film laminated construction from bottom to top.
Preferably, the first medium film and second medium film are to wrap up the thermistor or the clamping temperature-sensitive
Resistance.
Preferably, the graphical stacked structure hangs on the middle section of the release groove.
Preferably, the lid substrate includes cover glass, and the bottom substrate includes glass negative, the cover glass and institute
The bonding for stating the top layer silicon of soi wafer includes electrostatic bonding, and the glass negative is bonded packet with the substrate silicon of the soi wafer
Containing electrostatic bonding.
Preferably, micro- raceway groove extends shape in round-trip bending and is formed in the substrate silicon, and the release groove is connected to
The both ends of micro- raceway groove, the arrival end as the microchannel and outlet end.
Preferably, the arrival end of the microchannel and outlet end are formed simultaneously with the top layer silicon-first medium film-heat
The graphical stacked structure of quick resistance-second medium film.
The utility model also provides a kind of preparation side of the integrated chip of microfluidic chromatography column based on SOI and micro- thermal conductivity detector (TCD)
Method, the preparation method include step：Step 1) provides a soi wafer, in forming pad in the top layer silicon of the soi wafer
Groove, the top layer silicon face in the soi wafer and the pad recess bottom deposit first medium film；Step 2), in institute
It states deposited metal on first medium film and graphically forms thermistor, while forming pad knot in the pad recess
Structure, the pad structure are electrical connected with the thermistor；Step 3), in the first medium layer film and temperature-sensitive electricity
Second medium film is deposited in resistance, it is Film patterning to the first medium film and second medium, and etch the soi wafer
Top layer silicon, formed and include the graphical stacked structure of top layer silicon-first medium film-thermistor-second medium film, institute
It includes cross network structure to state graphical stacked structure, while exposing the top layer silicon of the pad structure and the soi wafer
Bond area；Step 4) provides a lid substrate with very low power, is bonded the top layer of the lid substrate and the soi wafer
Silicon, the graphical stacked structure are located in the very low power；Step 5) etches the substrate silicon of the soi wafer in described
The micro- raceway groove for forming microfluidic chromatography column in substrate silicon and the micro-pillar array in micro- raceway groove, while by etching the substrate
The oxygen buried layer of silicon and the soi wafer is to form the release groove of the graphical stacked structure, the release groove and micro- ditch
Road is connected to；And step 6), a bottom substrate is provided, and the bottom substrate is bonded to the substrate silicon of the soi wafer, to be formed
Include the microchannel of the very low power, the release groove and micro- raceway groove.
Preferably, in step 2), the metal includes in Pt/Ti laminations, Ni/Cr laminations, W/Ti laminations and W/Re laminations
One kind.
Preferably, there are multiple extensions, each extension is in the top layer silicon-first medium in the cross network structure
After the graphical stacked structure release of film-thermistor-second medium film, it is connect with the soi wafer, described in support
Cross network structure.
Preferably, the thermistor be serrated along the cross network structure extend, and with the pad structure phase
Connection.
Preferably, the first medium film and second medium film include one kind of silicon oxide film and silicon nitride film
Or the laminated construction of two kinds of compositions.
Preferably, the first medium film and second medium film wrap up the thermistor or the clamping temperature-sensitive electricity
Resistance.
Preferably, in step 4), the region that the lid substrate corresponds to the pad structure has a protector, the guarantor
Protecting groove is with to avoid being bonded between the pad structure and the lid substrate.
Preferably, the graphical stacked structure hangs on the middle section of the release groove.
Preferably, in step 5), using deep reaction ion etching technique from the substrate silicon of soi wafer described in back-etching,
To form micro- raceway groove, the micro-pillar array in micro- raceway groove and the release groove of microfluidic chromatography column in the substrate silicon,
The oxygen buried layer is etched using reactive ion etching process, to release the graphical stacked structure.
Preferably, the lid substrate includes cover glass, and the bottom substrate includes glass negative, the glass in step 4)
The bonding technology of glass cover plate and the top layer silicon of the soi wafer includes static bonding process, the glass negative in step 6)
Bonding technology with the substrate silicon of the soi wafer includes static bonding process.
Preferably, micro- raceway groove extends shape in round-trip bending and is formed in the substrate silicon, and the release groove is connected to
The both ends of micro- raceway groove, the arrival end as the microchannel and outlet end.
Preferably, the arrival end of the microchannel and outlet end are formed simultaneously with the top layer silicon-first medium film-heat
The graphical stacked structure of quick resistance-second medium film.
As described above, integrated chip and the preparation of the microfluidic chromatography column and micro- thermal conductivity detector (TCD) based on SOI of the utility model
Method has the advantages that：
Micro- thermal conductivity detector (TCD) and microfluidic chromatography column of the utility model are located in the top layer silicon and substrate silicon of soi wafer,
Increase the controllability of the flexibility and technique making of design.
In the microfluidic chromatography column of the utility model and the integrated chip of micro- thermal conductivity detector (TCD), micro- raceway groove of micro- thermal conductivity detector (TCD)
It is obtained by deep reaction ion etching, size is accurately controllable, can get lower dead volume；Microfluidic chromatography column is also by deep reaction
Ion etching obtains, and size is accurately controllable.
The utility model is integrated on the same chip by microfluidic chromatography column and micro- thermal conductivity detector (TCD), is not necessarily to additional interconnecting piece
Part, this integrated chip have many advantages, such as that dead volume is low, high sensitivity.
Description of the drawings
Fig. 1 is shown as the schematic diagram of the graphical stacked structure in micro- thermal conductivity detector (TCD) of the utility model.
Fig. 2 is shown as the micro- thermal conductivity detector (TCD) of the tool there are four thermistor of the utility model.
Fig. 3 is shown as the Wheatstone bridge that four thermistors of the utility model are constituted.
Fig. 4~Figure 13 is shown as the integrated chip of the microfluidic chromatography column and micro- thermal conductivity detector (TCD) based on SOI of the utility model
The structural schematic diagram that is presented of each step of preparation method.
Component label instructions
1 soi wafer
11 substrate silicons
12 oxygen buried layers
13 top layer silicons
14 release grooves
15 graphical stacked structures
The micro- raceway grooves of 16a
16 microchannels
161 micro-pillar arrays
162 arrival ends
163 outlet ends
2 mask layers
3 pad recess
41 first medium films
42 second medium films
51 thermistors
52 pad structures
6 lid substrates
61 very low powers
62 protectors
7 bottom substrates
Specific implementation mode
Illustrate that the embodiment of the utility model, those skilled in the art can be by this theorys below by way of specific specific example
Content disclosed by bright book understands other advantages and effect of the utility model easily.The utility model can also be by addition
Different specific implementation modes are embodied or practiced, and the various details in this specification can also be based on different viewpoints and answer
With carrying out various modifications or alterations under the spirit without departing from the utility model.
Please refer to Fig.1~Figure 13.It should be noted that the diagram provided in the present embodiment only illustrates this in a schematic way
The basic conception of utility model, when only display is with related component in the utility model rather than according to actual implementation in illustrating then
Component count, shape and size are drawn, when actual implementation kenel, quantity and the ratio of each component can be a kind of random change
Become, and its assembly layout kenel may also be increasingly complex.
As shown in figure 13, the top layer silicon 13- first medium film 41- thermistor 51- second mediums of the utility model are thin
The graphical stacked structure 15 of film 42 is made in 1 top layer silicon 13 of soi wafer and is suspended in the middle section (figure of release groove 14
The distance for changing stacked structure 15 to 14 two side walls of release groove is equal.As shown in Figure 1, in graphical stacked structure 15, temperature-sensitive electricity
Resistance 51 is protected by two layers of silica/silicon nitride film, is respectively from top to bottom：Silica/silicon nitride, thermistor 51, nitrogen
Change silicon/oxidative silicon, top layer silicon 13, it is notable that in order to more clearly draw 51 structure of thermistor, in Fig. 1 not
Draw the silica/silicon nitride on upper layer.In addition, it is necessary to which explanation is：15 He of graphical stacked structure of other structures can be used
51 structure of thermistor, it is not limited to structure shown in FIG. 1.This new structure design has well solved in the prior art
Three problems：First, upper layer and lower layer silica/silicon nitride film of thermistor 51 not only plays a protective role to it, separately
On the one hand since the symmetrical of structure can also play the role of stress equilibrium, the deformation of cross network structure is reduced；Second,
Cross network structure, the sidewall of release groove 14, device dead volume are discharged using step deep reaction ion etching (DRIE) technique
Product is small；Third, with the main support layer that the top layer silicon 13 of soi wafer 1 is thermistor 51, compared with highly doped silicon, top layer
Lattice is complete in silicon 13, and defect is few, has better mechanical strength as supporting layer, and its thickness can be flexible according to performance requirement
Selection.In addition, compared with prolonged doping, the DRIE process times are shorter.
In general, a micro- thermal conductivity detector (TCD) includes four thermistors 51R1, R2, R3, R4, as shown in Fig. 2, R1,
R2, R3, R4 constitute a Wheatstone bridge according to as shown in Figure 3 being linked in sequence.Top layer of the utility model in soi wafer 1
The graphical stacked structure 15 containing thermistor 51 that micro- thermal conductivity detector (TCD) is designed and produced on silicon 13, in 1 substrate silicon of soi wafer
Microfluidic chromatography column is designed and produced on 11, is typically contained micro-pillar array 161 in micro- raceway groove 16a of microfluidic chromatography, be can be free of micro-pillar array
161.Micro- thermal conductivity detector (TCD) includes four graphical stacked structures 15 (its resistance value is equal or close) containing thermistor 51,
The cross network structure that two of which contains thermistor 51 is located at the arrival end 162 of the microchannel 16 of microfluidic chromatography column, and in addition
Two cross network structures containing thermistor 51 are located at the outlet end 163 of the microchannel 16 of microfluidic chromatography column, as shown in figure 13.
As shown in Fig. 4~Figure 13, the utility model provides the collection of a kind of microfluidic chromatography column based on SOI and micro- thermal conductivity detector (TCD)
At the preparation method of chip, the preparation method includes step：
As shown in Fig. 4~Fig. 6, step 1) is carried out first, a soi wafer 1 is provided, and the soi wafer 1 includes substrate silicon
11, oxygen buried layer 12 and top layer silicon 13 are based on the mask layer 2 in forming mask layer 2 in the top layer silicon 13 of the soi wafer 1
The top layer silicon 13 is etched, pad recess 3 is formed, then in 13 surface of top layer silicon of the soi wafer 1 and the pad recess
3 bottom deposit first medium films 41.
The thickness range of the top layer silicon 13 of the soi wafer 1 is 0.5~200 micron, and the first medium film 41 is under
And upper is silicon oxide film and silicon nitride film laminated construction.
As shown in fig. 6, then carrying out step 2), heat is formed in deposited metal on the first medium film 41 and graphically
Quick resistance 51, while pad structure 52 is formed in the pad recess 3, the pad structure 52 and 51 electricity of the thermistor
Property be connected.
The metal includes one kind in Pt/Ti laminations, Ni/Cr laminations, W/Ti laminations and W/Re laminations.
As shown in fig. 7~fig. 9, step 3) is then carried out, on the first medium layer film and the thermistor 51
Second medium film 42 is deposited, it is graphical to the first medium film 41 and second medium film 42, and etch the SOI silicon
The top layer silicon 13 of piece 1 forms the figure for including top layer silicon 13- first medium film 41- thermistor 51- second mediums film 42
Change stacked structure 15, the graphical stacked structure 15 include cross network structure, while expose the pad structure 52 and
The bond area of the top layer silicon 13 of the soi wafer 1.
The second medium film 42 is silicon nitride film and silicon oxide film laminated construction from bottom to top.
There are multiple extensions, each extension is in the top layer silicon 13- first medium films in the cross network structure
It after the graphical stacked structure 15 of 41- thermistor 51- second mediums film 42 discharges, is connect with the soi wafer 1, with branch
Support the cross network structure.
The thermistor 51 is serrated to be extended along the cross network structure, and is connect with the pad structure 52,
As shown in Fig. 1 and Figure 13.
The first medium film 41 and second medium film 42 are to wrap up the thermistor 51 or the clamping temperature-sensitive
Resistance 51.The first medium film 41 and second medium film 42 may include one kind of silicon oxide film and silicon nitride film
Or the laminated construction of two kinds of compositions.In the present embodiment, the first medium film 41 is silicon oxide film and nitrogen from bottom to top
SiClx pellicular cascade structure, the second medium film 42 are from top to bottom silicon oxide film and silicon nitride film laminated construction,
What is contacted with the thermistor 51 is silicon nitride film, and silicon oxide film is then located at except the silicon nitride film,
The silicon oxide film is set to except silicon nitride film, the thermistor 51 can be more effectively protected, increases temperature-sensitive
The antioxygenic property of resistance 51.
Upper layer and lower layer silica/silicon nitride film of the thermistor 51 of the utility model not only plays it protection and makees
With, on the other hand since the symmetrical of structure can also play the role of stress equilibrium, the deformation of cross network structure is reduced,
To substantially increase the intensity and stability of 51 support construction of thermistor.
As shown in Figure 10, step 4) is then carried out, a lid substrate 6 with very low power 61 is provided, the lid substrate 6 is bonded
And the top layer silicon 13 of the soi wafer 1, the graphical stacked structure 15 are located in the very low power 61.
Preferably, the region that the lid substrate 6 corresponds to the pad structure 52 has a protector 62, the protector
62 with to avoid being bonded between the pad structure 52 and the lid substrate 6.
The lid substrate 6 includes cover glass, and the cover glass is bonded work with the top layer silicon 13 of the soi wafer 1
Skill is static bonding process.
As shown in figure 11, step 5) is then carried out, etches the substrate silicon 11 of the soi wafer 1 in the substrate silicon 11
The middle micro- raceway groove 16a for forming microfluidic chromatography column and the micro-pillar array 161 in micro- raceway groove 16a, while by described in etching
The oxygen buried layer 12 of substrate silicon 11 and the soi wafer 1 is to form the release groove 14 of the graphical stacked structure 15, the release
Slot 14 is connected to micro- raceway groove 16a.
Preferably, the graphical stacked structure 15 hangs on the middle section of the release groove 14.
Preferably, using deep reaction ion etching technique from the substrate silicon 11 of soi wafer described in back-etching 1, in institute
It states and forms micro- raceway groove 16a of microfluidic chromatography column, the micro-pillar array 161 in micro- raceway groove 16a in substrate silicon 11 and described release
Slot 14 is put, the oxygen buried layer 12 is etched using reactive ion etching process, to release the graphical stacked structure 15.
The utility model forms micro- raceway groove 16a, the micro-pillar array using deep reaction ion etching DRIE techniques
161, while the graphical stacked structure 15 is discharged, it can make the side of micro- raceway groove 16a, release groove 14 and micro-pillar array 161
Wall is steep, reduces device dead volume.
As shown in FIG. 12 and 13, step 6) is finally carried out, provides a bottom substrate 7, and the bottom substrate 7 is bonded to institute
The substrate silicon 11 for stating soi wafer 1, it is micro- logical comprising the very low power 61, the release groove 14 and micro- raceway groove 16a to be formed
Road 16.
As an example, the bottom substrate 7 includes glass negative, the substrate silicon 11 of the glass negative and the soi wafer 1
Bonding technology be static bonding process.
As an example, as shown in figure 13, micro- raceway groove 16a extends shape in round-trip bending and is formed in the substrate silicon 11
In, the release groove 14 is connected to the both ends of micro- raceway groove 16a, as the arrival end 162 of the microchannel 16 and outlet end
163.The arrival end 162 of the microchannel 16 and outlet end 163 are formed simultaneously with the top layer silicon 13- first medium films 41-
The graphical stacked structure 15 of thermistor 51- second mediums film 42.It should be noted that bending back and forth of showing of Figure 13
Number is 2 times, and in practical application, the number bent back and forth can be more, for example, the number bent back and forth can be situated between
Between 1~500 time, and it is not limited to example recited herein.
As shown in FIG. 12 and 13, the present embodiment also provides a kind of microfluidic chromatography column based on SOI and micro- thermal conductivity detector (TCD)
Integrated chip, including：Soi wafer 1 has substrate silicon 11, oxygen buried layer 12 and top layer silicon 13；Including top layer silicon 13- first is situated between
The graphical stacked structure 15 that matter film 41- thermistor 51- second mediums film 42 is formed, the graphical stacked structure 15
Including cross network structure, 15 lower section of the graphical stacked structure has the substrate silicon 11 and the oxygen buried layer 12 by figure
Change the release groove 14 formed, the graphical stacked structure 15 is hung in the release groove 14；Lid substrate 6 is bonded to described
There is very low power 61, the graphical stacked structure 15 to be located in the very low power 61 for top layer silicon 13, the lid substrate 6；Micro- color
The micro- raceway groove 16a for composing column, is formed in the substrate silicon 11, has micro-pillar array 161, micro- ditch in micro- raceway groove 16a
Road 16a is connected to the release groove 14；And bottom substrate 7, it is bonded to the substrate silicon 11 of the soi wafer 1, includes institute to be formed
State the microchannel 16 of very low power 61, the release groove 14 and micro- raceway groove 16a.
As shown in Fig. 6,12, pad recess 3, the pad recess 3 are also formed in the top layer silicon 13 of the soi wafer 1
In be formed with pad structure 52, the pad structure 52 is electrical connected with the thermistor 51.
As shown in figure 13, there are the cross network structure multiple extensions, each extension to be connect with the soi wafer 1,
To support the cross network structure.Prolong along the cross network structure as shown in Figure 1, the thermistor 51 is serrated
It stretches, and is connect with the pad structure 52.Metal used by the thermistor 51 include Pt/Ti laminations, Ni/Cr laminations,
One kind in W/Ti laminations and W/Re laminations.
As shown in figure 12, the first medium film 41 and second medium film 42 include that silicon oxide film and silicon nitride are thin
The laminated construction of one or two kinds of compositions of film.As an example, the first medium film 41 and second medium film 42 are oxygen
The laminated construction of SiClx film and silicon nitride film composition, the first medium film 41 are silicon oxide film and nitrogen from bottom to top
SiClx pellicular cascade structure, the second medium film 42 are silicon nitride film and silicon oxide film laminated construction from bottom to top.
As shown in figure 13, the graphical stacked structure 15 hangs on the middle section of the release groove 14.The first medium film
41 and second medium film 42 be to wrap up the thermistor 51 or the clamping thermistor 51.The temperature-sensitive electricity of the utility model
Upper layer and lower layer silica/silicon nitride film of resistance 51 not only plays a protective role to it, on the other hand due to symmetrical point of structure
Cloth can also play the role of stress equilibrium, reduce the deformation of cross network structure, to substantially increase thermistor 51
The intensity and stability of support structure.
The lid substrate 6 includes cover glass, and the bottom substrate 7 includes glass negative, the cover glass and the SOI
The bonding of the top layer silicon 13 of silicon chip 1 is electrostatic bonding, and the glass negative is with being bonded for substrate silicon 11 of the soi wafer 1
Electrostatic bonding.
As shown in figure 13, micro- raceway groove 16a extends shape in round-trip bending and is formed in the substrate silicon 11, the release
Slot 14 is connected to the both ends of micro- raceway groove 16a, the arrival end 162 as the microchannel 16 and outlet end 163.It is described micro- logical
The arrival end 162 in road 16 and outlet end 163 are formed simultaneously with the top layer silicon 13- first mediums film 41- thermistors 51-
The graphical stacked structure 15 of second medium film 42.It should be noted that the number bent back and forth that Figure 13 is shown is 2 times, it is real
In the application of border, the number bent back and forth can be more, for example, the number bent back and forth can take second place between 1~500
Between, and it is not limited to example recited herein.
As described above, integrated chip and the preparation of the microfluidic chromatography column and micro- thermal conductivity detector (TCD) based on SOI of the utility model
Method has the advantages that：
Micro- thermal conductivity detector (TCD) and microfluidic chromatography column of the utility model are located at the top layer silicon 13 and substrate silicon of soi wafer 1
On 11, the controllability of the flexibility and technique making of design is increased.
In the microfluidic chromatography column of the utility model and the integrated chip of micro- thermal conductivity detector (TCD), micro- raceway groove of micro- thermal conductivity detector (TCD)
16a is obtained by deep reaction ion etching, and size is accurately controllable, can get lower dead volume；Microfluidic chromatography column is also to pass through depth
Reactive ion etching obtains, and size is accurately controllable.
The utility model is integrated on the same chip by microfluidic chromatography column and micro- thermal conductivity detector (TCD), is not necessarily to additional interconnecting piece
Part, this integrated chip have many advantages, such as that dead volume is low, high sensitivity.
So the utility model effectively overcomes various shortcoming in the prior art and has high industrial utilization.
The principles of the present invention and effect is only illustrated in above-described embodiment, rather than limits the present invention.
Any person skilled in the art can all modify above-described embodiment under the spirit and scope without prejudice to the utility model
Or change.Therefore, such as those of ordinary skill in the art without departing from the utility model it is revealed spirit with
All equivalent modifications completed under technological thought or change should be covered by the claim of the utility model.
Claims (12)
1. the integrated chip of a kind of microfluidic chromatography column based on SOI and micro- thermal conductivity detector (TCD), it is characterised in that：Including：
Soi wafer has substrate silicon, oxygen buried layer and top layer silicon；
Including the graphical stacked structure that top layer silicon-first medium film-thermistor-second medium film is formed, the figure
Shape stacked structure includes cross network structure, has the substrate silicon and the oxygen buried layer below the graphical stacked structure
It is patterned the release groove to be formed, the graphical stacked structure is hung in the release groove；
Lid substrate, is bonded to the top layer silicon, and there is the lid substrate very low power, the graphical stacked structure to be located at described micro-
In groove；
Micro- raceway groove of microfluidic chromatography column, is formed in the substrate silicon, has micro-pillar array in micro- raceway groove, micro- raceway groove with
The release groove connection；And
Bottom substrate is bonded to the substrate silicon of the soi wafer, to be formed comprising the very low power, the release groove and described micro-
The microchannel of raceway groove.
2. the integrated chip of the microfluidic chromatography column according to claim 1 based on SOI and micro- thermal conductivity detector (TCD), feature exist
In：It is also formed with pad recess in the top layer silicon of the soi wafer, pad structure, the weldering are formed in the pad recess
Dish structure is electrical connected with the thermistor.
3. the integrated chip of the microfluidic chromatography column according to claim 2 based on SOI and micro- thermal conductivity detector (TCD), feature exist
In：The cross network structure has multiple extensions, and each extension is connect with the soi wafer, to support the crossing net
Shape structure.
4. the integrated chip of the microfluidic chromatography column according to claim 3 based on SOI and micro- thermal conductivity detector (TCD), feature exist
In：The thermistor is serrated to be extended along the cross network structure, and is connected with the pad structure.
5. the integrated chip of the microfluidic chromatography column according to claim 1 based on SOI and micro- thermal conductivity detector (TCD), feature exist
In：Metal used by the thermistor includes one in Pt/Ti laminations, Ni/Cr laminations, W/Ti laminations and W/Re laminations
Kind.
6. the integrated chip of the microfluidic chromatography column according to claim 1 based on SOI and micro- thermal conductivity detector (TCD), feature exist
In：The first medium film and second medium film include one or two kinds of compositions of silicon oxide film and silicon nitride film
Laminated construction.
7. the integrated chip of the microfluidic chromatography column according to claim 6 based on SOI and micro- thermal conductivity detector (TCD), feature exist
In：The first medium film and second medium film are the laminated construction that silicon oxide film and silicon nitride film form, described
First medium film is from bottom to top silicon oxide film and silicon nitride film laminated construction, and the second medium film is from bottom to top
For silicon nitride film and silicon oxide film laminated construction.
8. the integrated chip of the microfluidic chromatography column according to claim 1 based on SOI and micro- thermal conductivity detector (TCD), feature exist
In：The first medium film and second medium film are to wrap up the thermistor or the clamping thermistor.
9. the integrated chip of the microfluidic chromatography column according to claim 1 based on SOI and micro- thermal conductivity detector (TCD), feature exist
In：The graphical stacked structure hangs on the middle section of the release groove.
10. the integrated chip of the microfluidic chromatography column according to claim 1 based on SOI and micro- thermal conductivity detector (TCD), feature exist
In：The lid substrate includes cover glass, and the bottom substrate includes glass negative, the cover glass and the soi wafer
The bonding of top layer silicon includes electrostatic bonding, and the glass negative includes electrostatic bonding with being bonded for the substrate silicon of the soi wafer.
11. the integrated chip of the microfluidic chromatography column according to claim 1 based on SOI and micro- thermal conductivity detector (TCD), feature exist
In：Micro- raceway groove extends shape in round-trip bending and is formed in the substrate silicon, and the release groove is connected to micro- raceway groove
Both ends, the arrival end as the microchannel and outlet end.
12. the integrated chip of the microfluidic chromatography column according to claim 11 based on SOI and micro- thermal conductivity detector (TCD), feature exist
In：The arrival end of the microchannel and outlet end are formed simultaneously with the top layer silicon-first medium film-thermistor-the second
The graphical stacked structure of dielectric film.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109962067A (en) * | 2017-12-22 | 2019-07-02 | 中国科学院上海微系统与信息技术研究所 | The integrated chip and preparation method of microfluidic chromatography column and micro- thermal conductivity detector (TCD) based on SOI |
| CN111115566A (en) * | 2019-12-25 | 2020-05-08 | 北京航天控制仪器研究所 | Stress compensation method for MEMS wafer level packaging |
| CN111483972A (en) * | 2019-01-25 | 2020-08-04 | 中国科学院上海微系统与信息技术研究所 | Enrichment device chip structure and preparation method thereof |
-
2017
- 2017-12-22 CN CN201721815749.7U patent/CN207938610U/en not_active Withdrawn - After Issue
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109962067A (en) * | 2017-12-22 | 2019-07-02 | 中国科学院上海微系统与信息技术研究所 | The integrated chip and preparation method of microfluidic chromatography column and micro- thermal conductivity detector (TCD) based on SOI |
| CN109962067B (en) * | 2017-12-22 | 2023-12-29 | 中国科学院上海微系统与信息技术研究所 | SOI-based microcomatography column and micro heat conduction Integrated chip of detector and preparation method |
| CN111483972A (en) * | 2019-01-25 | 2020-08-04 | 中国科学院上海微系统与信息技术研究所 | Enrichment device chip structure and preparation method thereof |
| CN111115566A (en) * | 2019-12-25 | 2020-05-08 | 北京航天控制仪器研究所 | Stress compensation method for MEMS wafer level packaging |
| CN111115566B (en) * | 2019-12-25 | 2023-07-14 | 北京航天控制仪器研究所 | Stress compensation method for MEMS wafer level packaging |
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