CN207517694U - A kind of array substrate and display device - Google Patents
A kind of array substrate and display device Download PDFInfo
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- CN207517694U CN207517694U CN201721677992.7U CN201721677992U CN207517694U CN 207517694 U CN207517694 U CN 207517694U CN 201721677992 U CN201721677992 U CN 201721677992U CN 207517694 U CN207517694 U CN 207517694U
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Abstract
The utility model embodiment provides a kind of array substrate and display device, is related to display technology field, can solve the problems, such as to cause left and right side frame wider due to gate driving circuit in the prior art.The array substrate includes being set to the sub-pix arranged in arrays for being interlocked on underlay substrate by a plurality of grid line and multiple data lines transverse and longitudinal and being defined, pixel circuit and the luminescence unit being connect with pixel circuit are provided in each sub-pix, pixel circuit is located at luminescence unit close to the side of underlay substrate；The array substrate further includes the scanning signal output line close to underlay substrate side positioned at luminescence unit, the first end connection grid line of scanning signal output line, and the end of second end and data line is located at the same avris of non-display area and is connect with gate driving circuit；Wherein, a plurality of scanning signal output line is interspersed in the position between pixel circuit, and different grid lines connects different scanning signal output lines.
Description
Technical field
The utility model is related to display technology field more particularly to a kind of array substrates and display device.
Background technology
Shield one of the important indicator of accounting as evaluation display device, in the prior art, on the one hand, use Flexible Displays
Backboard in device is bent in bent area, and source drive IC is bent to the back side of display screen；On the other hand, grid drives
Dynamic circuit is using GOA (Gate Driver on Array, GOA) circuit, so as to reduce the border width of display device, to improve
The screen accounting of display device.
However, generally GOA circuits are integrated in array substrate along the left and right side frame position of line direction in the prior art,
Since GOA circuits itself occupy 1/2 or so of left and right side frame width so that the ultra-narrow frame design of display device is restricted.
Utility model content
The embodiment of the utility model provides a kind of array substrate and display device, can solve in the prior art because of grid
Driving circuit and the problem of cause left and right side frame wider.
In order to achieve the above objectives, the embodiment of the utility model adopts the following technical scheme that：
The utility model embodiment provides a kind of array substrate, and including viewing area and non-display area, the array substrate is also
Including being set to the sub-pix arranged in arrays for being interlocked on underlay substrate by a plurality of grid line and multiple data lines transverse and longitudinal and being defined,
Pixel circuit and the luminescence unit being connect with the pixel circuit are provided in each sub-pix, the pixel circuit is located at institute
Luminescence unit is stated close to the side of the underlay substrate；The array substrate is further included positioned at the luminescence unit close to the lining
The scanning signal output line of substrate side, the first end of the scanning signal output line connect the grid line, second end and institute
The end for stating data line is located at the same avris of the non-display area and is connect with gate driving circuit；Wherein, it is a plurality of described to sweep
The position that signal output line is interspersed between the pixel circuit is retouched, the different grid lines connects the different scanning signals
Output line.
It is further preferred that the array substrate is flexible array substrate；The flexible array substrate includes being located at described
Non-display area and the bent area adjacent with the viewing area；The second end of the scanning signal output line is located at the bent area
Away from the side of the viewing area.
It is further preferred that the electricity between conductive devices in each scanning signal output line itself and the array substrate
Hold equal with the product of the resistance of itself；Alternatively, each scanning signal output line itself and the conductor in the array substrate
Capacitance between part is equal, and the resistance of each scanning signal output line itself is equal.
It is further preferred that be connected to the difference scanning signal output lines of the same gate driving circuit with it is described
The tie point of grid line is arranged along the extending direction of the data line.
It is further preferred that the tie point is located at the point midway of the grid line.
It is further preferred that be connected to the difference scanning signal output lines of the same gate driving circuit with it is described
The tie point of grid line is along the data line extending direction Heterogeneous Permutation.
It is further preferred that the scanning signal output line includes the sequentially connected traversing section of head and the tail and longitudinal sections；Wherein,
The traversing section is identical with the extending direction of the grid line, and the longitudinal sections are identical with the extending direction of the data line.
It is further preferred that the same scanning signal output line is interspersed in the position between adjacent column pixel circuit, no
The same scanning signal output line is interspersed in the position between different adjacent column pixel circuits；The scanning signal output line
Extend from its tie point with the grid line along the data line extending direction towards the one end for connecting the gate driving circuit；Or
Person, the scanning signal output line is from its tie point with the grid line along the data line extending direction towards away from described in connection
One end extension of gate driving circuit, and towards one end extension for connecting the gate driving circuit after bending.
It is further preferred that the traversing section of the scanning signal output line and the same material of grid line same layer；The scanning
The longitudinal sections of signal output line and the same material of data line same layer.
On the other hand the utility model embodiment also provides a kind of display device, including aforementioned array substrate.
The utility model embodiment provides a kind of array substrate and display device, the flexible array substrate, including viewing area
And non-display area, array substrate are further included to be set on underlay substrate and staggeredly be defined by a plurality of grid line and multiple data lines transverse and longitudinal
Sub-pix arranged in arrays, be provided with pixel circuit and the luminescence unit being connect with pixel circuit in each sub-pix,
Pixel circuit is located at luminescence unit close to the side of underlay substrate；The array substrate is further included positioned at luminescence unit close to substrate base
The end position of the scanning signal output line of plate side, the first end connection grid line of scanning signal output line, second end and data line
In non-display area same avris and connect with gate driving circuit；Wherein, multi-strip scanning signal output line is interspersed in pixel electricity
Position between road, different grid lines connect different scanning signal output lines.
In conclusion in compared with the prior art, the end that gate driving circuit is arranged on to grid line is located at non-display area
Avris, scanning signal output line is interspersed in the position between pixel circuit in the utility model, and by its first end and grid
Line connects, and second end is connect in the position for the same avris for being located at non-display area with the end of data line with gate driving circuit,
So, the avris space of the non-display area of grid line end can be discharged, and then solves and causes due to gate driving circuit
The problem of left and right (grid line both ends) frame is wider.
Description of the drawings
It in order to illustrate the embodiment of the utility model or the technical proposal in the existing technology more clearly, below will be to embodiment
Or attached drawing needed to be used in the description of the prior art is briefly described, it should be apparent that, the accompanying drawings in the following description is only
It is some embodiments of the utility model, for those of ordinary skill in the art, in the premise not made the creative labor
Under, it can also be obtained according to these attached drawings other attached drawings.
Fig. 1 is the structure diagram of a kind of array substrate that the utility model embodiment provides；
Fig. 2 is cross-sectional views of the Fig. 1 along A-A ' positions；
Fig. 3 is the structure diagram of another array substrate that the utility model embodiment provides；
Fig. 4 a are the structure diagram of another array substrate that the utility model embodiment provides；
Fig. 4 b are the structure diagram of another array substrate that the utility model embodiment provides；
Fig. 5 is the structure diagram of another array substrate that the utility model embodiment provides；
Fig. 6 is the structure diagram of another array substrate that the utility model embodiment provides；
Fig. 7 is the structure diagram of another array substrate that the utility model embodiment provides；
Fig. 8 is the structure diagram of another array substrate that the utility model embodiment provides；
Fig. 9 is the structure diagram of another array substrate that the utility model embodiment provides；
Figure 10 is the structure diagram of another array substrate that the utility model embodiment provides；
Figure 11 is the structure diagram of another array substrate that the utility model embodiment provides；
Figure 12 is the structure diagram of another array substrate that the utility model embodiment provides.
Reference numeral：
01- viewing areas；02- non-display areas；021- bent areas；100- underlay substrates；101- grid lines；102- data lines；
103- pixel circuits；104- scanning signal output lines；1041- traversing sections；1042- longitudinal sections；200- luminescence units；O- connections
Point；L1- first ends；L2- second ends；P- sub-pixes.
Specific embodiment
The following is a combination of the drawings in the embodiments of the present utility model, and the technical scheme in the embodiment of the utility model is carried out
It clearly and completely describes, it is clear that the described embodiments are only a part of the embodiments of the utility model rather than whole
Embodiment.Based on the embodiment in the utility model, those of ordinary skill in the art are without making creative work
All other embodiments obtained shall fall within the protection scope of the present invention.
The utility model embodiment provides a kind of array substrate, and such as Fig. 1 and Fig. 2, (Fig. 1 illustrates along the section of A-A ' positions
Figure) shown in, which includes viewing area 01 and non-display area 02；In addition, the array substrate, which further includes, is set to substrate base
Interlocked the sub-pix P, Mei Yiya arranged in arrays defined on plate 100 by a plurality of grid line 101 and 102 transverse and longitudinal of multiple data lines
Pixel circuit 103 and the luminescence unit 200 being connect with pixel circuit 103 are provided in pixel P, pixel circuit 103 is located at hair
Light unit 200 is close to the side of underlay substrate 100.
Wherein, those skilled in the art is it is to be understood that the region of above-mentioned sub-pix P arranged in arrays is formed
Viewing area 01；Non-display 02 be located at viewing area 01 periphery, and with viewing area 01 close to.
In addition, as shown in Fig. 2, the array substrate further includes the sweeping close to 100 side of underlay substrate positioned at luminescence unit 200
Retouch signal output line 104, the first end L1 connections grid line 101 of (with reference to figure 1) the scanning signal output line 104, second end L2 with
The end of data line 102 be located at the same avris of non-display area 02 and connect with gate driving circuit (not shown) namely
The gated sweep signal of gate driving circuit output is transmitted to grid line by scanning signal output line；Wherein, multi-strip scanning signal
Output line 104 is interspersed in the position between pixel circuit 103, and different grid lines 101 connects different scanning signal output lines
104。
In conclusion in compared with the prior art, the end that gate driving circuit is arranged on to grid line is located at non-display area
Avris, scanning signal output line is interspersed in the position between pixel circuit in the utility model, and by its first end and grid
Line connects, and second end is connect in the position for the same avris for being located at non-display area with the end of data line with gate driving circuit,
So, the avris space of the non-display area of grid line end can be discharged, and then solves and causes due to gate driving circuit
The problem of left and right (grid line both ends) frame is wider.
Herein it should be noted that first, above-mentioned luminescence unit 200 can be organic electroluminescent LED (Organic
Light Emitting Diode, OLED) or quantum dot, the utility model this is not construed as limiting, it is, of course, preferable to
It is OLED to set the luminescence unit.
Grid line and data line are shown in second, Fig. 1, those skilled in the art was it is to be understood that the array substrate should
Other also a large amount of Wiring structures, such as light emitting control line, power cord etc.；In addition, above-mentioned pixel circuit is for single
For luminescence unit, different luminescence units corresponds to different pixel circuits.
Third, above-mentioned gate driving circuit can be GOA circuits or gate driving IC, and the utility model is to this
It does not limit；Certainly, it is contemplated that GOA circuits are for gate driving IC, on the one hand, cost is relatively low；On the other hand, it occupies
The space of frame is smaller, therefore the utility model is preferred, which is GOA circuits；Namely the array substrate packet
GOA circuits are included, and the end of the GOA circuits and data line is located at the same avris of non-display area；It is in addition, right in the utility model
The GOA circuits specifically set being not construed as limiting in itself；Following embodiment is to this by taking gate driving circuit is GOA circuits as an example
Utility model is described further.
4th, the position that above-mentioned multi-strip scanning signal output line 104 is interspersed between pixel circuit 103 refers to, Ke Yishi
All scanning signal output lines are interspersed in the position between pixel circuit；Can also partial scan signal output line be interspersed in picture
Position between plain circuit, partial scan signal output line is not interspersed in the position between pixel circuit, for example, partial scan
Signal output line is likely located at the outside (can refer to Fig. 5) of the pixel circuit of outermost, and the utility model does not limit this specifically
It is fixed, it is practical preferably to should ensure that most of scanning signal output line is interspersed in the position between pixel circuit.
5th, the same avris that the second end of said scanning signals output line and the end of data line are located at non-display area is
Refer to：The second end of scanning signal output line can drive the end of IC to be located at same one side of non-display area with data line binding data
Side；Can also be that the end of the unbound data-driven IC of data line is located at the same avris of non-display area；It is, of course, also possible to it is
The end of the second end of partial scan signal output line and data line binding data driving IC are located at the same avris of non-display area,
The second end of partial scan signal output line is located at same one side of non-display area with the end of the unbound data-driven IC of data line
Side, the utility model are not construed as limiting this, can select according to the actual needs setting.
On this basis, in order to enable realizing that ultra-narrow frame is set using the display device of the array substrate in the utility model
Meter, the utility model is preferred, and as shown in Fig. 3, Fig. 4 a, Fig. 4 b, which is flexible array substrate namely the array base
Underlay substrate in plate is made of flexible bendable material, for example, the underlay substrate can also may be used with PI (polyimides) material
To be combined using PI materials with inorganic material, it is not restricted to this certainly.
Based on the underlay substrate in the case of flexible array substrate, can positioned at non-display area and with viewing area phase
Adjacent position setting bent area (Bending Area), for example, as shown in figure 3, can be in non-display area 02, positioned at along data
The side setting bent area 021 in the binding area (Bonding Area) of data-driven IC is set on line extending direction, it can also be as
Shown in Fig. 4 a and 4b, it is located in non-display area along the both ends on data line extending direction and is respectively provided with bent area 021.
Specifically, for the second end L2 of scanning signal output line 104, as shown in fig. 3, second end L2 can be with
The side of data-driven IC is set in non-display area；It can also be as shown in Fig. 4 a, second end L2 is located at non-display area
The relative side of middle setting data-driven IC；Bilateral driving can also be carried out using two GOA circuits as shown in Fig. 4 b, it will
The second end L2 for the scanning signal output line 104 being connect with two GOA circuits is respectively arranged at data line in non-display area and extends
Two sides on direction, it should, of course, be understood that being carried out using two GOA circuits by scanning signal output line to grid line
When bilateral drives, need to ensure that two GOA circuits are driven and swept (for example, from top to bottom) with identical scanning sequency to grid line
It retouches, to ensure that normal picture is shown.
So, for the set-up mode of above-mentioned arbitrary bent area, by by the second end of scanning signal output line
Be set to bent area away from viewing area side namely GOA circuits be set to bent area deviate from viewing area side, and with scanning
The second end of signal output line 104 connects in the position, so as to along bent area by non-display area towards the back of the body of array substrate
Face is bent, so that GOA circuits and data-driven IC are bent to the back side of array substrate, so as to fulfill the super of display device
The effect of narrow frame.
The specific distribution situation of scanning signal output line 104 is described further below by way of specific embodiment.
Embodiment one
As shown in Fig. 5, Fig. 6, Fig. 7, it is connected to the different scanning signal output line 104 and grid line of same gate driving circuit
101 tie point O along data line extending direction Heterogeneous Permutation, wherein, in order to clearly represent scanning signal in Fig. 5, Fig. 6, Fig. 7
Output line does not show that data line, and data line specifically can be with reference chart 1, and data line is not shown in following embodiment.
For example, it will can be interspersed in adjacent column pixel circuit with scan signal output line 104 as shown in Figure 5 and Figure 6
Position between 103, different scanning signal output lines 104 are respectively interposed between different adjacent column pixel circuits 103
Position；Wherein, different adjacent column pixel circuits refers to, the adjacent pixel circuit of not exactly the same two row, certainly, the difference
Adjacent column pixel circuit between can have same column pixel circuit, for example, between first row and secondary series pixel circuit, the
Between two row and third row pixel circuit etc..
Signal, scanning signal output line 104 is set in Fig. 5 from the tie point O of its first end L1 and grid line 101 along data
One end (namely second end L2) of line extending direction towards connection gate driving circuit extends；Set multi-strip scanning signal defeated in Fig. 6
Outlet is from the tie point O of its first end L1 and grid line 101 along data line extending direction towards away from the one of connection gate driving circuit
End extension, and after bending towards connection gate driving circuit one end extension namely the scanning signal output line with grid line
Tie point away from connection gate driving circuit side have bending structure.
In another example as shown in Figure 7 and Figure 8, scanning signal output line 104 can be set to be interspersed in multiple row pixel circuit 103
Between namely scanning signal output line in partly between adjacent column pixel circuit, partly positioned at adjacent rows pixel circuit it
Between.
Signal, it, can be in scanning signal output line 104 from the connection of its first end L1 and grid line 101 as shown in Fig. 7
The middle part that one end of point O along data line extending direction towards connection gate driving circuit extends sets bending structure, the bending structure
Position between adjacent rows pixel circuit；As shown in Fig. 8, scanning signal output line 104 can include head and the tail and connect successively
The traversing section 1041 and longitudinal sections 1042 connect；Wherein, traversing section 1041 is between adjacent rows pixel circuit, with grid line 101
Extending direction is identical, longitudinal sections 1042 between adjacent column pixel circuit, it is identical with the extending direction of data line.
It is to be understood that for the scanning signal output line shown in Fig. 7, different sweeps those skilled in the art
Retouching signal output line, there are overlapping region (namely the crossover regions of projection of the different scanning signal output lines on underlay substrate
Domain) in the case of, then it certainly exists the part in two scanning signal output lines positioned at crossover region and is located at different layers, to ensure to sweep
Retouch the normal use of signal output line.
In conclusion compared to the setting structure of scanning signal output line in Fig. 5, scanning signal output line in Fig. 6 and Fig. 7
Bending structure is both provided with, scanning signal output line is both provided with traversing section in Fig. 8, so, can be by adjusting scanning
The distribution situation (for example, length etc.) of bending structure, traversing section in signal output line, to adjust each scanning signal output line itself
Load it is as identical as possible, and then ensure the performance of gated sweep signal that each grid line is received by each scanning signal output line
(such as signal strength) is identical as far as possible, so that the display device including the array substrate shows that (brightness) of picture is uniform
Property.
Embodiment two
As shown in figure 9, be connected to the different scanning signal output line 104 of same gate driving circuit (not shown) with
The tie point O of grid line 101 is along the extending direction arrangement of data line 102 namely each scanning signal output line with each grid line corresponding
Same position connection.
Based on this, it is contemplated that ensure that the display device for including the array substrate shows that (brightness) of picture is uniform as far as possible
Property, the set-up mode of two kinds presented below more preferred scanning signal output lines 104.
For example, as shown in Figure 10, it can preferably set the different scanning signal for being connected to same gate driving circuit defeated
The tie point O of outlet 104 and grid line 101 be located at it is corresponding at the point midway of grid line 101 or at approximate mid points position, from
And cause load of the grid line in the left and right sides of tie point O close to equal, to ensure (brightness) homogeneity of display picture.
In another example as shown in figure 11, it is preferred that two ends of grid line 101 connect respectively with scanning signal output line 104
It connects, by the way of bilateral driving, enhances driving force, i.e. the both ends of grid line are believed using different GOA by different scanning
Number output line exports scanning drive signal to grid line simultaneously, so, compared to scanning signal output line 104 and grid in Fig. 9
The tie point O of line 101 is located at for an end of grid line 101, reduces scanning drive signal in transmission process because of distance
The problem of signal is decayed caused by excessive, so as to ensure that the drive signal strength on entire grid line is more uniformly distributed, Ye Jibao
Card shows that picture has uniform brightness.
On this basis, the utility model is preferred, and as shown in Figure 10 and Figure 11, scanning signal output line 104 can wrap
Include the sequentially connected traversing section 1041 of head and the tail and longitudinal sections 1042；Wherein, traversing section 1041 between adjacent rows pixel circuit,
It is identical with the extending direction of grid line 101, extending direction phase of the longitudinal sections 1042 between adjacent column pixel circuit, with data line
Together.
It so, can be by the distribution situation of practical adjustment traversing section and longitudinal sections, to ensure each scanning signal
The load of output line itself is as identical as possible, and then ensures that each grid line is believed by the gated sweep that each scanning signal output line receives
Number performance (such as signal strength) it is identical as far as possible so that display device including the array substrate shows picture
(brightness) homogeneity.
It is preferably provided in conclusion scanning signal output line in previous embodiment one and embodiment two can be combined in practice
Mode according to the actual needs connects up scanning signal output line.
It is to be understood that those skilled in the art, according to the design method disclosed in the utility model embodiment and
The protection model in the utility model should all be covered by the design method rationally inferred according to the utility model disclosure
It is specific as follows in enclosing：
On the one hand, different scanning signal output line can be located at the tie point O of grid line corresponding in reference implementation example two
At the point midway of grid line or at approximate mid points position, to ensure that load of the grid line in the left and right sides of tie point O connects
It is near equal.
On the other hand, can be to set bending structure on scanning signal output line in reference implementation example one, and pass through tune
The length of whole bending structure realizes the purpose that is equal or approximately equal of adjustment scanning signal output line own load.
It in another aspect, can be in reference implementation example one and embodiment two, by scanning signal output line setting head and the tail successively
The traversing section of connection and the designing scheme of longitudinal sections adjust scanning signal output line itself by adjusting lateral segment length to realize
Load the purpose being equal or approximately equal.
Summary, signal, as shown in figure 12, with reference to above-described embodiment disclosure, provide a kind of array base
The design method of scanning signal output line in plate certainly, can select to fit as needed according to the utility model disclosure
When designing scheme, no longer repeat one by one herein.
In addition, in previous embodiment one and embodiment two, by adjusting the distribution situation of scanning signal output line to ensure
The load of each scanning signal output line itself is as identical as possible, is the delay in order to ensure each scanning signal output line as far as possible
Time, t was identical, wherein, delay time t is usually typically expressed as the product of resistance R and capacitance C.
Specifically, each scanning signal output line itself and the capacitance phase between the conductive devices in array substrate can be set
Deng, and the resistance of each scanning signal output line itself is equal, to ensure that the delay time of each scanning signal output line is identical.
Certainly, for ensureing that resistance and capacitance are equal respectively, to the requirement of the wiring condition of scanning signal output line compared with
Height, can also set in practice capacitance between the conductive devices in each scanning signal output line itself and array substrate with itself
The product of resistance is equal, to ensure that each scanning signal output line delay time is identical.
Specific adjustment below for the resistance on above-mentioned each scanning signal output line itself and capacitance is done further
It is bright.
For adjusting the resistance on each scanning signal output line itself, since scanning signal output line is generally by conduction
Material is formed, and existing conductive material is respectively provided with certain resistance, for scanning signal output line, is selected and line in material
Wide certain situation, generally adjusts the resistance of scanning signal output line, such as can pass through by adjusting the length of the cabling
Increase the length of scanning signal output line to increase its resistance.
Signal, in Fig. 6 and Fig. 7, bending structure is provided in scanning signal output line, by adjusting bending structure
Length adjust the resistance of entire scanning signal output line；Alternatively, as in Fig. 8-Figure 12, scanning signal output line is set as
Sequentially connected traversing section and longitudinal sections from beginning to end adjust the resistance of scanning signal output line by adjusting the length of traversing section.
For adjusting the capacitance on each scanning signal output line itself, it should be understood that, have in array substrate big
The conductive devices (Wiring structure) of amount, such as grid line, data line, power cord, light emitting control line etc., so that scanning signal
Output line in wiring inevitably between other conductive devices there are overlapping region, so as to form capacitance, in practice
It can be big to adjust the capacitance that it is formed between other conductive devices by adjusting the wire location of each scanning signal output line
It is small.
Certainly, it is contemplated that there are a large amount of conductive devices in array substrate, it is practical to the electricity on scanning signal output line
It when holding calculating, can only consider that the conductive devices for the capacitance that can not ignore can be formed between scanning signal output line, for
The capacitance that smaller (negligible) is formed between some conductive devices and scanning signal output line approximate can be ignored, in order to reality
Wires design.
Furthermore, it is contemplated that practical manufacture craft, in previous embodiment one and embodiment two, partial scan signal output
Line includes the longitudinal sections arranged along data line extending direction and the transverse end arranged along grid line extending direction, in order to simplify technique
Cost of manufacture is reduced, can be by the traversing section of scanning signal output line and the same material of grid line same layer, longitudinal sections and data line same layer
It same material namely retouches the traversing section of signal output line and is made with grid line by a patterning processes, longitudinal sections and data line
It is made by a patterning processes；Certainly, the utility model is not restricted to this, can be according to battle array in practical making
The type of row substrate according to practical needs, can also will retouch signal output line and be set with grid line, the different layer of data line.
It should be noted that in the utility model, patterning processes can refer to include photoetching process or, including photoetching process
And etch step, while other techniques for being used to form predetermined pattern such as printing, ink-jet can also be included；Photoetching process is
Refer to the technique for forming figure using photoresist, mask plate, exposure machine etc. for including the technical process such as film forming, exposure, development.It can root
According to the corresponding patterning processes of structure choice formed in the utility model.
In addition, those skilled in the art is it is to be understood that multi-strip scanning signal output line is interspersed in by the utility model
Position between the pixel circuit of array substrate, so as to will not the pixel of array substrate open rate and impact；Certainly, compared to
For pixel circuit of the prior art, using the plan of establishment of the utility model, inevitably need to pixel circuit into
Row compression, the space for scanning signal output line of being arranged with reserved place, if swept for example, being set between the pixel circuit of adjacent column
Signal output line is retouched, then is needed to pixel circuit transverse compression；If scanning signal is set between the pixel circuit of adjacent rows
Output line is then needed to pixel circuit longitudinal compression.
Specifically, for the spacing between two adjacent in the prior art pixel circuits is 3 μm, in the utility model
(can refer in Fig. 5 and connect up), the line width that can generally set scanning signal output line are 2 μm~3 μm, it is assumed that are 3 μm；Practical
In wiring, need to ensure that the spacing between scanning signal output line and two neighboring pixel circuit reaches 3 μm, so,
It needs to ensure each 6 μm of pixel circuit transverse compression, to meet practical wiring requirements；Certainly for Fig. 5 and shown in Fig. 6
Scanning signal output line has the scheme of bending structure, due to being two cablings in wide direction along bending structure part,
Broader wiring space is needed, pixel circuit can further be compressed according to practical wiring requirements in practice.
In addition, it is necessary to explanation, for being not provided with region (such as the right half part in Figure 10 of scanning signal output line
Region) in pixel circuit 103 for, the pixel circuit in the region can be compressed or not according to the actual needs
Compression, the utility model are not construed as limiting this.
Herein it should be noted that the aforementioned compression to pixel circuit refers to press the distribution area of pixel circuit
Contracting, and do not change the practical connection relation inside pixel circuit.
Herein it should also be noted that, in the utility model, about the instructions such as " on ", " under ", "left", "right" orientation or
What position relationship was defined for the orientation based on array substrate shown in the drawings or position, it should be understood that, these directionality arts
Language is opposite concept, they be used for relative to description and clarification, can be according to the change in the orientation that array substrate is placed
Change and correspondingly change.
The utility model embodiment also provides a kind of display device, and including aforementioned array substrate, which has
The advantageous effect identical with the array substrate that previous embodiment provides.Due to previous embodiment the structure of array substrate and
Advantageous effect is described in detail, and details are not described herein again.
It should be noted that in the utility model embodiment, display device can be：Electronic Paper, oled panel, hand
Any product with display function such as machine, tablet computer, television set, display, laptop, Digital Frame, navigator
Or component.
The above, only specific embodiment of the present utility model, but the scope of protection of the utility model is not limited to
In this, in the technical scope that any one skilled in the art discloses in the utility model, variation can be readily occurred in
Or replace, it should be covered within the scope of the utility model.Therefore, the scope of protection of the utility model should be with the power
Subject to the protection domain of profit requirement.
Claims (10)
1. a kind of array substrate, including viewing area and non-display area, which is characterized in that the array substrate, which further includes, is set to lining
Interlocked the sub-pix arranged in arrays defined on substrate by a plurality of grid line and multiple data lines transverse and longitudinal, in each sub-pix
Pixel circuit and the luminescence unit being connect with the pixel circuit are provided with, the pixel circuit is located at the luminescence unit and leans on
The side of the nearly underlay substrate；
The array substrate further includes the scanning signal output line close to the underlay substrate side, institute positioned at the luminescence unit
The first end for stating scanning signal output line connects the grid line, and second end and the end of the data line are located at the non-display area
Same avris and connect with gate driving circuit；Wherein, a plurality of scanning signal output line is interspersed in the pixel circuit
Between position, the different grid lines connects the different scanning signal output line.
2. array substrate according to claim 1, which is characterized in that the array substrate is flexible array substrate；It is described
Flexible array substrate includes being located at the non-display area and the bent area adjacent with the viewing area；
The second end of the scanning signal output line is located at the side that the bent area deviates from the viewing area.
3. array substrate according to claim 1, which is characterized in that each scanning signal output line itself and the battle array
The capacitance between conductive devices in row substrate is equal with the product of the resistance of itself；
Alternatively, each scanning signal output line itself is equal with the capacitance between the conductive devices in the array substrate, and each
The resistance of the scanning signal output line itself is equal.
4. array substrate according to claim 1, which is characterized in that be connected to the difference of the same gate driving circuit
The tie point of the scanning signal output line and the grid line is arranged along the extending direction of the data line.
5. array substrate according to claim 4, which is characterized in that the tie point is located at the point midway of the grid line
Place.
6. array substrate according to claim 1, which is characterized in that
The difference scanning signal output line of the same gate driving circuit and the tie point of the grid line are connected to along institute
State data line extending direction Heterogeneous Permutation.
7. according to claim 1-6 any one of them array substrates, which is characterized in that the scanning signal output line includes head
The sequentially connected traversing section of tail and longitudinal sections；
Wherein, the traversing section is identical with the extending direction of the grid line, the longitudinal sections and the extending direction of the data line
It is identical.
8. array substrate according to claim 6, which is characterized in that the same scanning signal output line is interspersed in adjacent
Position between row pixel circuit, the different scanning signal output lines are interspersed between different adjacent column pixel circuits
Position；
The scanning signal output line is from its tie point with the grid line along the data line extending direction towards connecting the grid
One end extension of pole driving circuit, alternatively, the scanning signal output line is from its tie point with the grid line along the data
Line extending direction extends towards away from the one end for connecting the gate driving circuit, and direction connects the gate driving after bending
One end extension of circuit.
9. array substrate according to claim 7, which is characterized in that
The traversing section of the scanning signal output line and the same material of grid line same layer；
The longitudinal sections of the scanning signal output line and the same material of data line same layer.
10. a kind of display device, which is characterized in that including claim 1-9 any one of them array substrates.
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| CN201721677992.7U CN207517694U (en) | 2017-12-05 | 2017-12-05 | A kind of array substrate and display device |
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| CN111243486A (en) * | 2020-03-09 | 2020-06-05 | Tcl华星光电技术有限公司 | Array substrate and display panel |
| CN111341209A (en) * | 2020-04-08 | 2020-06-26 | Tcl华星光电技术有限公司 | Display panel |
| WO2020147479A1 (en) * | 2019-01-17 | 2020-07-23 | 京东方科技集团股份有限公司 | Array substrate, display panel, and display device |
| CN112384965A (en) * | 2018-06-29 | 2021-02-19 | 京瓷株式会社 | Display device |
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