CN207475427U - Capacitance current bifrequency pulse-sequence control device - Google Patents
Capacitance current bifrequency pulse-sequence control device Download PDFInfo
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- CN207475427U CN207475427U CN201721667800.4U CN201721667800U CN207475427U CN 207475427 U CN207475427 U CN 207475427U CN 201721667800 U CN201721667800 U CN 201721667800U CN 207475427 U CN207475427 U CN 207475427U
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Abstract
The utility model is related to power electronic equipments, especially a kind of capacitance current bifrequency pulse-sequence control device, by limiting switching tube shutdown or the time of conducting and the size of capacitance current peak value or valley, the control to converter switches pipe is completed, realizes the adjusting to exporting branch.Compared with traditional pulse train control switch converters, the utility model has the advantages that output voltage ripple is small, and the combination of pulse cycle is optimal, no low-frequency oscillation and good load transient performance, available for controlling a variety of switch converters, such as：Buck converters, Boost, Buck boost converters, Flyback converters, Forward converters etc..
Description
Technical field
The utility model is related to power electronic equipment, especially a kind of capacitance current bifrequency pulse-sequence control device.
Background technology
Relative to traditional linear stabilized power supply, switch converters are because of the excellent properties such as small, light-weight and efficient
It is used widely.At present, switch converters generally modulate (Pulse Width Modulation, PWM) using pulse width
The control to output voltage is realized with pulse frequency modulated (Pulse Frequency Modulation, PFM) technology.PWM
Modulation technique is a kind of controlling party of constant frequency to realize the control to output voltage by adjusting the width of pulse is controlled
Method has the advantages that feedback control loop design is simple, but there are light-load efficiency is low, dynamic responding speed is slow, electromagnetic interference
The shortcomings of (Electromagnetic Interference, EMI) is serious；PFM modulation techniques control the frequency of pulse by change
For rate to realize the control to output voltage, it solve thes problems, such as that light-load efficiency is low, but since switching frequency is with input electricity
The change of pressure or load and change, thus increase the design difficulty of feedback control loop and electromagnetic interface filter.
Pulse train (Pulse Train, PT) modulation is a kind of and entirely different PWM and PFM modulator approach, it passes through
The height control pulse combined mode that two class frequencys are identical, duty ratio is different is adjusted to realize the adjusting to converter, is a kind of
Nonlinear discrete modulator approach.PT modulation does not need to error amplifier and corresponding compensation network, have controller realize it is simple,
To input and load variation rapid dynamic response speed the advantages that, caused the extensive concern of academia and industrial quarters.When PT is controlled
When converter processed is operated in discontinuous current mode conduction mode (Discontinuous conduction mode, DCM), inductance
Electric current is always zero in a switch periods initial time, thus inductive energy storage variable quantity is zero, and inductance does not influence energy transmission
Process, but the load capacity of DCM switch converters is limited, and inductive current peak is higher and output voltage ripple is larger.When PT is controlled
When converter processed is operated in continuous current mode conduction mode (Continuous conduction mode, CCM), if inductance is electric
Stream is unequal in a switch periods initial time, then inductive energy storage variable quantity is not zero, and inductance will participate in energy transfer process.
Therefore, inductive energy storage variable quantity affects the output voltage of PT control CCM switch converters indirectly, makes controller to output voltage
Adjusting there is hysteresis quality, lead to that low-frequency oscillation occur in switch converters and transient response speed is slower.
For PT control CCM switch converters, there are low-frequency oscillation problems, have scholar and propose valley point current PT controlling parties
Method, capacitance current PT control methods etc..During stable state, the pulse train cycle periods of these control methods is by multiple high impulses and more
A low pulse composition, inductive current and output voltage ripple are big, influence the steady-state behaviour of converter.
Utility model content
The purpose of this utility model is to provide a kind of control method of switch converters, is allowed to overcome existing pulse train control
System is operated in technical disadvantages during continuous current mode conduction mode, and pulse sequence loops period perseverance is " 1 high arteries and veins when having stable state
The combination of+1 low pulse of punching ", inductive current, output voltage steady state ripple are small, stability and strong antijamming capability, load wink
The advantages that state property can be good, suitable for the switch converters of various topological structures.
Technical solution is used by the utility model realizes its purpose of utility model：
Capacitance current bifrequency pulse sequence control method in each switch periods start time, detects output voltage, obtains
To signal Vo, the electric current of output filter capacitor is detected, obtains signal ic；By Vo, switching tube pulse signal VPWith output voltage benchmark
Value VrefIt is sent to the first pulse selector PS1 and generates pulse signal SS and SS1；SS and the first pulse generator PGH is generated
Pulse signal VH1 is sent to the first controlled constant time timer CT1 and generates signal HH；By iC, HH and the first capacitance current base
Quasi- value Iref1It is sent to the first pulse generator PGH and generates pulse signal VH and VH1；SS1 and the second pulse generator PGL is produced
Raw pulse signal VL1 is sent to the second controlled constant time timer CT2 and generates signal LL；By iC, LL and the second capacitance electricity
Flow reference value Iref2It is sent to the second pulse generator PGL and generates pulse signal VL and VL1；VH, VL, SS and SS1 are sent to
Second pulse selector PS2 generates pulse signal VP, to control the turn-on and turn-off of converter switches pipe.
Further, the first capacitance current reference value Iref1It is directly to set for preset capacitance current a reference value
Capacitance current peak value or by input, export feedback quantity generation the capacitance current peak value related with input quantity or output quantity.
The second capacitance current reference value Iref2It is the capacitance current directly set for preset capacitance current a reference value
Valley or the capacitance current valley related with input quantity or output quantity by inputting, exporting feedback quantity generation.
The utility model also provides the capacitance current bifrequency pulse-sequence control device, including voltage detecting circuit VS,
Current detection circuit IS, the first pulse selector PS1, the second pulse selector PS2, the first controlled constant time timer CT1,
Second controlled constant time timer CT2, the first pulse generator PGH, the second pulse generator PGL and driving circuit DR；Institute
The voltage detecting circuit VS stated is connected with the first pulse selector PS1；The output signal SS and first of first pulse selector PS1
Controlled constant time timer CT1 is connected；The output signal SS1 of first pulse selector PS1 and the second controlled constant time count
When device CT2 be connected；First controlled constant time timer CT1 and current detection circuit IS respectively with the first pulse generator PGH
It is connected, the output signal VH1 of PGH is connected with the first controlled constant time timer CTI；Second controlled constant time timer
CT2 and current detection circuit IS is connected respectively with the second pulse generator PGL, the output signal VL1 of the second pulse generator PGL
It is connected with the second controlled constant time timer CT2；Output signal VH, the second pulse generator of first pulse generator PGH
The output signal VL of PGL, the first pulse selector PS1 output signal SS, SS1 be connected respectively with the second pulse selector PS2；
Second pulse selector PS2 is connected respectively with driving circuit DR, the first pulse selector PS1.
Further, the first pulse selector PS1 includes first comparator CMP1 and the first trigger DFF1；Inspection
The output voltage signal V measuredoIt is connected with first comparator CMP1 negative polarity end, output voltage a reference value VrefCompared with first
Device CMP1 positive ends are connected；First comparator CMP1 is connected with the D ends of the first trigger DFF1, switching tube pulse signal VPWith
The C-terminal of first trigger DFF1 is connected.
Further, the second pulse selector PS2 includes first and door AND1, second and door AND2 and/or door
OR；The pulse signal SS and first and door that pulse signal VH, the first pulse selector of first pulse generator PGH generations generate
The input terminal of AND1 is connected；The pulse letter that pulse signal VL, the first pulse selector of second pulse generator PGL generations generate
Number SS1 is connected with second with the input terminal of door AND2；First with the output terminal of door AND1, second and door AND2 with or door OR it is defeated
Enter end to be connected.
Further, the first pulse generator PGH includes the second comparator CMP2 and the second trigger RSFF2；
The capacitance current signal iC detected is connected with the second comparator CMP2 positive ends, the first peak capacitor current a reference value
Iref1 is connected with the second comparator CMP2 negative polarity end；The R of the output terminal of second comparator CMP2 and the second trigger RSFF2
End is connected, and the output signal HH of the first controlled constant time timer CT1 is connected with the S ends of the second trigger RSFF2.
The second pulse generator PGL includes third comparator CMP3 and third trigger RSFF3, the capacitance detected
Current signal iCIt is connected with third comparator CMP3 positive ends, the second peak capacitor current reference signal Iref2Compared with third
Device CMP3 negative polarity end is connected；The output terminal of third comparator CMP3 is connected with the R ends of third trigger RSFF3, and second is controlled
The output signal LL of Time constant timer CT2 is connected with the S ends of third trigger RSFF3.
Further, the first pulse generator PGH includes the second comparator CMP2 and the second trigger RSFF2；
The capacitance current signal i detectedCIt is connected with the second comparator CMP2 negative polarity end, the first terminal valley point capacitance current reference value Iref1
It is connected with the second comparator CMP2 positive ends；The S ends phase of the output terminal of second comparator CMP2 and the second trigger RSFF2
Even, the output signal HH of the first controlled constant time timer CT1 is connected with the R ends of the second trigger RSFF2.
The second pulse generator PGL includes third comparator CMP3 and third trigger RSFF3, the capacitance detected
Current signal iCIt is connected with third comparator CMP3 negative polarity end, the second terminal valley point capacitance current reference signal Iref2Compared with third
Device CMP3 positive ends are connected；The output terminal of third comparator CMP3 is connected with the S ends of third trigger RSFF3, and second is controlled
The output signal LL of Time constant timer CT2 is connected with the R ends of third trigger RSFF3.
The utility model is small with output voltage ripple, and the combination of pulse cycle is optimal, and no low-frequency oscillation shows
As and load transient performance it is good the advantages that, available for controlling a variety of switch converters, such as：Buck converters, Boost transformation
Device, Buck-boost converters, Flyback converters, Forward converters etc..
Compared with prior art, the beneficial effects of the utility model are：
First, the utility model provides a kind of simple and reliable pulse train control for continuous conduction mode switch converters
Method overcomes traditional pulse train control continuous conduction mode switch converters there are the shortcomings that low-frequency oscillation, stability
More preferably, reliability higher.
2nd, pulse sequence control method provided by the utility model when load changes, can be adjusted out quickly
The turn-on and turn-off of pipe are closed, the variable quantity of output voltage is small.
3rd, continuous conduction mode switch converters pulse sequence control method provided by the utility model, pulse train
The combination perseverance of cycle period is "+1 low pulse of 1 high impulse ", and the ripple of inductive current and output voltage is small.
Description of the drawings
Fig. 1 is one controling circuit structure block diagram of the utility model embodiment.
Fig. 2 is the circuit structure block diagram of the first pulse selector PS1 of the utility model embodiment one.
Fig. 3 is the circuit structure block diagram of the second pulse selector PS2 of the utility model embodiment one.
Fig. 4 is the circuit structure block diagram of the first pulse generator PGH of the utility model embodiment one.
Fig. 5 is the circuit structure block diagram of the second pulse generator PGL of the utility model embodiment one.
Fig. 6 is the circuit structure block diagram of the utility model embodiment one.
Main waveform diagram when Fig. 7 is the Buck converter steady operations of the utility model embodiment one.
Fig. 8 (a) is that the Buck converters that the capacitance current PT of the utility model embodiment one is controlled are uprushed in load by 3A
Transient state time-domain-simulation waveform during to 8A；
Fig. 8 (b) is that the Buck converters that the capacitance current PT of the utility model embodiment one is controlled are uprushed in load by 3A
Transient state time-domain-simulation waveform during to 8A.
Fig. 9 (a) is that the Buck converters that the capacitance current PT of the utility model embodiment one is controlled are being loaded by 8A anticlimaxs
Transient state time-domain-simulation waveform during to 3A；
Fig. 9 (b) is that the Buck converters that the capacitance current PT of the utility model embodiment one is controlled are being loaded by 8A anticlimaxs
Transient state time-domain-simulation waveform during to 3A.
Figure 10 is the circuit structure block diagram of the first pulse generator PGH of the utility model embodiment two.
Figure 11 is the circuit structure block diagram of the second pulse generator PGL of the utility model embodiment two.
Main waveform diagram when Figure 12 is the Buck converter steady operations of the utility model embodiment two.
Figure 13 is the circuit structure block diagram of the utility model embodiment three.
Specific embodiment
Further detailed description is done to the utility model below by specific example with reference.
Embodiment one：
Fig. 1 shows that a kind of specific embodiment of the utility model is：Bifrequency capacitance current pulse train control dress
It puts, device is mainly by voltage detecting circuit VS, current detection circuit IS, the first pulse selector PS1, the first pulse selector
PS2, the first controlled constant time timer CT1, the second controlled constant time timer CT2, the first pulse generator PGH,
Two pulse generator PGL and driving circuit DR compositions；In each switch periods start time, the output electricity of detection output branch
Pressure, obtains signal Vo, the filter capacitor electric current of output branch is detected, obtains signal ic；By Vo, switching tube pulse signal VPWith it is defeated
Go out voltage reference value VrefIt is sent to the first pulse selector PS1 and generates pulse signal SS and SS1；By SS and the first pulses generation
The pulse signal VH1 that device PGH is generated is sent to the first controlled constant time timer CT1 and generates signal HH；By iC, HH and first
Capacitance current reference value Iref1It is sent to the first pulse generator PGH and generates pulse signal VH and VH1；By SS1 and the second pulse
The pulse signal VL1 that generator generates is sent to the second controlled constant time timer CT2 and generates signal LL；By iC, LL and
Two capacitance current reference value Isref2It is sent to the second pulse generator PGL and generates pulse signal VL and VL1；By VH, VL, SS and
SS1 is sent to the second pulse selector PS2 and generates pulse signal VP, to control the turn-on and turn-off of converter switches pipe.
Fig. 2 shows the first pulse selector PS1's of this example specifically comprises：It is touched by first comparator CMP1 and first
Send out device DFF1 compositions；The output voltage signal V detectedoIt is connected with first comparator CMP1 negative polarity end, output voltage benchmark
Value VrefIt is connected with first comparator CMP1 positive ends；The D ends of the output terminal of first comparator CMP1 and the first trigger DFF1
It is connected, switching tube pulse signal VpIt is connected with the C-terminal of the first trigger DFF1.
Fig. 3 shows that the second pulse selector PS2's of this example specifically comprises：By first and door AND1, second and door
AND2 and/or door OR compositions；The pulse letter that pulse signal VH, the first pulse selector of first pulse generator PGH generations generate
Number SS is connected with first with the input terminal of door AND1；The pulse signal VL of second pulse generator PGL generations, the first pulse choice
The pulse signal SS1 that device generates is connected with second with the input terminal of door AND2；The output terminal of first and door AND1, second and door
The output terminal of AND2 with or the input terminal of door OR be connected.
Fig. 4 shows that the first pulse generator PGH's of this example specifically comprises：It is touched by the second comparator CMP2 and second
Send out device RSFF2 compositions；The capacitance current signal i detectedCIt is connected with the second comparator CMP2 positive ends, the first peak value capacitance
Current reference value Iref1It is connected with the second comparator CMP2 negative polarity end；The output terminal and the second trigger of second comparator CMP2
The R ends of RSFF2 are connected, the S ends phase of the output signal HH and the second trigger RSFF2 of the first controlled constant time timer CT1
Even.
Fig. 5 shows that the second pulse generator PGL's of this example specifically comprises：It is touched by third comparator CMP3 and third
Send out device RSFF3 compositions；The capacitance current signal i detectedCIt is connected with third comparator CMP3 positive ends, the second peak value capacitance
Current reference value Iref2It is connected with third comparator CMP3 negative polarity end；The output terminal of third comparator CMP3 and third trigger
The R ends of RSFF3 are connected, the S ends phase of the output signal LL and third trigger RSFF3 of the second controlled constant time timer CT2
Even.
This example uses the device of Fig. 6, can easily and quickly realize above-mentioned control method.Fig. 6 shows that this example bifrequency is electric
Capacitance current pulse-sequence control device is made of the control device of converter TD and switching tube S.
Its working process and principle of the device of this example are：
Control device using bifrequency capacitance current pulse train control working process and principle be：Fig. 1-7 shows,
When switch periods start, the output voltage V of samplingoWith output voltage a reference value VrefIt is compared, if output voltage VoLess than defeated
Go out voltage reference value Vref, then the output signal SS of the first pulse selector PS1 be high level, the first controlled constant time timing
Device CT1 starts timing, while the output signal VH of the first pulse generator PGH is low level, and the second pulse selector PS2's is defeated
Go out signal VpFor low level, switching tube S shutdowns, capacitance current iCDecline；By fixed time interval TH, the first controlled constant
Time timer CT1 output signals HH becomes high level, and the output signal VH of the first pulse generator PGH is high level, and second
The output signal V of pulse selector PS2pFor high level, switching tube S conductings, capacitance current iCRise；Work as iCRise to first peak
It is worth capacitance current reference value Iref1When, the output signal VH of the first pulse generator PGH becomes low level, while from high level
The output signal SS of one pulse selector PS1 becomes low level from high level, and switch periods terminate；In this switch periods,
Second controlled constant time timer CT2 is not-time, and the output signal VL of the second pulse generator PGL keeps low level constant；
If output voltage VoMore than output voltage a reference value Vref, then the output signal SS of the first pulse selector PS1 be low level, SS1
For high level, the second Time constant timer CT2 starts timing, and the output signal VL of the second pulse generator PGL is low level,
The output signal V of second pulse selector PS2pFor low level, switching tube S shutdowns, capacitance current iCDecline, by it is fixed when
Between be spaced TL, the second controlled constant time timer CT2 output signals LL becomes high level, and the second pulse generator PGL's is defeated
Go out signal VL and high level, switching tube S conductings, capacitance current i are become from low levelCRise；Work as iCRise to the second peak value capacitance electricity
Flow reference value Iref2When, VL becomes low level from high level, and SS becomes high level from low level, and switch periods terminate；At this
In switch periods, the first controlled constant time timer CT1 is not-time, and the output signal VH of the first pulse generator PGH is kept
Low level is constant.In a switch periods, when signal SS is high level, the second pulse selector PS2 output signals VPIt is high
The low level duration is consistent with pulse signal VH, otherwise consistent with pulse signal VL.
First pulse selector PS1 completes the generation and output of signal SS, SS1：Fig. 2 shows first comparator CMP1 will
Output voltage VoWith output voltage a reference value VrefIt is compared, as output voltage VoLess than output voltage a reference value VrefWhen, first
Comparator CMP1 outputs are high level, conversely, then first comparator CMP1 outputs are low level；Work as VPFailing edge comes temporarily, the
The C-terminal of one trigger DFF1 inputs a failing edge, according to the operation principle of d type flip flop：The Q ends output of first trigger DFF1
The state of signal SS and D ends input signal is consistent, and signal SS is in VPNext failing edge arrive before remain unchanged, the
The level height of the Q1 ends output signal SS1 of one trigger DFF1 is opposite with signal SS always.
Second pulse selector PS2 completes signal VPSelection and output：Fig. 3 is shown, when the input of first and door AND1
Signal SS is high level, and second when with the input signal SS1 of door AND2 being low level, first with the output signal of door AND1 and the
One is consistent with the input signal VH of door AND1, and second keeps low level or door OR output terminals with the output signal of door AND2
Signal VPIt is consistent with first with the output signal of door AND1, i.e. VPIt is consistent with signal VH；Conversely, then VPWith signal
VL is consistent
First pulse generator PGH completes the generation and output of signal VH, VH1：Fig. 4 is shown, when signal HH rising edges come
Temporarily, the S ends input high level of the second trigger RSFF2, according to the operation principle of rest-set flip-flop：The Q of second trigger RSFF2
It is high level to hold output signal VH；Second comparator CMP2 is by capacitance current iCWith the first capacitance current reference signal Iref1It carries out
Compare, as capacitance current iCHigher than Iref1When, the output signal R1 of the second comparator CMP2 is high level, i.e. the second trigger
The R ends input high level of RSFF2, then the Q ends output signal VH of the second trigger RSFF2 low level is become from high level, second
The level height of the Q1 ends output signal VH1 of trigger RSFF2 is opposite with signal VH always.
Second pulse generator PGL completes the generation and output of signal VL, VL1：Fig. 5 shows, the course of work with it is above-mentioned
PGH is similar, is a difference in that：The negative polarity termination the of the S termination signal LL of third trigger RSFF3, third comparator CMP3
Two capacitance current reference signal Iref2, the Q1 ends output signal VL1 of third trigger RSFF3 level height always with signal VL
On the contrary.
The converter TD of this example is Buck converters.
Time-domain-simulation analysis is carried out to the method for this example with PSIM simulation softwares, it is as a result as follows.
Fig. 7 be using the utility model Buck converters in steady operation, output voltage signal Vo, output voltage base
Calibration signal Vref, capacitance current signal iC, the first capacitance current reference signal Iref1, the second capacitance current reference signal Iref2, arteries and veins
Rush signal SS, pulse signal HH, pulse signal LL, pulse signal VH, pulse signal VL and drive signal VPBetween relationship show
It is intended to.It is not deposited it can be seen from the figure that being operated in continuous current mode conduction mode using the Buck converters of the utility model
In low-frequency oscillation.Simulated conditions：Input voltage Vin=14V, voltage reference value Vref=6V, the first capacitance current a reference value
Iref1=1.875A, the second capacitance current reference value Iref2=2A, inductance L=10 μ H, capacitance Co=470 μ F (its equivalent series electricity
Hinder for 1n Ω), load resistance Ro=2 Ω.
Fig. 8 (a), Fig. 8 (b) are the Buck converters controlled using embodiment one and capacitance current PT when loading increase
(Io=3A → 8A) transient state time-domain-simulation waveform, Fig. 8 (a), Fig. 8 (b) correspond to respectively utility model embodiment one and capacitance electricity
Flow PT controls.The load down in 4ms, load current is by 3A Spline smoothings to 8A.It can be seen that from Fig. 8 (a), Fig. 8 (b)：
During using the utility model, output voltage reenters stable state by 7 switch periods, the maximum voltage wave during adjusting
Momentum is 0.07V；During stable state, output voltage ripple 0.02V, and the combination perseverance of pulse train cycle period is " 1 height+1
It is low ".The CCM Buck converters controlled using capacitance current PT, when exporting branch circuit load loading, output voltage also passes through 7
A switch periods reenter stable state, however peak to peak amount of the output voltage during adjusting is 0.357V；Stable state
When, output voltage ripple 0.12V, the combination of pulse train cycle period is " 3 height+4 are low ".
Fig. 9 (a), Fig. 9 (b) are the Buck converters controlled using the utility model embodiment one and capacitance current PT negative
Carry (I when reducingo=8A → 3A) transient state time-domain-simulation waveform, Fig. 9 (a), Fig. 9 (b) correspond to utility model embodiment one respectively
It is controlled with capacitance current PT.It loads and reduces in 8ms, load current is by 8A Spline smoothings to 3A.It can from Fig. 9 (a), Fig. 9 (b)
To find out：During using the utility model, output voltage reenters stable state by 6 switch periods, during adjusting most
Big magnitude of a voltage fluctuation is 0.06V；During stable state, output voltage ripple 0.02V, the combination perseverance of pulse train cycle period is
" 1 height+1 is low ".The CCM Buck converters controlled using capacitance current PT, when exporting branch circuit load off-load, output voltage warp
It crosses 5 switch periods and reenters stable state, however peak to peak amount of the output voltage during adjusting is 0.234V；Surely
During state, output voltage ripple 0.12V, the combination of pulse train cycle period is " 3 height+4 are low ", and during the work time
Pulse train does not work strictly according to the combination of cycle period, and there are the pulse regulation periods.Simulated conditions and Fig. 8
(a), Fig. 8 (b) is consistent.
By Fig. 8 (a), Fig. 8 (b) and Fig. 9 (a), Fig. 9 (b) as it can be seen that the switch converters of the utility model are exported in stable state
The ripple of voltage is small, and the combination of pulse train cycle period is optimal；In load sudden change, the variable quantity of output voltage is small.
Using capacitance current PT control CCM Buck converters output voltage in stable state ripple it is big, pulse train cycle period by
Multiple high impulses and multiple low pulse compositions, combination are not up to optimal；In load sudden change, the variable quantity of output voltage
Greatly.
Embodiment two
The utility model uses embodiment binary signal flow chart as also shown in Figure 1, embodiment and embodiment one basic one
It causes, the capacitance current a reference value being a difference in that in the present embodiment is terminal valley point capacitance current reference value.
Figure 10 is shown：The first pulse generator PGH's of this example specifically comprises：It is touched by the second comparator CMP2 and second
Send out device RSFF2 compositions；The capacitance current signal i detectedCIt is connected with the second comparator CMP2 negative polarity end, the first terminal valley point capacitance
Current reference value Iref1It is connected with the second comparator CMP2 positive ends；The output terminal and the second trigger of second comparator CMP2
The S ends of RSFF2 are connected, the R ends phase of the output signal HH and the second trigger RSFF2 of the first controlled constant time timer CT1
Even.
Figure 11 shows that the course of work of the second pulse generator PGL of this example is similar with above-mentioned PGH, is a difference in that：The
The positive polarity of the R termination signal LL of three trigger RSFF3, third comparator CMP3 terminate the second capacitance current reference signal
Iref2, the Q1 ends output signal VL1 of third trigger RSFF3 level height it is opposite with signal VL always.
Figure 12 shows, the main waveform diagram during Buck converter steady operations of utility model embodiment two.
Embodiment three
As shown in figure 13, the utility model embodiment three and embodiment one are essentially identical, are a difference in that：This example control
Converter TD is Boost.
The utility model is in addition to available for the switch converters in above example, it can also be used to which Buck-Boost is converted
In a variety of circuit topologies such as device, Flyback converters, Forward converters.
Claims (5)
1. capacitance current bifrequency pulse-sequence control device, it is characterised in that：Including voltage detecting circuit VS, current detecting electricity
Road IS, the first pulse selector PS1, the second pulse selector PS2, the first controlled constant time timer CT1, the second controlled perseverance
Fix time timer CT2, the first pulse generator PGH, the second pulse generator PGL and driving circuit DR；The voltage inspection
Slowdown monitoring circuit VS is connected with the first pulse selector PS1；When the output signal SS and the first controlled constant of the first pulse selector PS1
Between timer CT1 be connected；The output signal SS1 of first pulse selector PS1 and the second controlled constant time timer CT2 phases
Even；First controlled constant time timer CT1 and current detection circuit IS is connected respectively with the first pulse generator PGH, PGH's
Output signal VH1 is connected with the first controlled constant time timer CTI；Second controlled constant time timer CT2 and electric current inspection
Slowdown monitoring circuit IS is connected respectively with the second pulse generator PGL, and the output signal VL1 of the second pulse generator PGL and second is controlled
Time constant timer CT2 is connected；The output letter of the output signal VH of first pulse generator PGH, the second pulse generator PGL
Number VL, the first pulse selector PS1 output signal SS, SS1 be connected respectively with the second pulse selector PS2；Second pulse is selected
Device PS2 is selected respectively with driving circuit DR, the first pulse selector PS1 to be connected.
2. capacitance current bifrequency pulse-sequence control device according to claim 1, it is characterised in that：Described first
Pulse selector PS1 includes first comparator CMP1 and the first trigger DFF1；The output voltage signal V detectedoWith first
Comparator CMP1 negative polarity end is connected, output voltage a reference value VrefIt is connected with first comparator CMP1 positive ends；First compares
Device CMP1 is connected with the D ends of the first trigger DFF1, switching tube pulse signal VPIt is connected with the C-terminal of the first trigger DFF1.
3. capacitance current bifrequency pulse-sequence control device according to claim 1, it is characterised in that：Described second
Pulse selector PS2 includes first and door AND1, second and door AND2 and/or door OR；The arteries and veins that first pulse generator PGH is generated
Rush signal VH, the pulse signal SS that the first pulse selector generates is connected with first with the input terminal of door AND1；Second pulse is produced
The input terminal of pulse signal SS1 and second and door AND2 that pulse signal VL, the first pulse selector that raw device PGL is generated generate
It is connected；First with the output terminal of door AND1, second and door AND2 with or the input terminal of door OR be connected.
4. capacitance current bifrequency pulse-sequence control device according to claim 1, it is characterised in that：Described first
Pulse generator PGH includes the second comparator CMP2 and the second trigger RSFF2；The capacitance current signal i detectedCWith second
Comparator CMP2 positive ends are connected, the first peak capacitor current reference value Iref1With the second comparator CMP2 negative polarity end phase
Even；The output terminal of second comparator CMP2 is connected with the R ends of the second trigger RSFF2, the first controlled constant time timer CT1
Output signal HH be connected with the S ends of the second trigger RSFF2；
The second pulse generator PGL includes third comparator CMP3 and third trigger RSFF3, the capacitance current detected
Signal iCIt is connected with third comparator CMP3 positive ends, the second peak capacitor current reference signal Iref2With third comparator
CMP3 negative polarity end is connected；The output terminal of third comparator CMP3 is connected with the R ends of third trigger RSFF3, the second controlled perseverance
The output signal LL of timer CT2 of fixing time is connected with the S ends of third trigger RSFF3.
5. capacitance current bifrequency pulse-sequence control device according to claim 1, it is characterised in that：Described first
Pulse generator PGH includes the second comparator CMP2 and the second trigger RSFF2；The capacitance current signal i detectedCWith second
Comparator CMP2 negative polarity end is connected, the first terminal valley point capacitance current reference value Iref1With the second comparator CMP2 positive ends phases
Even；The output terminal of second comparator CMP2 is connected with the S ends of the second trigger RSFF2, the first controlled constant time timer CT1
Output signal HH be connected with the R ends of the second trigger RSFF2；
The second pulse generator PGL includes third comparator CMP3 and third trigger RSFF3, the capacitance current detected
Signal iCIt is connected with third comparator CMP3 negative polarity end, the second terminal valley point capacitance current reference signal Iref2With third comparator
CMP3 positive ends are connected；The output terminal of third comparator CMP3 is connected with the S ends of third trigger RSFF3, the second controlled perseverance
The output signal LL of timer CT2 of fixing time is connected with the R ends of third trigger RSFF3.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107769606A (en) * | 2017-12-05 | 2018-03-06 | 西南交通大学 | Capacitance current bifrequency pulse sequence control method and its device |
| CN112398342A (en) * | 2021-01-21 | 2021-02-23 | 四川大学 | Frequency conversion control device and method for combined single-inductor dual-output switch converter |
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2017
- 2017-12-05 CN CN201721667800.4U patent/CN207475427U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107769606A (en) * | 2017-12-05 | 2018-03-06 | 西南交通大学 | Capacitance current bifrequency pulse sequence control method and its device |
| CN107769606B (en) * | 2017-12-05 | 2023-10-20 | 西南交通大学 | Capacitive current double-frequency pulse sequence control method and device thereof |
| CN112398342A (en) * | 2021-01-21 | 2021-02-23 | 四川大学 | Frequency conversion control device and method for combined single-inductor dual-output switch converter |
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