CN107769606A - Capacitance current bifrequency pulse sequence control method and its device - Google Patents
Capacitance current bifrequency pulse sequence control method and its device Download PDFInfo
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Abstract
The present invention relates to power electronic equipment, especially a kind of capacitance current bifrequency pulse sequence control method and its device, by limiting the time of switching tube shut-off or conducting, and the size of capacitance current peak value or valley, the control to converter switches pipe is completed, realizes the regulation to exporting branch road.Compared with traditional pulse train controlling switch converter, the present invention has the advantages that output voltage ripple is small, and the combination of pulse cycle is optimal, and no low-frequency oscillation and load transient performance is good, available for a variety of switch converters are controlled, such as：Buck converters, Boost, Buck boost converters, Flyback converters, Forward converters etc..
Description
Technical field
The present invention relates to power electronic equipment, especially a kind of capacitance current bifrequency pulse sequence control method and its dress
Put.
Background technology
Relative to traditional linear stabilized power supply, switch converters are because of the excellent properties such as small volume, in light weight and efficiency is high
It is used widely.At present, switch converters generally use pulse width modulation (Pulse Width Modulation, PWM)
The control to output voltage is realized with pulse frequency modulated (Pulse Frequency Modulation, PFM) technology.PWM
It is a kind of controlling party of constant frequency to realize the control to output voltage that modulation technique, which controls the width of pulse by adjusting,
Method, there is the advantages of feedback control loop design is simple, but have that light-load efficiency is low, dynamic responding speed is slow, electromagnetic interference
The shortcomings of (Electromagnetic Interference, EMI) is serious；PFM modulation techniques control the frequency of pulse by changing
For rate to realize the control to output voltage, it solve thes problems, such as that light-load efficiency is low, but because switching frequency is with input electricity
The change of pressure or load and change, thus add the design difficulty of feedback control loop and electromagnetic interface filter.
Pulse train (Pulse Train, PT) modulation is a kind of and entirely different PWM and PFM modulator approach, and it passes through
Adjusting the height that two class frequencys are identical, dutycycle is different controls pulse combined mode to realize the regulation to converter, is a kind of
Nonlinear discrete modulator approach.PT modulation does not need error amplifier and compensates network accordingly, have controller realize it is simple,
To input and load change rapid dynamic response speed the advantages that, caused the extensive concern of academia and industrial quarters.When PT is controlled
When converter processed is operated in discontinuous current mode conduction mode (Discontinuous conduction mode, DCM), inductance
Electric current is always zero in a switch periods initial time, thus inductive energy storage variable quantity is zero, and inductance does not influence energy transmission
Process, but the load capacity of DCM switch converters is limited, and inductive current peak is higher and output voltage ripple is larger.When PT is controlled
When converter processed is operated in continuous current mode conduction mode (Continuous conduction mode, CCM), if inductance is electric
Stream is unequal in a switch periods initial time, then inductive energy storage variable quantity is not zero, and inductance will participate in energy transfer process.
Therefore, inductive energy storage variable quantity have impact on the output voltage of PT control CCM switch converters indirectly, make controller to output voltage
Regulation there is hysteresis quality, cause that low-frequency oscillation occur in switch converters and transient response speed is slower.
Low-frequency oscillation problem be present for PT control CCM switch converters, existing scholar proposes valley point current PT controlling parties
Method, capacitance current PT control methods etc..During stable state, the pulse train cycle periods of these control methods is by multiple high impulses and more
Individual low pulse composition, inductive current and output voltage ripple are big, influence the steady-state behaviour of converter.
The content of the invention
It is an object of the invention to provide a kind of control method of switch converters, is allowed to overcome existing pulse train control work
Make the technical disadvantages in continuous current mode conduction mode, the pulse sequence loops cycle, perseverance was " 1 high impulse+1 when having stable state
The combination of low pulse ", inductive current, output voltage steady state ripple are small, stability and strong antijamming capability, load transient
Can be good the advantages that, suitable for the switch converters of various topological structures.
The technical scheme adopted by the invention for realizing the object of the invention is：
Capacitance current bifrequency pulse sequence control method, in each switch periods start time, output voltage is detected, is obtained
To signal Vo, the electric current of output filter capacitor is detected, obtains signal ic；By Vo, switching tube pulse signal VPWith output voltage benchmark
Value VrefIt is sent to the first pulse selector PS1 and produces pulse signal SS and SS1；By caused by SS and the first pulse generator PGH
Pulse signal VH1 is sent to the first controlled constant time timer CT1 and produces signal HH；By iC, HH and the first capacitance current base
Quasi- value Iref1It is sent to the first pulse generator PGH and produces pulse signal VH and VH1；SS1 and the second pulse generator PGL is produced
Raw pulse signal VL1 is sent to the second controlled constant time timer CT2 and produces signal LL；By iC, LL and the second electric capacity electricity
Flow reference value Iref2It is sent to the second pulse generator PGL and produces pulse signal VL and VL1；VH, VL, SS and SS1 are sent to
Second pulse selector PS2 produces pulse signal VP, to control the turn-on and turn-off of converter switches pipe.
Further, the first capacitance current reference value Iref1It is directly to set for default capacitance current a reference value
Capacitance current peak value or relevant with input quantity or output quantity capacitance current peak value as caused by inputting, export feedback quantity.
The second capacitance current reference value Iref2It is the capacitance current directly set for default capacitance current a reference value
Valley or relevant with input quantity or output quantity capacitance current valley as caused by inputting, export feedback quantity.
The present invention also provides the device of the capacitance current bifrequency pulse sequence control method, including voltage detecting circuit
VS, current detection circuit IS, the first pulse selector PS1, the second pulse selector PS2, the first controlled constant time timer
CT1, the second controlled constant time timer CT2, the first pulse generator PGH, the second pulse generator PGL and drive circuit
DR；Described voltage detecting circuit VS is connected with the first pulse selector PS1；First pulse selector PS1 output signal SS
It is connected with the first controlled constant time timer CT1；First pulse selector PS1 output signal SS1 and the second controlled constant
Time timer CT2 is connected；First controlled constant time timer CT1 and current detection circuit IS respectively with the first pulses generation
Device PGH is connected, and PGH output signal VH1 is connected with the first controlled constant time timer CTI；Second controlled constant time counted
When device CT2 and current detection circuit IS be connected respectively with the second pulse generator PGL, the second pulse generator PGL output letter
Number VL1 is connected with the second controlled constant time timer CT2；First pulse generator PGH output signal VH, the second pulse production
Raw device PGL output signal VL, the first pulse selector PS1 output signal SS, SS1 respectively with the second pulse selector PS2
It is connected；Second pulse selector PS2 is connected with drive circuit DR, the first pulse selector PS1 respectively.
Further, the first described pulse selector PS1 includes first comparator CMP1 and the first trigger DFF1；Inspection
The output voltage signal V measuredoIt is connected with first comparator CMP1 negative polarity end, output voltage a reference value VrefCompared with first
Device CMP1 positive ends are connected；First comparator CMP1 is connected with the first trigger DFF1 D ends, switching tube pulse signal VPWith
First trigger DFF1 C-terminal is connected.
Further, the second described pulse selector PS2 includes first and door AND1, second and door AND2 and OR gate
OR；Pulse signal VH caused by first pulse generator PGH, pulse signal SS and first and door caused by the first pulse selector
AND1 input is connected；Pulse signal VL caused by second pulse generator PGL, pulse letter caused by the first pulse selector
Number SS1 is connected with second with door AND2 input；First is defeated with door AND1, second and door AND2 output end and OR gate OR
Enter end to be connected.
Further, the first described pulse generator PGH includes the second comparator CMP2 and the second trigger RSFF2；
The capacitance current signal iC detected is connected with the second comparator CMP2 positive ends, the first peak capacitor current a reference value
Iref1 is connected with the second comparator CMP2 negative polarity end；Second comparator CMP2 output end and the second trigger RSFF2 R
End is connected, and the first controlled constant time timer CT1 output signal HH is connected with the second trigger RSFF2 S ends.
The second pulse generator PGL includes the 3rd comparator CMP3 and the 3rd trigger RSFF3, the electric capacity detected
Current signal iCIt is connected with the 3rd comparator CMP3 positive ends, the second peak capacitor current reference signal Iref2Compared with the 3rd
Device CMP3 negative polarity end is connected；3rd comparator CMP3 output end is connected with the 3rd trigger RSFF3 R ends, and second is controlled
Time constant timer CT2 output signal LL is connected with the 3rd trigger RSFF3 S ends.
Further, the first described pulse generator PGH includes the second comparator CMP2 and the second trigger RSFF2；
The capacitance current signal i detectedCIt is connected with the second comparator CMP2 negative polarity end, the first terminal valley point capacitance current reference value Iref1
It is connected with the second comparator CMP2 positive ends；Second comparator CMP2 output end and the second trigger RSFF2 S ends phase
Even, the first controlled constant time timer CT1 output signal HH is connected with the second trigger RSFF2 R ends.
The second pulse generator PGL includes the 3rd comparator CMP3 and the 3rd trigger RSFF3, the electric capacity detected
Current signal iCIt is connected with the 3rd comparator CMP3 negative polarity end, the second terminal valley point capacitance current reference signal Iref2Compared with the 3rd
Device CMP3 positive ends are connected；3rd comparator CMP3 output end is connected with the 3rd trigger RSFF3 S ends, and second is controlled
Time constant timer CT2 output signal LL is connected with the 3rd trigger RSFF3 R ends.
The present invention have output voltage ripple it is small, the combination of pulse cycle is optimal, no low-frequency oscillation with
And load transient performance it is good the advantages that, available for a variety of switch converters are controlled, such as：Buck converters, Boost,
Buck-boost converters, Flyback converters, Forward converters etc..
Compared with prior art, the beneficial effects of the invention are as follows：
First, the present invention provides a kind of simple and reliable pulse train controlling party for continuous conduction mode switch converters
Method, overcome traditional pulse train control continuous conduction mode switch converters and the shortcomings that low-frequency oscillation be present, stability is more
Good, reliability is higher.
2nd, pulse sequence control method provided by the present invention, being capable of quick regulation switching tube when load changes
Turn-on and turn-off, the variable quantity of output voltage is small.
3rd, continuous conduction mode switch converters pulse sequence control method provided by the present invention, pulse train circulation
The combination perseverance in cycle is "+1 low pulse of 1 high impulse ", and the ripple of inductive current and output voltage is small.
Brief description of the drawings
Fig. 1 is the circuit structure block diagram of the control method of the embodiment of the present invention one.
Fig. 2 is the first pulse selector PS1 of the embodiment of the present invention one circuit structure block diagram.
Fig. 3 is the second pulse selector PS2 of the embodiment of the present invention one circuit structure block diagram.
Fig. 4 is the first pulse generator PGH of the embodiment of the present invention one circuit structure block diagram.
Fig. 5 is the second pulse generator PGL of the embodiment of the present invention one circuit structure block diagram.
Fig. 6 is the circuit structure block diagram of the embodiment of the present invention one.
Main waveform diagram when Fig. 7 is the Buck converter steady operations of the embodiment of the present invention one.
Fig. 8 (a) is that the Buck converters that the capacitance current PT of the embodiment of the present invention one is controlled are uprushed to 8A in load by 3A
When transient state time-domain-simulation waveform；
Fig. 8 (b) is that the Buck converters that the capacitance current PT of the embodiment of the present invention one is controlled are uprushed to 8A in load by 3A
When transient state time-domain-simulation waveform.
Fig. 9 (a) is that the Buck converters that the capacitance current PT of the embodiment of the present invention one is controlled are being loaded by 8A anticlimaxs to 3A
When transient state time-domain-simulation waveform；
Fig. 9 (b) is that the Buck converters that the capacitance current PT of the embodiment of the present invention one is controlled are being loaded by 8A anticlimaxs to 3A
When transient state time-domain-simulation waveform.
Figure 10 is the first pulse generator PGH of the embodiment of the present invention two circuit structure block diagram.
Figure 11 is the second pulse generator PGL of the embodiment of the present invention two circuit structure block diagram.
Main waveform diagram when Figure 12 is the Buck converter steady operations of the embodiment of the present invention two.
Figure 13 is the circuit structure block diagram of the embodiment of the present invention three.
Embodiment
Further detailed description is done to the present invention below by specific example with reference.
Embodiment one：
Fig. 1 shows that a kind of embodiment of the invention is：Bifrequency capacitance current pulse sequence control method and its
Device, its device is mainly by voltage detecting circuit VS, current detection circuit IS, the first pulse selector PS1, the first pulse choice
Device PS2, the first controlled constant time timer CT1, the second controlled constant time timer CT2, the first pulse generator PGH,
Second pulse generator PGL and drive circuit DR compositions；In each switch periods start time, the output electricity of detection output branch road
Pressure, obtains signal Vo, the filter capacitor electric current of detection output branch road, obtain signal ic；By Vo, switching tube pulse signal VPWith it is defeated
Go out voltage reference value VrefIt is sent to the first pulse selector PS1 and produces pulse signal SS and SS1；By SS and the first pulses generation
Pulse signal VH1 caused by device PGH is sent to the first controlled constant time timer CT1 and produces signal HH；By iC, HH and first
Capacitance current reference value Iref1It is sent to the first pulse generator PGH and produces pulse signal VH and VH1；By SS1 and the second pulse
Pulse signal VL1 caused by generator is sent to the second controlled constant time timer CT2 and produces signal LL；By iC, LL and
Two capacitance current reference value Isref2It is sent to the second pulse generator PGL and produces pulse signal VL and VL1；By VH, VL, SS and
SS1 is sent to the second pulse selector PS2 and produces pulse signal VP, to control the turn-on and turn-off of converter switches pipe.
Fig. 2 shows that the first pulse selector PS1's of this example specifically comprises：Touched by first comparator CMP1 and first
Send out device DFF1 compositions；The output voltage signal V detectedoIt is connected with first comparator CMP1 negative polarity end, output voltage benchmark
Value VrefIt is connected with first comparator CMP1 positive ends；First comparator CMP1 output end and the first trigger DFF1 D ends
It is connected, switching tube pulse signal VpIt is connected with the first trigger DFF1 C-terminal.
Fig. 3 shows that the second pulse selector PS2's of this example specifically comprises：By first and door AND1, second and door
AND2 and OR gate OR compositions；Pulse signal VH caused by first pulse generator PGH, pulse letter caused by the first pulse selector
Number SS is connected with first with door AND1 input；Pulse signal VL, the first pulse choice caused by second pulse generator PGL
Pulse signal SS1 is connected with second with door AND2 input caused by device；First and door AND1 output end, second and door
AND2 output end is connected with OR gate OR input.
Fig. 4 shows that the first pulse generator PGH's of this example specifically comprises：Touched by the second comparator CMP2 and second
Send out device RSFF2 compositions；The capacitance current signal i detectedCIt is connected with the second comparator CMP2 positive ends, the first peak value electric capacity
Current reference value Iref1It is connected with the second comparator CMP2 negative polarity end；Second comparator CMP2 output end and the second trigger
RSFF2 R ends are connected, the first controlled constant time timer CT1 output signal HH and the second trigger RSFF2 S ends phase
Even.
Fig. 5 shows that the second pulse generator PGL's of this example specifically comprises：Touched by the 3rd comparator CMP3 and the 3rd
Send out device RSFF3 compositions；The capacitance current signal i detectedCIt is connected with the 3rd comparator CMP3 positive ends, the second peak value electric capacity
Current reference value Iref2It is connected with the 3rd comparator CMP3 negative polarity end；3rd comparator CMP3 output end and the 3rd trigger
RSFF3 R ends are connected, the second controlled constant time timer CT2 output signal LL and the 3rd trigger RSFF3 S ends phase
Even.
This example uses Fig. 6 device, can easily and quickly realize above-mentioned control method.Fig. 6 shows that this example bifrequency is electric
The device of capacitance current pulse sequence control method, it is made up of converter TD and switching tube S control device.
Its working process and principle of the device of this example are：
Control device using bifrequency capacitance current pulse train control working process and principle be：Fig. 1-7 shows,
When switch periods start, the output voltage V of samplingoWith output voltage a reference value VrefIt is compared, if output voltage VoLess than defeated
Go out voltage reference value Vref, then the first pulse selector PS1 output signal SS is high level, the first controlled constant time timing
Device CT1 starts timing, while the first pulse generator PGH output signal VH is low level, and the second pulse selector PS2's is defeated
Go out signal VpFor low level, switching tube S shut-offs, capacitance current iCDecline；By fixed time interval TH, the first controlled constant
Time timer CT1 output signals HH is changed into high level, and the first pulse generator PGH output signal VH is high level, and second
Pulse selector PS2 output signal VpFor high level, switching tube S conductings, capacitance current iCRise；Work as iCRise to first peak
It is worth capacitance current reference value Iref1When, the first pulse generator PGH output signal VH is changed into low level, while from high level
One pulse selector PS1 output signal SS is changed into low level from high level, and switch periods terminate；In this switch periods,
Second controlled constant time timer CT2 is not-time, and the second pulse generator PGL output signal VL keeps low level constant；
If output voltage VoMore than output voltage a reference value Vref, then the first pulse selector PS1 output signal SS is low level, SS1
For high level, the second Time constant timer CT2 starts timing, and the second pulse generator PGL output signal VL is low level,
Second pulse selector PS2 output signal VpFor low level, switching tube S shut-offs, capacitance current iCDecline, by it is fixed when
Between be spaced TL, the second controlled constant time timer CT2 output signals LL is changed into high level, and the second pulse generator PGL's is defeated
Go out signal VL and high level, switching tube S conductings, capacitance current i are changed into from low levelCRise；Work as iCRise to the second peak value electric capacity electricity
Flow reference value Iref2When, VL is changed into low level from high level, and SS is changed into high level from low level, and switch periods terminate；At this
In switch periods, the first controlled constant time timer CT1 is not-time, and the first pulse generator PGH output signal VH is kept
Low level is constant.In a switch periods, when signal SS is high level, the second pulse selector PS2 output signals VPIt is high
The low level duration is consistent with pulse signal VH, otherwise consistent with pulse signal VL.
First pulse selector PS1 completes signal SS, SS1 generation and output：Fig. 2 shows that first comparator CMP1 will
Output voltage VoWith output voltage a reference value VrefIt is compared, as output voltage VoLess than output voltage a reference value VrefWhen, first
Comparator CMP1 outputs are high level, conversely, then first comparator CMP1 outputs are low level；Work as VPTrailing edge comes temporarily, the
One trigger DFF1 C-terminal inputs a trailing edge, according to the operation principle of d type flip flop：First trigger DFF1 Q ends output
The state of signal SS and D ends input signal is consistent, and signal SS is in VPNext trailing edge arrive before keep constant, the
One trigger DFF1 Q1 ends output signal SS1 level height is opposite with signal SS all the time.
Second pulse selector PS2 completes signal VPSelection and output：Fig. 3 is shown, when first and door AND1 input
Signal SS is high level, when second and door AND2 input signal SS1 be low level, first with door AND1 output signal and the
One is consistent with door AND1 input signal VH, and second keeps low level, OR gate OR output ends with door AND2 output signal
Signal VPIt is consistent with first with door AND1 output signal, i.e. VPIt is consistent with signal VH；Conversely, then VPWith signal
VL is consistent
First pulse generator PGH completes signal VH, VH1 generation and output：Fig. 4 is shown, when signal HH rising edges come
Temporarily, the second trigger RSFF2 S ends input high level, according to the operation principle of rest-set flip-flop：Second trigger RSFF2 Q
It is high level to hold output signal VH；Second comparator CMP2 is by capacitance current iCWith the first capacitance current reference signal Iref1Carry out
Compare, as capacitance current iCHigher than Iref1When, the second comparator CMP2 output signal R1 is high level, i.e. the second trigger
RSFF2 R ends input high level, then the second trigger RSFF2 Q ends output signal VH low level is changed into from high level, second
Trigger RSFF2 Q1 ends output signal VH1 level height is opposite with signal VH all the time.
Second pulse generator PGL completes signal VL, VL1 generation and output：Fig. 5 shows, its course of work with it is above-mentioned
PGH is similar, is a difference in that：3rd trigger RSFF3 S termination signal LL, the 3rd comparator CMP3 negative polarity termination the
Two capacitance current reference signal Iref2, the 3rd trigger RSFF3 Q1 ends output signal VL1 level height all the time with signal VL
Conversely.
The converter TD of this example is Buck converters.
Time-domain-simulation analysis is carried out to the method for this example with PSIM simulation softwares, it is as a result as follows.
Fig. 7 is the output voltage signal V using Buck converters of the invention in steady operationo, output voltage benchmark letter
Number Vref, capacitance current signal iC, the first capacitance current reference signal Iref1, the second capacitance current reference signal Iref2, pulse letter
Number SS, pulse signal HH, pulse signal LL, pulse signal VH, pulse signal VL and drive signal VPBetween relation schematic diagram.
It can be seen that being operated in continuous current mode conduction mode using the Buck converters of the present invention is not present low-frequency oscillation
Phenomenon.Simulated conditions：Input voltage Vin=14V, voltage reference value Vref=6V, the first capacitance current reference value Iref1=
1.875A, the second capacitance current reference value Iref2=2A, inductance L=10 μ H, electric capacity Co(its equivalent series resistance is 1n to=470 μ F
Ω), load resistance Ro=2 Ω.
Fig. 8 (a), Fig. 8 (b) are to be increased using the embodiment of the present invention one and capacitance current PT the Buck converters controlled in load
Added-time (Io=3A → 8A) transient state time-domain-simulation waveform, Fig. 8 (a), Fig. 8 (b) correspond to respectively inventive embodiments one and electric capacity electricity
Flow PT controls.The load down in 4ms, load current is by 3A Spline smoothings to 8A.It can be seen that from Fig. 8 (a), Fig. 8 (b)：
During using the present invention, output voltage reenters stable state by 7 switch periods, the peak to peak amount during regulation
For 0.07V；During stable state, output voltage ripple 0.02V, and the combination of pulse train cycle period is permanent for " 1 height+1 is low ".
The CCM Buck converters controlled using capacitance current PT, when exporting branch circuit load loading, output voltage also passes through 7 and opened
The pass cycle reenters stable state, but peak to peak amount of the output voltage during regulation is 0.357V；It is defeated during stable state
It is 0.12V to go out voltage ripple, and the combination of pulse train cycle period is " 3 height+4 are low ".
Fig. 9 (a), Fig. 9 (b) are to be subtracted using the embodiment of the present invention one and capacitance current PT the Buck converters controlled in load
Hour (Io=8A → 3A) transient state time-domain-simulation waveform, Fig. 9 (a), Fig. 9 (b) correspond to respectively inventive embodiments one and electric capacity electricity
Flow PT controls.Load and reduce in 8ms, load current is by 8A Spline smoothings to 3A.It can be seen that from Fig. 9 (a), Fig. 9 (b)：
During using the present invention, output voltage reenters stable state by 6 switch periods, the peak to peak amount during regulation
For 0.06V；During stable state, output voltage ripple 0.02V, the permanent combination of pulse train cycle period is " 1 height+1 is low ".Adopt
The CCM Buck converters controlled with capacitance current PT, when exporting branch circuit load off-load, output voltage passes through 5 switch periods
Stable state is reentered, but peak to peak amount of the output voltage during regulation is 0.234V；During stable state, output voltage
Ripple is 0.12V, and the combination of pulse train cycle period is " 3 height+4 are low ", and pulse train is not in the course of the work
Strictly the combination according to cycle period is operated, and the pulse regulation cycle be present.Simulated conditions and Fig. 8 (a), Fig. 8 (b) one
Cause.
From Fig. 8 (a), Fig. 8 (b) and Fig. 9 (a), Fig. 9 (b), the switch converters of the invention output voltage in stable state
Ripple it is small, the combination of pulse train cycle period is optimal；In load changing, the variable quantity of output voltage is small.Using
The ripple of CCM Buck converters output voltage in stable state of capacitance current PT controls is big, and pulse train cycle period is by multiple
High impulse and multiple low pulse compositions, combination are not up to optimal；In load changing, the variable quantity of output voltage is big.
Embodiment two
The present invention uses the signal flow graph of the method for embodiment two as also shown in Figure 1, and embodiment and embodiment one are basic
Unanimously, the capacitance current a reference value being a difference in that in the present embodiment is terminal valley point capacitance current reference value.
Figure 10 is shown：The first pulse generator PGH's of this example specifically comprises：Touched by the second comparator CMP2 and second
Send out device RSFF2 compositions；The capacitance current signal i detectedCIt is connected with the second comparator CMP2 negative polarity end, the first terminal valley point capacitance
Current reference value Iref1It is connected with the second comparator CMP2 positive ends；Second comparator CMP2 output end and the second trigger
RSFF2 S ends are connected, the first controlled constant time timer CT1 output signal HH and the second trigger RSFF2 R ends phase
Even.
Figure 11 shows that the second pulse generator PGL of this example course of work is similar with above-mentioned PGH, is a difference in that：The
Three trigger RSFF3 R termination signals LL, the 3rd comparator CMP3 positive polarity terminate the second capacitance current reference signal
Iref2, the 3rd trigger RSFF3 Q1 ends output signal VL1 level height it is opposite with signal VL all the time.
Figure 12 shows, the main waveform diagram during Buck converter steady operations of inventive embodiments two.
Embodiment three
As shown in figure 13, the embodiment of the present invention three and embodiment one are essentially identical, are a difference in that：The conversion of this example control
Device TD is Boost.
The present invention is in addition to the switch converters in available for above example, it can also be used to One Buck-Boost converter body,
In a variety of circuit topologies such as Flyback converters, Forward converters.
Claims (8)
1. capacitance current bifrequency pulse sequence control method, it is characterised in that：In each switch periods start time, detection is defeated
Go out voltage, obtain signal Vo, the electric current of output filter capacitor is detected, obtains signal ic；By Vo, switching tube pulse signal VPWith it is defeated
Go out voltage reference value VrefIt is sent to the first pulse selector PS1 and produces pulse signal SS and SS1；By SS and the first pulses generation
Pulse signal VH1 caused by device PGH is sent to the first controlled constant time timer CT1 and produces signal HH；By iC, HH and first
Capacitance current reference value Iref1It is sent to the first pulse generator PGH and produces pulse signal VH and VH1；By SS1 and the second pulse
Pulse signal VL1 caused by generator PGL is sent to the second controlled constant time timer CT2 and produces signal LL；By iC, LL and
Second capacitance current reference value Iref2It is sent to the second pulse generator PGL and produces pulse signal VL and VL1；By VH, VL, SS and
SS1 is sent to the second pulse selector PS2 and produces pulse signal VP, to control the turn-on and turn-off of converter switches pipe.
2. capacitance current bifrequency pulse sequence control method according to claim 1, it is characterised in that：First electricity
Capacitance current reference value Iref1With the second capacitance current reference value Iref2It is the electricity directly set for default capacitance current a reference value
Capacitance current peak value or relevant with input quantity or output quantity capacitance current peak value as caused by inputting, export feedback quantity.
3. capacitance current bifrequency pulse sequence control method according to claim 1, it is characterised in that：First electricity
Capacitance current reference value Iref1With the second capacitance current reference value Iref2It is the electricity directly set for default capacitance current a reference value
Capacitance current valley or relevant with input quantity or output quantity capacitance current valley as caused by inputting, export feedback quantity.
4. the device of the capacitance current bifrequency pulse sequence control method according to any one of Claim 1-3, its feature
It is：Including voltage detecting circuit VS, current detection circuit IS, the first pulse selector PS1, the second pulse selector PS2,
One controlled constant time timer CT1, the second controlled constant time timer CT2, the first pulse generator PGH, the second pulse
Generator PGL and drive circuit DR；Described voltage detecting circuit VS is connected with the first pulse selector PS1；First pulse is selected
The output signal SS for selecting device PS1 is connected with the first controlled constant time timer CT1；First pulse selector PS1 output letter
Number SS1 is connected with the second controlled constant time timer CT2；First controlled constant time timer CT1 and current detection circuit
IS is connected with the first pulse generator PGH respectively, PGH output signal VH1 and the first controlled constant time timer CTI phases
Even；Second controlled constant time timer CT2 and current detection circuit IS is connected with the second pulse generator PGL respectively, and second
Pulse generator PGL output signal VL1 is connected with the second controlled constant time timer CT2；First pulse generator PGH's
Output signal VH, the second pulse generator PGL output signal VL, the first pulse selector PS1 output signal SS, SS1 point
It is not connected with the second pulse selector PS2；Second pulse selector PS2 respectively with drive circuit DR, the first pulse selector PS1
It is connected.
5. the device of capacitance current bifrequency pulse sequence control method according to claim 4, it is characterised in that：It is described
The first pulse selector PS1 include first comparator CMP1 and the first trigger DFF1；The output voltage signal V detectedo
It is connected with first comparator CMP1 negative polarity end, output voltage a reference value VrefIt is connected with first comparator CMP1 positive ends；The
One comparator CMP1 is connected with the first trigger DFF1 D ends, switching tube pulse signal VPWith the first trigger DFF1 C-terminal phase
Even.
6. the device of capacitance current bifrequency pulse sequence control method according to claim 4, it is characterised in that：It is described
The second pulse selector PS2 include first with door AND1, second and door AND2 and OR gate OR；First pulse generator PGH is produced
Pulse signal SS caused by raw pulse signal VH, the first pulse selector is connected with first with door AND1 input；Second
Pulse signal VL caused by pulse generator PGL, pulse signal SS1 and second caused by the first pulse selector and door AND2
Input is connected；First is connected with door AND1, second and door AND2 output end with OR gate OR input.
7. the device of capacitance current bifrequency pulse sequence control method according to claim 4, it is characterised in that：It is described
The first pulse generator PGH include the second comparator CMP2 and the second trigger RSFF2；The capacitance current signal i detectedC
It is connected with the second comparator CMP2 positive ends, the first peak capacitor current reference value Iref1With the second comparator CMP2 negative polarity
End is connected；Second comparator CMP2 output end is connected with the second trigger RSFF2 R ends, the first controlled constant time timing
Device CT1 output signal HH is connected with the second trigger RSFF2 S ends；
The second pulse generator PGL includes the 3rd comparator CMP3 and the 3rd trigger RSFF3, the capacitance current detected
Signal iCIt is connected with the 3rd comparator CMP3 positive ends, the second peak capacitor current reference signal Iref2With the 3rd comparator
CMP3 negative polarity end is connected；3rd comparator CMP3 output end is connected with the 3rd trigger RSFF3 R ends, the second controlled perseverance
The timer CT2 output signal LL of fixing time is connected with the 3rd trigger RSFF3 S ends.
8. the device of capacitance current bifrequency pulse sequence control method according to claim 4, it is characterised in that：It is described
The first pulse generator PGH include the second comparator CMP2 and the second trigger RSFF2；The capacitance current signal i detectedC
It is connected with the second comparator CMP2 negative polarity end, the first terminal valley point capacitance current reference value Iref1With the second comparator CMP2 positive polaritys
End is connected；Second comparator CMP2 output end is connected with the second trigger RSFF2 S ends, the first controlled constant time timing
Device CT1 output signal HH is connected with the second trigger RSFF2 R ends；
The second pulse generator PGL includes the 3rd comparator CMP3 and the 3rd trigger RSFF3, the capacitance current detected
Signal iCIt is connected with the 3rd comparator CMP3 negative polarity end, the second terminal valley point capacitance current reference signal Iref2With the 3rd comparator
CMP3 positive ends are connected；3rd comparator CMP3 output end is connected with the 3rd trigger RSFF3 S ends, the second controlled perseverance
The timer CT2 output signal LL of fixing time is connected with the 3rd trigger RSFF3 R ends.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112152433A (en) * | 2020-11-12 | 2020-12-29 | 湖北英特利电气有限公司 | Combined continuous conduction mode single-inductor double-output switch converter frequency conversion control device |
| CN113315374A (en) * | 2021-05-28 | 2021-08-27 | 电子科技大学 | Duty ratio modulation pulse sequence control method and device based on Buck converter |
Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020125869A1 (en) * | 2001-03-09 | 2002-09-12 | Groom Terry J. | Self-clocking multiphase power supply controller |
| CN101505098A (en) * | 2008-12-31 | 2009-08-12 | 西南交通大学 | Multi-stage pulse sequence control method of pseudo-continuous working mode and apparatus thereof |
| CN101777832A (en) * | 2010-01-19 | 2010-07-14 | 西南交通大学 | Single-loop pulse regulating and controlling method and device of pseudo continuous mode switch power supply |
| CN101814832A (en) * | 2010-04-12 | 2010-08-25 | 西南交通大学 | Improved pulse sequence control method of switch power supply and device thereof |
| US20130051090A1 (en) * | 2011-03-10 | 2013-02-28 | Hangzhou Silan Microelectronics Co., Ltd. | Current reference generating circuit and a constant current switch mode power supply control circuit and method thereof |
| CN103236790A (en) * | 2013-03-28 | 2013-08-07 | 西南交通大学 | Method and device for controlling half-hysteresis ring pulse sequences of switching power supply in continuous working mode |
| CN104052280A (en) * | 2014-06-15 | 2014-09-17 | 西南交通大学 | Multi-valley point current type impulse sequence control method and device for continuous operating mode switching power supply |
| CN203933397U (en) * | 2014-06-15 | 2014-11-05 | 西南交通大学 | Many valley point currents type pulse-sequence control device of continuous operation mode Switching Power Supply |
| US20160181789A1 (en) * | 2014-12-19 | 2016-06-23 | Ziehl-Abegg Se | Protection circuit for an inverter as well as inverter system |
| CN207475427U (en) * | 2017-12-05 | 2018-06-08 | 西南交通大学 | Capacitance current bifrequency pulse-sequence control device |
-
2017
- 2017-12-05 CN CN201711264863.XA patent/CN107769606B/en active Active
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020125869A1 (en) * | 2001-03-09 | 2002-09-12 | Groom Terry J. | Self-clocking multiphase power supply controller |
| CN101505098A (en) * | 2008-12-31 | 2009-08-12 | 西南交通大学 | Multi-stage pulse sequence control method of pseudo-continuous working mode and apparatus thereof |
| CN101777832A (en) * | 2010-01-19 | 2010-07-14 | 西南交通大学 | Single-loop pulse regulating and controlling method and device of pseudo continuous mode switch power supply |
| CN101814832A (en) * | 2010-04-12 | 2010-08-25 | 西南交通大学 | Improved pulse sequence control method of switch power supply and device thereof |
| US20130051090A1 (en) * | 2011-03-10 | 2013-02-28 | Hangzhou Silan Microelectronics Co., Ltd. | Current reference generating circuit and a constant current switch mode power supply control circuit and method thereof |
| CN103236790A (en) * | 2013-03-28 | 2013-08-07 | 西南交通大学 | Method and device for controlling half-hysteresis ring pulse sequences of switching power supply in continuous working mode |
| CN104052280A (en) * | 2014-06-15 | 2014-09-17 | 西南交通大学 | Multi-valley point current type impulse sequence control method and device for continuous operating mode switching power supply |
| CN203933397U (en) * | 2014-06-15 | 2014-11-05 | 西南交通大学 | Many valley point currents type pulse-sequence control device of continuous operation mode Switching Power Supply |
| US20160181789A1 (en) * | 2014-12-19 | 2016-06-23 | Ziehl-Abegg Se | Protection circuit for an inverter as well as inverter system |
| CN207475427U (en) * | 2017-12-05 | 2018-06-08 | 西南交通大学 | Capacitance current bifrequency pulse-sequence control device |
Non-Patent Citations (1)
| Title |
|---|
| 沙金;许建平;许丽君;钟曙;: "电流型脉冲序列控制Buck变换器工作在电感电流连续导电模式时的多周期行为", 物理学报, no. 24 * |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112152433A (en) * | 2020-11-12 | 2020-12-29 | 湖北英特利电气有限公司 | Combined continuous conduction mode single-inductor double-output switch converter frequency conversion control device |
| CN113315374A (en) * | 2021-05-28 | 2021-08-27 | 电子科技大学 | Duty ratio modulation pulse sequence control method and device based on Buck converter |
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|---|---|
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