CN207199602U

CN207199602U - A kind of encapsulating structure and terminal box

Info

Publication number: CN207199602U
Application number: CN201721185435.3U
Authority: CN
Inventors: 邵志峰; 吴泽星; 吴志伟
Original assignee: Wuxi China Resources Huajing Microelectronics Co Ltd
Current assignee: Wuxi China Resources Huajing Microelectronics Co Ltd
Priority date: 2017-09-15
Filing date: 2017-09-15
Publication date: 2018-04-06
Anticipated expiration: 2027-09-15

Abstract

The utility model, which provides a kind of encapsulating structure and terminal box, the encapsulating structure, to be included：Insulation shell；At least three chip Ji Dao, each chip Ji Dao are packaged in insulation shell, and each chip Ji Dao is set along insulation shell length direction spacing side by side；Being set on each chip Ji Dao has chip.The encapsulating structure can distribute heat caused by each chip operation quickly, can improve the radiating effect of encapsulating structure.The terminal box, including housing, the housing is interior to set above-mentioned encapsulating structure, and the terminal box has preferable radiating effect.

Description

A kind of encapsulating structure and terminal box

Technical field

It the utility model is related to technical field of integrated circuits, more particularly to a kind of encapsulating structure and terminal box.

Background technology

Encapsulating structure can be used as integrated circuit component, be connected with other outside lines or external device (ED), when in encapsulating structure Each chip operation when can generate heat, because the connected mode between each chip is relatively fixed, the size of encapsulating structure is also fixed , the heat-dissipating space of existing encapsulating structure is restricted, and therefore, radiating effect is bad.

Terminal box is the device for being attached external device (ED) and outside line, and circuit element (example can be set in terminal box Such as, above-mentioned encapsulating structure), circuit element can generate heat in the course of the work, if caused heat can not distribute in time, can lead The rise of junction box temperature is caused, if terminal box is chronically in internal high temperature working environment, easily causes its in terminal box His circuit or electronic component damage, therefore, the normal operation of the heat-sinking capability docking line box of circuit element itself have important Effect, because the self-radiating of above-mentioned encapsulating structure is ineffective, therefore, when it is arranged in terminal box, causes terminal box Heat-sinking capability is poor.

Utility model content

For the problems of the prior art, one side of the present utility model provides a kind of encapsulating structure, the encapsulating structure Including：

Insulation shell；

At least three chip Ji Dao, each chip Ji Dao are packaged in the insulation shell, each chip Ji Dao edges The insulation shell length direction spacing side by side is set；

Chip is provided with each chip Ji Dao.

Optionally, each chip Ji Dao has the first pin extended outside the insulation shell.

Optionally, the first pole of the chip electrically connects with the chip Ji Dao；

Also include separately positioned the first pin extended outside the insulation shell along the insulation shell width And second pin, separately positioned first pin and second pin are electrically connected by the first bonding jumper, and first gold medal Category bar electrically connects with the second pole of chip one of them described.

Optionally, connected respectively by the second bonding jumper between the every two adjacent chips.

Optionally, separately positioned first pin and second pin are separately positioned on along the insulation shell length side To the both sides of the chip Ji Dao close to the lateral edges of insulation shell one.

Optionally, the encapsulating structure, in addition to：Separately positioned upper connection sheet and lower connection sheet；

The first separately positioned pin and second pin are prolonged by one end of the upper connection sheet and lower connection sheet respectively Stretch to be formed；

The both ends of first bonding jumper electrically connect with the upper connection sheet and the lower connection sheet respectively.

Optionally, the upper connection sheet and lower connection sheet are separately positioned on along the insulation shell length direction close to described The chip Ji Dao of the lateral edges of insulation shell one both sides.

Optionally, the first end of first bonding jumper electrically connects with the upper connection sheet, in first bonding jumper Between part with along the insulation shell length direction close to the diode chip for backlight unit of the lateral edges of insulation shell one second Pole electrically connects, and the second end of first bonding jumper electrically connects with the lower connection sheet.

Optionally, the chip Ji Dao along the insulation shell length direction close to another lateral edges of the insulation shell Also there is the second pin for extending the insulation shell.

Optionally, each first pin is respectively positioned on the first side of the insulation shell and be arranged in parallel, and each described second Pin is respectively positioned on second side relative with first side of the insulation shell and be arranged in parallel.

Optionally, the chip set on each chip Ji Dao includes diode, triode, metal-oxide-semiconductor or integrated electricity One or more in the chip of road.

Optionally, the distance between center of the every two adjacent chips is equal.

Optionally, centrally located chip Ji Dao area is maximum, is leaned on along the insulation shell length direction The chip Ji Dao of nearly another lateral edges of insulation shell area is minimum, from centre position respectively to the insulation shell Each chip Ji Dao in both sides of length direction area successively decreases.

Optionally, the ratio of the minimum chip Ji Dao of area area and the cross-sectional area of the insulation shell is more than Equal to 20%, the chip Ji Dao minimum with area the maximum chip Ji Dao of area area ratio is less than or equal to 1.8.

Optionally, it is provided with each chip Ji Dao to perforation.

Optionally, the groove around the chip is additionally provided with the chip Ji Dao.

Optionally, the material of the insulation shell is halogen-free epoxy resin, and the thermal conductivity factor of the halogen-free epoxy resin More than or equal to 2W/ (m*K).

Other side of the present utility model also provides a kind of terminal box, including housing, is provided with the housing above-mentioned Any described encapsulating structure.

Optionally, neck is provided with the housing, the encapsulating structure is connected in the neck.

Based on above-mentioned technical proposal, each chip Ji Dao is arranged side by side along insulation shell length direction in the encapsulating structure, and Chip is provided with each chip Ji Dao, with setting N+1 chip Ji Dao in existing plastic-sealed body, and one of chip base Island is not provided with chip and compared, and can save the space that chip Ji Dao takes along required for encapsulating structure length direction, effectively utilizes envelope The space of assembling structure, increase the spacing distance between each chip base island, while the core being arranged on each chip Ji Dao can be increased Spacing distance between piece.Therefore, heat caused by each chip operation can be distributed quickly, can improve encapsulating structure and The radiating effect of terminal box.

Brief description of the drawings

Fig. 1 is the planar structure schematic diagram of the encapsulating structure in a kind of embodiment of the utility model；

Fig. 2 is the side view of encapsulating structure in the utility model another embodiment；

Fig. 3 is along the schematic cross-section in A-A directions in Fig. 1；

Fig. 4 is the equivalent circuit diagram of encapsulating structure in the utility model another embodiment；

Fig. 5 is the schematic diagram being arranged on encapsulating structure in a kind of embodiment of the utility model in terminal box.

Embodiment

Here exemplary embodiment will be illustrated in detail, its example is illustrated in the accompanying drawings.Following description is related to During accompanying drawing, unless otherwise indicated, the same numbers in different accompanying drawings represent same or analogous key element.Following exemplary embodiment Described in embodiment do not represent all embodiments consistent with the application.On the contrary, they be only with it is such as appended The example of the consistent apparatus and method of some aspects be described in detail in claims, the application.

It is only merely for the purpose of description specific embodiment in term used in this application, and is not intended to be limiting the application. " one kind " of singulative used in the application and appended claims, " described " and "the" are also intended to including majority Form, unless context clearly shows that other implications.Below with reference to the accompanying drawings each embodiment of the present utility model is described in detail.

Encapsulating structure in correlation technique, mainly including insulation shell, N+1 chip bases side by side are packaged with insulation shell Island, wherein, it is respectively arranged with a chip on N number of chip Ji Dao, a chip Ji Dao is as connection sheet not chip, due to production The requirement of product specification, the size of encapsulating structure is fixed, and the connected mode in encapsulating structure between each chip is also relatively fixed, In existing encapsulating structure, each chip Ji Dao area is smaller, and the spacing distance between each chip base island is small, therefore, radiating It is ineffective.

Therefore, the utility model embodiment provides a kind of encapsulating structure, radiating effect during encapsulating structure work can be improved, The encapsulating structure includes：

Insulation shell；

At least three chip Ji Dao, each chip Ji Dao are packaged in insulation shell, and each chip Ji Dao is along insulation shell length Direction spacing side by side is set；

Chip is provided with each chip Ji Dao.

Chip is the nude film (Die) with related power device or circuit, and chip Ji Dao is used for chip placement, chip Ji Dao Can as accept chip carrier, chip can be various types of chips, for example, diode, triode, metal-oxide-semiconductor or IC chip etc..

The chip set on each chip Ji Dao includes one in diode, triode, metal-oxide-semiconductor or IC chip Kind is a variety of.

It can respectively be set on each chip Ji Dao and multiple chips are set on a chip or each chip Ji Dao, also, Two kinds or more of different types of chips are may also set up on each chip Ji Dao, the utility model is not limited this.

In the present embodiment, each chip Ji Dao is arranged side by side along insulation shell length direction in the encapsulating structure, and each core Chip base is provided with chip on island, and with setting N+1 chip Ji Dao in existing plastic-sealed body, and one of chip Ji Dao is not set Put chip to compare, the space that chip Ji Dao takes along required for encapsulating structure length direction can be saved, effectively utilize encapsulating structure Space, increase the spacing distance between each chip base island, increase each chip Ji Dao area, at the same can increase be arranged on it is each The spacing distance between chip on chip Ji Dao.Therefore, heat caused by each chip operation can be distributed faster, improved The radiating effect of encapsulating structure.

Can be the pin of chip by the external terminal that the internal circuit exit of chip is drawn, pin connects as chip Mouthful, the electrical connection of chip and outside line or external device (ED) can be realized by pin.

In an optional embodiment, each chip Ji Dao has the first pin extended outside insulation shell.

In the present embodiment, chip Ji Dao directly extends to form the first pin, chip Ji Dao and the first pin be integrally formed into It the space for saving occupancy of one step, therefore, can further increase the spacing distance between each chip base island, improve radiating speed Degree, improve radiating effect.

In certain embodiments, the first pole of chip electrically connects with chip Ji Dao；

Also include separately positioned the first pin extended outside the insulation shell along the insulation shell width And second pin, separately positioned first pin and second pin are electrically connected by the first bonding jumper, and first gold medal Category bar electrically connects with the second pole of one of chip.

In the present embodiment, encapsulating structure includes multiple chip Ji Dao, is provided with chip on each chip Ji Dao, each Chip Ji Dao has the first pin extended outside insulation shell, and the first pole of chip electrically connects with chip Ji Dao, therefore, on The first pin stated can be as the first pole pin of chip.

Also include the first pin and second pin of separation along insulation shell width, and this separately positioned first draws Pin and second pin are electrically connected by bonding jumper, and first pin and second pin have equipotential.Due to first bonding jumper Electrically connected with one of chip Ji Dao the second pole, therefore, the first pin and second pin of the separation can be as chips Second pole pin.

The first above-mentioned pole and the second pole are relevant with the type of chip, for example, if fruit chip be diode, then the first pole with One of them is anode for both second pole, and another is negative electrode, then both above-mentioned the first pole pin and the second pole pin be wherein One of be negative electrode pin, another is negative electrode pin；In another example when chip is metal-oxide-semiconductor, then the first pole and second extremely can be Any two electrode in grid, source electrode and drain electrode, then the first pole pin and the second pole pin are also the pin of corresponding type.

Separately positioned the first pin and second pin is set along insulation shell width, therefore, is not take up insulation shell Space on body length direction, can be further so when each chip Ji Dao is arranged side by side along insulation shell length direction Increase the spacing distance between each chip base island, while the spacer between the chip being arranged on each chip Ji Dao can be increased From.Due to the increase of above-mentioned spacing distance, heat caused by each chip operation can be quickly distributed, therefore, further can be with Improve the radiating effect of encapsulating structure.

The encapsulating structure provided below by the another embodiment of Fig. 1-4 pairs of the utility model is described：

Fig. 1 show a kind of floor map of encapsulating structure, and Fig. 2 is the lateral plan of encapsulating structure, such as Fig. 1 and Fig. 2 Shown, the encapsulating structure includes：

Insulation shell 10；

Three chip base islands 11, each chip base island 11 are packaged in insulation shell 10, and each chip base island 11 is along insulation shell Length direction (direction of the double arrowed line in such as Fig. 1 transversely) spacing side by side is set.

Chip 12 is provided with each chip base island 11, the first pole of chip 12 electrically connects with chip base island 11, per two-phase Connected respectively by the second bonding jumper 13 between adjacent chip 12；

Each chip base island 11 has the first pin 14 extended outside insulation shell.

The first separately positioned pin 14 and second pin 15 are separately positioned on along insulation shell length direction close to insulation The both sides on the chip base island 11 of the lateral edges of housing one, as shown in figure 1, first pin 14 and second pin 15 are separately positioned on figure The both sides on the chip base island 11 of the leftmost side shown in 1., can basis on first pin and the set location of second pin The external circuit or the link position of external device (ED) being connected with two pins are adjusted, for example, it is also possible to be arranged on Fig. 1 Shown in other chip base islands 11 both sides, or the first pin 14 is disposed therein a chip base island 11 side, second Pin 15 is arranged on the opposite side on another chip base island 11, or the first pin 14 is disposed therein a chip base island 11 1 Side, second pin 15 are arranged on the side on another chip base island 11.

Separately positioned the first pin 14 and second pin 15 is connected by the first bonding jumper electricity 16, and the first bonding jumper 16 Electrically connected with second pole on one of chip base island 11.

In the present embodiment, 13 two adjacent chips 12 are connected by the second metal.

Chip in the utility model embodiment in encapsulating structure can be diode, each Diode series, now, the envelope Assembling structure can be connected as the bypass circuit of photovoltaic power generation apparatus, the encapsulating structure with the main circuit of photovoltaic power generation apparatus, be made Photovoltaic power generation apparatus is protected for bypass circuit, the encapsulating structure may be provided in the terminal box of photovoltaic power generation apparatus.

The encapsulating structure radiating rate of the present embodiment is fast, and heat-sinking capability is good, therefore, can when it is arranged in terminal box The radiating rate of junction box is improved, improves the radiating effect of terminal box, is provided safeguard for terminal box normal operation.

In an optional embodiment, shown in reference picture 3, the back side of chip 12 is (close to chip base island 11 in Fig. 3 It is simultaneously) the first pole, the front one side of the first bonding jumper 16 (in Fig. 3 close to) is the second pole, the back side (i.e. first of chip 12 Pole) electrically connected with chip base island 11, extending each first pin 14 formed by each chip base island 11 can be as the first of chip 12 Pole pin, and the first separately positioned pin 14 and second pin 15 can be as the second pole pins of chip 12.

Describe the encapsulating structure of above-described embodiment in detail referring to Fig. 1, Fig. 3 and Fig. 4, the first pole and that chip includes Two poles, the one side that chip 12 electrically connects with chip base island 11 are the back side, and the back side is the first pole, and the one side of chip 12 upward is just Face, the front are the second pole, as shown in figure 1, the encapsulating structure includes three chips 12, positioned at the both sides of the chip 12 of the leftmost side Separately positioned to have one first pin 14 and second pin 15, centrally located and positioned at the rightmost side two chips 12 have respectively There is one first pin 14, the chip 12 positioned at right-most position also has a second pin 15.

The back side of each chip 12 electrically connects with each chip base island 11 respectively, therefore, is extended by each chip base island 11 each First pin 14 is the first pole pin, and the second pin 15 that the chip positioned at the rightmost side extends also is the first pole pin, in Fig. 1 Connected positioned at the chip base island 11 of the leftmost side with centrally located chip base island 11 by one second bonding jumper 13, it is specific and Speech, one end of second bonding jumper 13 is electrically connected with the chip base island 11 of the leftmost side, that is, the second bonding jumper 13 is with setting The first of chip 12 thereon is extremely connected, and the back side of chip 12 of the centrally located chip base island 11 with being arranged on is electrically connected Connect, the other end of second bonding jumper 13 electrically connects with the front of centrally located chip 12, that is, second metal Bar 13 is extremely connected with the second of centrally located chip 12, therefore, by second bonding jumper 13 by positioned at the leftmost side Chip 12 is connected with centrally located chip 12, and as a same reason, centrally located chip 12 is with being located at the rightmost side Chip 12 is connected by another second bonding jumper 13, and then, realize and connect between every two adjacent chips 12.

By above-mentioned each chip 12 be a diode exemplified by, then its equivalent circuit diagram as shown in figure 4, three diode D1, D2 and D3 series connection, diode D1 represent the chip for being located at the leftmost side in Fig. 1, and diode D2 represents centrally located chip, Diode D3 represents the chip positioned at the rightmost side.Fig. 4 includes multiple exit S1-S6, wherein exit S1 and exit S5 For negative electrode pin, exit S2, exit S3 and exit S4 and exit S6 are negative electrode pin.

Each first pin and each second pin in above-described embodiment are directly to extend to be formed by each chip Ji Dao, when So, each pin can also be formed by other means, for example, with the separately positioned multiple connection sheets in chip base island, then pass through gold Belong to bar or wire to connect each connection sheet with the electrode of corresponding chip, each first pin and each second can also be formed and drawn Pin, the utility model do not limit for forming the mode of the first pin and second pin.

It should be noted that above-described embodiment is by taking the series connection of each diode chip for backlight unit as an example, illustrate the connection between each chip Relation, chip can be other power devices or Power IC type, can also be the annexation of other modes between each chip, It is not limited to being connected in series in above-described embodiment, or it is connected in parallel, or the circuit connecting relation of other forms, can root It is adjusted according to the characteristic of encapsulated circuit structure, the utility model is not limited this.

In an optional embodiment, as shown in figure 1, the encapsulating structure can also include separately positioned upper connection 17 and lower connection sheet 18；

The first separately positioned pin 14 and second pin 15 are prolonged by one end of upper connection sheet 17 and lower connection sheet 18 respectively Stretch to be formed；

The both ends of first bonding jumper 16 electrically connect with upper connection sheet 17 and lower connection sheet 18 respectively.

In the present embodiment, connection sheet and lower connection sheet are provided with, one end extension of upper connection sheet can be formed above-mentioned The first pin in the first separately positioned pin and second pin, one end extension of lower connection sheet can be formed into above-mentioned separation Second pin in the first pin and second pin that set；By by the both ends of the first bonding jumper respectively with upper connection sheet and under Connection sheet electrically connects, and can have larger contact area between the first bonding jumper and upper connection sheet and lower connection sheet, therefore, can be with More reliable and more stable electrically connects the first pin and second pin.

In a kind of optional embodiment, upper connection sheet 17 and lower connection sheet 18 are separately positioned on along insulation shell 10 and grown Direction is spent close to the both sides on the chip base island 11 of the lateral edges of insulation shell 10 1.

For the set location of upper connection sheet and lower connection sheet, the mode shown in above-described embodiment, example are not limited to Such as, the both sides on other chip base islands 11 that upper connection sheet 17 and lower connection sheet 18 can also be separately positioned on shown in Fig. 1, or The upper connection sheet 17 of person is disposed therein a chip base island 11 side, and lower connection sheet 18 is arranged on the another of another chip base island 11 Side, or upper connection sheet 17 are disposed therein a chip base island 11 side, and lower connection sheet 18 is arranged on another chip base The side on island 11.

Above-mentioned first bonding jumper and the second bonding jumper can be copper strips, and copper has the spy of resistivity bottom and good heat conductivity Point, therefore, take into account the electric property of radiating effect and electrical connection simultaneously using copper strips.

In an optional embodiment, shown in reference picture 1 and Fig. 3, Fig. 3 be in Fig. 1 along the sectional view in A-A directions, The first end 161 of first bonding jumper 16 electrically connects with upper connection sheet 17, the center section 162 of the first bonding jumper 15 with along insulation shell Body length direction electrically connects close to the second pole of the chip 12 of the lateral edges of insulation shell one, the second end 163 of the first bonding jumper 16 Electrically connected with lower connection sheet 18.

In the present embodiment, the first bonding jumper 16 is set (along the double arrowed line of longitudinal direction in such as Fig. 1 along insulation shell width Direction), welding material 201 can be set between the first end 161 and upper connection sheet 17 of the first bonding jumper 16, likewise, Setting welding material 202 between the center section 162 of one bonding jumper 16 and the second pole of chip 12, the second of the first bonding jumper 16 Welding material 203 is set between end 163 and lower connection sheet 18, and then by the first bonding jumper 16 by upper connection sheet 17, chip 12 The second pole and lower connection sheet 18 be sequentially connected, realize the electrical connection of the first pin being oppositely arranged and second pin.

Shown in reference picture 3, welding material 204 can be set between the back side of chip 12 and chip base island 12, pass through welding Material 204 electrically connects at the back side of chip 12 with chip base island 11.

In an optional embodiment mode, as shown in figure 1, along the length direction of insulation shell 10 close to insulation shell 10 The chip base island 11 of another lateral edges also has the second pin 15 for extending insulation shell.

Shown in reference picture 1, along the length direction of insulation shell 10 close to the chip base island 11 of another lateral edges of insulation shell, i.e., The chip base island 11 of the rightmost side shown in figure, it also has second pin 15, and the second pin 15 can be as the another of chip 12 First pole pin.

In actual applications, because each first pin and each second pin are as interface, with external circuit or outside dress Connection is put, also can be according to the arrangement that each first pin and second pin are set with the link position of external circuit or external device (ED) Mode and spacing distance etc..

Encapsulating structure in the present embodiment, as shown in figure 1, wherein each first pin 14 is respectively positioned on the of insulation shell 10 Side (upside of insulation shell 10 in such as Fig. 1) and be arranged in parallel, each second pin 15 be respectively positioned on insulation shell 10 with first The second relative side of side (downside of insulation shell 10 in such as Fig. 1) and it be arranged in parallel.

Above-mentioned each first pin can be used for convergent belt or terminals with external device (ED) as convergent belt welding pin Son connection, each second pin can be used as cable wire pin to be used to be connected with external electrical cable.

It should be noted that the first pin and second pin in above-described embodiment are position and the work according to where pin With what is divided, each pin can also be divided according to other modes, for example, pin is divided into negative electrode pin and anode draws Pin, the present embodiment are not limited this, as long as including above-mentioned each first pin and each second pin.

In some embodiments, as shown in figure 1, the distance between center of every two adjacent chips 12 is equal.

It will be equidistantly positioned between chip, can maximize the distance between each chip, distance increase further improves Heat-sinking capability, and then, the working life of encapsulating structure chips is improved, is reduced because heating causes the probability that breaks down, together When can improve set the encapsulating structure terminal box operation stability.

In some optional embodiments, centrally located chip Ji Dao area is maximum, is grown along insulation shell The area for spending direction close to the chip Ji Dao of another lateral edges of insulation shell is minimum, from centre position respectively to insulation shell Each chip Ji Dao in both sides of length direction area successively decreases.

Further, the ratio of the cross-sectional area of the minimum chip Ji Dao of area area and insulation shell is more than or equal to 20%, chip Ji Dao minimum with area the maximum chip Ji Dao of area area ratio is less than or equal to 1.8.

Encapsulating structure shown in Fig. 3 includes three chip base islands 11, according to said structure, then centrally located core The area on chip base island 11 is maximum, and the area positioned at the chip base island 11 of the leftmost side takes second place, the area on the chip base island 11 of the rightmost side It is minimum.

It can be generated heat during each chip operation in the encapsulating structure, heat be produced inside encapsulating structure, due to positioned at centre There is chip operation the both sides of the chip of position, and the temperature in centre position is of a relatively high, and positioned at edge, i.e., outermost core Piece due near with external environment condition distance, heat caused by the chip distribute it is relatively fast, from centre position to insulation shell length side To the heat of each chip position in both sides distribute speed and increase successively.Therefore, in the present embodiment, setting is further passed through Each chip Ji Dao size, improve the problem of encapsulating structure radiating is uneven, improve heat dissipation uniformity, reduce each chip place The temperature difference of position, the temperature gradient reduced inside encapsulating structure is big, is effectively improved the radiating effect of encapsulating structure.

In other embodiment, the distance between each chip Ji Dao edge and the edge of insulation shell scope are 0.5mm to 1mm.

As shown in figure 1, chip base island 11 be usually irregular shape, in this implementations, chip Ji Dao each edge and The distance between each edge of insulation shell L1 scope is 0.5mm to 1mm.

The edge of upper connection sheet 16 and chip base island 11 adjacent thereto (the chip base island 11 of the leftmost side as shown in fig. 1) Between interval L2, lower connection sheet 17 edge and chip base island 11 adjacent thereto between interval L3 and two adjacent chips Interval L4 between the edge on base island 11, which is respectively less than, is equal to 0.5mm to 1mm.

By controlling the gap size between above-mentioned each spacer core chip base island edge and insulation shell edge, core can be increased The area on chip base island, and chip is set on chip Ji Dao, chip can be distributed due to heat caused by work by chip Ji Dao.Cause This, increase chip Ji Dao area can increase effective area of dissipation, further improve radiating effect.

In other embodiment, it is provided with each chip base island 11 to perforation 19, the quantity to perforation can be one Individual can also be multiple.

Encapsulating structure in the fabrication process, by the way that the insulating materials of hot fluid is injected on each chip Ji Dao, makes insulation material Material coats each chip Ji Dao, is then cooled into encapsulating structure.By setting to perforation, it can make fluid insulating material not only can be from Interval between each chip base island is flowed through, and can also can improve the flow effect of insulating materials, and then make absolutely by being flowed through to perforation The thickness of edge housing everywhere is uniform.

It can be selected for the material of insulation shell according to being actually needed, for example, plastics, ceramics or resin etc., one The material of insulation shell be halogen-free epoxy resin in kind optional embodiment, and the thermal conductivity factor of halogen-free epoxy resin more than etc. In 2W/ (m*K) (i.e. watt/(rice is opened)), the material rapid heat dissipation therefore, can be quickly by heat caused by diode chip for backlight unit It is dispersed into external environment condition, further improves the radiating effect of encapsulating structure.

In an optional embodiment, the groove 21 around diode chip for backlight unit is additionally provided with chip Ji Dao.

The groove can play two effects, and the position that first aspect can be arranged on chip Ji Dao to chip is determined Position, second aspect is by setting groove, when chip is arranged on chip Ji Dao by welding material, if there is unnecessary welding During material, it can flow first in groove, groove can accommodate the welding material of a certain amount, avoid welding material from flowing other ground Side, therefore influence the effect that chip electrically connects with chip Ji Dao.

The another embodiment of the utility model also provides a kind of terminal box, including housing, and above-mentioned is provided with the housing Encapsulating structure described in one embodiment.Above-mentioned encapsulating structure is provided with the terminal box of the present embodiment, due to the encapsulating structure Radiating rate it is fast, heat-sinking capability is good, therefore, when setting in terminal box, can improve the radiating rate of junction box, improve The radiating effect of terminal box, provided safeguard for terminal box normal operation.

In an optional embodiment, neck is provided with housing, the insulation shell of the encapsulating structure is connected to institute State in neck.

Fig. 5 show the schematic diagram being arranged on encapsulating structure in terminal box.Shown in reference picture 5, the insulation of encapsulating structure Housing 10 is connected in the neck (not shown) of terminal box 30, when needing the encapsulating structure being connected with external device (ED), Each first pin 14 of encapsulating structure can be welded with corresponding binding post as needed, by each second pin of encapsulating structure 15 weld with cable 31 respectively, and then realize the connection by encapsulating structure by terminal box and external device (ED).

This kind of connected mode need not increase circuit base plate in terminal box, after encapsulating structure is connected in terminal box, Each first pin and each second pin are welded with required connecting portion, can be directly by the insulation shell clamping of encapsulating structure In neck, mounting means is simple, and installation effectiveness is high.

It will be appreciated by those skilled in the art that accompanying drawing is the schematic diagram of a preferred embodiment, module or stream in accompanying drawing Journey is not necessarily implemented necessary to the utility model.It the foregoing is only specific embodiment of the present utility model, but this The protection domain of utility model is not limited thereto, and any one skilled in the art discloses in the utility model In technical scope, change or replacement can be readily occurred in, should all be covered within the scope of protection of the utility model.Therefore, this reality It should be based on the protection scope of the described claims with new protection domain.

Claims

A kind of 1. encapsulating structure, it is characterised in that including：

Insulation shell；

At least three chip Ji Dao, each chip Ji Dao are packaged in the insulation shell, and each chip Ji Dao is along described Insulation shell length direction spacing side by side is set；

Chip is provided with each chip Ji Dao.
2. encapsulating structure according to claim 1, it is characterised in that

Each chip Ji Dao has the first pin extended outside the insulation shell.
3. encapsulating structure according to claim 1, it is characterised in that

First pole of the chip electrically connects with the chip Ji Dao；

Also include separately positioned the first pin extended outside the insulation shell and the along the insulation shell width Two pins, separately positioned first pin and second pin are electrically connected by the first bonding jumper, and first bonding jumper Electrically connected with the second pole of chip one of them described.
4. encapsulating structure according to claim 1, it is characterised in that

Connected respectively by the second bonding jumper between the every two adjacent chips.
5. encapsulating structure according to claim 3, it is characterised in that

Separately positioned first pin and second pin are separately positioned on along the insulation shell length direction close to described The chip Ji Dao of the lateral edges of insulation shell one both sides.
6. encapsulating structure according to claim 3, it is characterised in that also include：Separately positioned upper connection sheet and lower company Contact pin；

The first separately positioned pin and second pin extend shape by one end of the upper connection sheet and lower connection sheet respectively Into；

The both ends of first bonding jumper electrically connect with the upper connection sheet and the lower connection sheet respectively.
7. encapsulating structure according to claim 6, it is characterised in that

The upper connection sheet and lower connection sheet are separately positioned on along the insulation shell length direction close to the insulation shell one The chip Ji Dao of lateral edges both sides.
8. encapsulating structure according to claim 7, it is characterised in that

The first end of first bonding jumper electrically connects with the upper connection sheet, the center section of first bonding jumper with along institute State insulation shell length direction to electrically connect close to the second pole of the chip of the lateral edges of insulation shell one, first gold medal Second end of category bar electrically connects with the lower connection sheet.
9. encapsulating structure according to claim 5, it is characterised in that

The chip Ji Dao along the insulation shell length direction close to another lateral edges of the insulation shell also has extension Go out the second pin of the insulation shell.
10. encapsulating structure according to claim 9, it is characterised in that

Each first pin is respectively positioned on the first side of the insulation shell and be arranged in parallel, and each second pin is respectively positioned on institute State second side relative with first side of insulation shell and be arranged in parallel.
11. according to the encapsulating structure described in claim any one of 1-10, it is characterised in that

The chip set on each chip Ji Dao includes one in diode, triode, metal-oxide-semiconductor or IC chip Kind is a variety of.
12. according to the encapsulating structure described in claim any one of 1-10, it is characterised in that

The distance between the center of every two adjacent chip is equal.
13. according to the encapsulating structure described in claim any one of 1-10, it is characterised in that

Centrally located chip Ji Dao area is maximum, along the insulation shell length direction close to the insulation shell The chip Ji Dao of another lateral edges of body area is minimum, from centre position respectively to the two of the insulation shell length direction Each chip Ji Dao in side area successively decreases.
14. encapsulating structure according to claim 13, it is characterised in that

The ratio of the minimum chip Ji Dao of the area area and the cross-sectional area of the insulation shell is more than or equal to 20%, the chip Ji Dao minimum with the area the maximum chip Ji Dao of area area ratio is less than or equal to 1.8。
15. according to the encapsulating structure described in claim any one of 1-10, it is characterised in that be provided with each chip Ji Dao To perforation.
16. according to the encapsulating structure described in claim any one of 1-10, it is characterised in that

The groove around the chip is additionally provided with the chip Ji Dao.
17. according to the encapsulating structure described in claim any one of 1-10, it is characterised in that

The material of the insulation shell is halogen-free epoxy resin, and the thermal conductivity factor of the halogen-free epoxy resin is more than or equal to 2W/ (m*K)。
18. a kind of terminal box, including housing, it is characterised in that be provided with the housing described in claim any one of 1-17 Encapsulating structure.
19. terminal box according to claim 18, it is characterised in that neck, the encapsulation knot are provided with the housing Structure is connected in the neck.