CN109509733A - A kind of lead frame - Google Patents
A kind of lead frame Download PDFInfo
- Publication number
- CN109509733A CN109509733A CN201710834270.6A CN201710834270A CN109509733A CN 109509733 A CN109509733 A CN 109509733A CN 201710834270 A CN201710834270 A CN 201710834270A CN 109509733 A CN109509733 A CN 109509733A
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- Prior art keywords
- chip
- lead frame
- dao
- pin
- leadframes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49503—Lead-frames or other flat leads characterised by the die pad
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49562—Geometry of the lead-frame for devices being provided for in H01L29/00
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49568—Lead-frames or other flat leads specifically adapted to facilitate heat dissipation
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
The present invention provides lead frame, comprising: lead frame ontology, the lead frame ontology include at least two leadframes units, are connected with each other between adjacent leadframes unit；Each leadframes unit includes at least three spaced chip Ji Dao, and each chip Ji Dao is arranged side by side along the length direction of the lead frame ontology, and each chip Ji Dao is for being arranged chip.The heat generated when being worked using the encapsulating structure of lead frame manufacture can be distributed quickly, can improve the heat dissipation effect of encapsulating structure.
Description
Technical field
The present invention relates to technical field of integrated circuits more particularly to a kind of lead frames.
Background technique
Encapsulating structure mainly includes setting in the intracorporal chip of insulation shell, chip Ji Dao and pin etc., for manufacturing encapsulation
The lead frame of structure includes multiple for the chip Ji Dao and pin of chip to be arranged.Chip is arranged on chip Ji Dao, pin
For drawing the internal circuit exit of chip, chip to be connect with outside line or external device (ED) by pin.
Can generate heat when chip operation in encapsulating structure, due to each chip for being arranged on the chip Ji Dao of lead frame it
Between connection type it is relatively fixed, the size of encapsulating structure be also it is fixed, using the encapsulation knot of the manufacture of existing lead frame
The heat-dissipating space of structure is restricted, and therefore, heat dissipation effect is bad.
Summary of the invention
For the problems of the prior art, of the invention provides a kind of lead frame, and the lead frame includes:
Lead frame ontology, the lead frame ontology include at least two leadframes units, adjacent lead frame
It is connected with each other between unit；
The leadframes unit includes at least three spaced chip Ji Dao, and each chip Ji Dao draws along described
The length direction of wire frame ontology is arranged side by side, and each chip Ji Dao is for being arranged chip.
Optionally, wherein the first pin is extended in one end to the chip Ji Dao.
Optionally, the leadframes unit further include along the lead frame ontology width direction is separately positioned and phase
The first pin and second pin being mutually spaced.
Optionally, separately positioned first pin and second pin are separately positioned on and lean on along the length direction
The two sides of the chip Ji Dao of the nearly leadframes unit one side edge.
Optionally, the leadframes unit is along the length direction close to another side edge of the leadframes unit
The other end of the chip Ji Dao also extends second pin.
Optionally, the leadframes unit further include: separately positioned upper connection sheet and lower connection sheet；
Separately positioned first pin and second pin are prolonged by one end of the upper connection sheet and lower connection sheet respectively
It stretches to be formed.
Optionally, the upper connection sheet and lower connection sheet are separately positioned on along the length direction close to the lead frame
The two sides of the chip Ji Dao of unit one side edge.
Optionally, each first pin is respectively positioned on the first side of the leadframes unit and is arranged in parallel, each described
Second pin be respectively positioned on the leadframes unit with described opposite second side in first side and be arranged in parallel.
Optionally, the lead frame ontology further includes multiple first dowels, and each first dowel is along described
Length direction is arranged, and is connected between adjacent first pin by first dowel.
Optionally, the lead frame ontology further includes multiple second dowels, each described length of second dowel
Direction setting is spent, is connected between the adjacent second pin by second dowel.
Optionally, the lead frame ontology extends along the length direction between adjacent leadframes unit
Three dowels pass through the third dowel between adjacent leadframes unit and are connected with each other.
Optionally, the area of the centrally located chip Ji Dao is maximum, draws along the length direction close to described
The area of the chip Ji Dao of another side edge of wire frame unit is minimum, from middle position respectively to the two of the length direction
The area of each chip Ji Dao in side successively decreases.
Optionally, the ratio of the area and the cross-sectional area of the insulation shell of the smallest chip Ji Dao of area is greater than
Equal to 20%, the area ratio of the maximum chip Ji Dao of area and the smallest chip Ji Dao of area are less than or equal to 1.8.
Optionally, it is provided on the chip Ji Dao to perforation.
Optionally, groove is additionally provided on the chip Ji Dao, the groove is arranged around the position of diode.
Optionally, each chip Ji Dao for setting chip include diode, triode, metal-oxide-semiconductor or
One of IC chip is a variety of.
Based on the above-mentioned technical proposal, each chip Ji Dao in the lead frame in each leadframes unit is along lead frame
Body length direction is arranged side by side, and is used to be provided with chip on each chip Ji Dao, and N is arranged in existing lead frame
+ 1 chip Ji Dao, and one of chip Ji Dao is not used in setting chip and compares, and can save chip Ji Dao along lead frame sheet
The space occupied required for the length direction of body efficiently uses the space of the length direction of lead frame, increases each chip Ji Dao
Between spacing distance, increase the area of each chip Ji Dao, between can increasing between the chip being arranged on each chip Ji Dao
Gauge from.Therefore, the heat generated when being worked using the encapsulating structure of lead frame manufacture can be distributed quickly, improve envelope
The heat dissipation effect of assembling structure.
Detailed description of the invention
Fig. 1 is the planar structure schematic diagram of the lead frame in one embodiment of the present invention；
Fig. 2 is partial enlarged view in Fig. 1.
Specific embodiment
Example embodiments are described in detail here, and the example is illustrated in the accompanying drawings.Following description is related to
When attached drawing, unless otherwise indicated, the same numbers in different drawings indicate the same or similar elements.Following exemplary embodiment
Described in embodiment do not represent all embodiments consistent with the application.On the contrary, they be only with it is such as appended
The example of the consistent device and method of some aspects be described in detail in claims, the application.
It is only to be not intended to be limiting the application merely for for the purpose of describing particular embodiments in term used in this application.
It is also intended in the application and the "an" of singular used in the attached claims, " described " and "the" including majority
Form, unless the context clearly indicates other meaning.Below with reference to the accompanying drawings each embodiment of detailed description of the present invention.
Lead frame in the related technology, lead frame ontology generally include N+1 chip Ji Dao side by side, wherein N number of core
For being provided with a chip on chip base island, a chip Ji Dao is as connection sheet not chip, due to the requirement of product specification,
The size of the encapsulating structure of chip be it is fixed, the connection type in encapsulating structure between each chip is also relatively fixed, existing use
In the lead frame of manufacture encapsulating structure, the chip Ji Dao of mountable chip designs unreasonable, the chip base of mountable chip
The area on island is relatively small, and the spacing distance between each chip base island is small, and therefore, heat dissipation effect is bad.
For this purpose, the embodiment of the present invention provides a kind of lead frame, comprising:
Lead frame ontology, the lead frame ontology include at least two leadframes units, adjacent lead frame
It is connected with each other between unit；
The leadframes unit includes at least three spaced chip Ji Dao, and each chip Ji Dao is along lead frame sheet
The length direction of body is arranged side by side, and each chip Ji Dao is for being arranged chip.
Lead frame ontology is usually conductive metallic material production, the property that lead frame bulk material can be needed according to product
Can, for example, intensity, electric conductivity and heating conduction etc. are selected.
Lead frame ontology may include multiple leadframes units, each leadframes unit knot usually having the same
Structure, also, be connected with each other between adjacent leadframes unit.
Encapsulating structure is a kind of integrated circuit component, mainly includes chip, chip Ji Dao and pin etc., and chip is arranged in core
On chip base island, pin is used to draw the internal circuit exit of chip, to pass through pin for chip and outside line or outside
Device connection.
The lead frame of the present embodiment can be used for manufacturing encapsulating structure, and each chip Ji Dao in each leadframes unit can
As each chip Ji Dao in an encapsulating structure.
Chip is the bare die (Die) with related power device or circuit, and chip Ji Dao is used for chip placement, chip Ji Dao
Can be used as accept chip carrier, chip can be various types of chips, for example, diode, triode piece, metal-oxide-semiconductor or
Person's IC chip.
It can be respectively set on each chip Ji Dao on a chip or each chip Ji Dao and multiple chips are set, also,
It may also set up two kinds or more of different types of chips on each chip Ji Dao, the present invention does not limit this.
In the present embodiment, each chip Ji Dao in the lead frame in each leadframes unit is long along lead frame ontology
It spends direction to be arranged side by side, and is used to be provided with chip on each chip Ji Dao, with N+1 core of setting in existing lead frame
Chip base island, and one of chip Ji Dao is not used in setting chip and compares, and can save chip Ji Dao along the length of lead frame ontology
The space occupied required for direction is spent, the space of the length direction of lead frame is efficiently used, increases between each chip base island
Spacing distance increases the area of each chip Ji Dao, can increase the spacing distance between the chip being arranged on each chip Ji Dao.
Therefore, the heat generated when being worked using the encapsulating structure of lead frame manufacture can be distributed quickly, improve encapsulating structure
Heat dissipation effect.
In an optional embodiment, wherein each first pin is extended in one end to each chip Ji Dao.
In the present embodiment, chip Ji Dao directly extends to form the first pin, and chip Ji Dao and the first pin are integrally formed can
Therefore the space occupied needed for saving can further increase the spacing distance between each chip base island, improve radiating rate,
Improve heat dissipation effect.
It is described below by the lead frame that Fig. 1 and Fig. 2 provides further embodiment of this invention:
Fig. 1 show a kind of floor map of lead frame provided in an embodiment of the present invention, and Fig. 2 is shown in Fig. 1
Partial structurtes enlarged drawing；As depicted in figs. 1 and 2, which includes:
Lead frame ontology 1, lead frame ontology 1 include three (portions in Fig. 1 in dotted line frame of leadframes unit 10
Point), it is connected with each other between adjacent leadframes unit 10；
Leadframes unit 10 includes three spaced chip base islands 11, and each chip base island 11 is along lead frame ontology
1 length direction (direction of double arrowed line transversely as shown in figure 1) is arranged side by side, and each chip base island 11 is for carrying chip
(not shown)；
Wherein the first pin 12 is extended in one end on chip base island 11；
Leadframes unit 10 further includes the width direction (double arrowed line along longitudinal direction as shown in figure 1 along lead frame ontology 1
Direction) separately positioned the first pin 12 and second pin 13, the first separately positioned pin 12 and second pin 13 are distinguished
It is arranged in along its length close to the two sides on the chip base island 11 of leadframes unit one side edge.
As shown in Figure 1, the first separately positioned pin 12 and second pin 13 are separately positioned on the leftmost side shown in figure
The two sides on chip base island 11 can draw according to this two about the setting position of first pin 12 and second pin 13
The link position of outside line or external device (ED) that foot is connected is adjusted, for example, it is also possible to by the first pin 12 and second
Pin 13 is separately positioned on the two sides on other chip base islands 11 or the first pin 12 shown in Fig. 1 and is disposed therein one
11 side of chip base island, the other side on another chip base island 11 is arranged in second pin 13 or the setting of the first pin 12 exists
The side on another chip base island 11 is arranged in 11 side of one of chip base island, second pin 13.
Lead frame includes three leadframes units in Fig. 1, since the structure of each leadframes unit is identical, because
This, only identifies each structure in the leadframes unit of the leftmost side in Fig. 1.Certainly, lead frame may include other quantity
Leadframes unit, the present invention do not limit this.
It should be noted that the leadframes unit of the rightmost side and the structure of other two leadframes units are in Fig. 1
It is identical, but the knot that the insulation shell 30 of encapsulating structure is provided in leadframes unit is shown in the leadframes unit
Structure, since setting is capped in the intracorporal part of insulation shell, so the part-structure in the leadframes unit is blocked.
In the present embodiment, the first separately positioned pin and second pin are arranged along the width direction of lead frame ontology,
Therefore, it is not take up the space on length direction, it, can be further in this way when each chip Ji Dao to be arranged side by side along its length
Increase the spacing distance between each chip base island.Meanwhile it can increase between the diode chip for backlight unit being arranged on each chip Ji Dao
Spacing distance, since above-mentioned spacing distance increases, the heat that generates when can distribute the work of each diode chip for backlight unit fastlyer
Therefore amount may further improve the heat dissipation effect of the encapsulating structure of the diode chip for backlight unit using lead frame manufacture.
In an optional embodiment, leadframes unit is along its length close to another side of leadframes unit
The other end of the chip Ji Dao of edge also extends second pin.
Shown in referring to Fig.1, each leadframes unit 10 is in the length direction along lead frame ontology 1 close to the lead frame
The chip base island 11 of another side edge of frame unit 10, for example, in each leadframes unit 10 as shown in the figure the rightmost side chip base
A second pin 13 is also extended on island 11.
In practical applications, since each first pin and each second pin are as interface, for outside line or outside
Part device connection, need according to and the link position of outside line or external device (ED) each first pin and second pin are set
Arrangement mode and spacing distance etc..
Lead frame structure provided in this embodiment, each chip Ji Dao are preferably used in placement diode, when by diode
It is arranged when on chip Ji Dao, the one side (for example, front as cathode) of diode can be electrically connected with chip Ji Dao, two poles
The another side (for example, front as anode) of pipe connect with corresponding pin by sheet metal, in this way, each first pin with respectively
Second pin can be directly as the negative electrode pin and negative electrode pin of diode.
It should be noted that the chip type being arranged on above-mentioned each first pin and each second pin and chip Ji Dao has
It closes, the concrete type of each pin is because the chip type difference being arranged on chip Ji Dao also can be different, for example, setting when on chip Ji Dao
When being equipped with triode, each first pin and each second pin specifically may include base stage pin, emitter pin sum aggregate electrode pin
The pin of three types；When metal-oxide-semiconductor is arranged on chip Ji Dao, each first pin and each second pin specifically may include that grid draws
Foot, source lead and drain lead.
In some alternative embodiments, as shown in Figure 1, the equal position of each first pin 12 of each leadframes unit 10
In leadframes unit 10 the first side and (upside of leadframes unit 10 as shown in figure 1) be arranged in parallel and be arranged in parallel, respectively
Second pin 13 is respectively positioned on second side opposite with the first side (leadframes unit 10 as shown in figure 1 of leadframes unit 10
Downside) and be arranged in parallel.
Above-mentioned each first pin can be used as convergent belt welding pin, for filling with outside line connecting terminal or outside
The confluence band connection set, each second pin can be used as cable wire pin for connecting with external electrical cable.
It should be noted that the first pin and second pin in above-described embodiment be according to where pin position and work
With what is divided, each pin can also be divided according to other modes, for example, pin is divided into negative electrode pin and anode draws
Foot, the present embodiment do not limit this.
In an optional embodiment, as shown in Figure 1, each leadframes unit 10 further include: separately positioned is upper
Connection sheet 14 and lower connection sheet 15；
Upper connection sheet 14 and lower connection sheet 15 can be separately positioned on along its length close to 10 a side of leadframes unit
The two sides on the chip base island 11 of edge；
The first separately positioned pin 12 and second pin 13 are prolonged by one end of upper connection sheet 14 and lower connection sheet 15 respectively
It stretches to be formed.
In the present embodiment, it is provided with connection sheet and lower connection sheet, one end extension of upper connection sheet can be formed above-mentioned
The first pin in the first separately positioned pin and second pin, one end of lower connection sheet, which is extended, can form above-mentioned separation
The second pin in the first pin and second pin being arranged.
When using the packaging body of lead frame manufacture diode chip for backlight unit, it may be necessary to by the first pin and second pin
Be electrically connected by a metal strip, by be arranged upper connection sheet and lower connection sheet can by the both ends of metal strip respectively with upper connection sheet and
Lower connection sheet electrical connection, can have biggish contact area between such metal strip and upper connection sheet and lower connection sheet, therefore, can
More reliablely and stablely the first pin and second pin to be electrically connected.
For the setting position of upper connection sheet and lower connection sheet, be not limited to the above embodiments shown in mode, example
Such as, upper connection sheet 14 and lower connection sheet 15 can also be separately positioned on to the two sides on other chip base islands 11 shown in Fig. 1, or
The upper connection sheet 14 of person is disposed therein 11 side of a chip base island, and the another of another chip base island 11 is arranged in lower connection sheet 15
Side or upper connection sheet 14 are disposed therein 11 side of a chip base island, and lower connection sheet 15 is arranged in another chip base
The side on island 11.
In some alternative embodiments, as shown in Figure 1, lead frame ontology 1 further includes multiple first dowels 16,
Each first dowel 16 is arranged along its length, is connected between the first adjacent pin 12 by the first dowel 16.
Lead frame ontology 1 further includes multiple second dowels 17, and each second dowel 17 is arranged along its length, phase
It is connected between adjacent second pin 13 by second dowel 17.
In the present embodiment, it is connected between the first adjacent pin in each leadframes unit by the first dowel,
Also, it is connected between the first adjacent pin in adjacent leadframes unit also by the first dowel；Each lead frame
It is connected between adjacent second pin in frame unit by the second dowel, also, the phase in adjacent leadframes unit
It is connected between adjacent second pin also by the second dowel.Not only make the structure more stability of lead frame entirety in this way,
Simultaneously as the first dowel and the second dowel are arranged along the length direction of lead frame ontology, and pass through in the prior art
It dowel at the top of each pin is set is attached and compare, also can reduce the width of lead frame ontology, save lead frame
The material that frame ontology uses reduces the manufacturing cost of lead frame.
As shown in Figure 1, positioning can also further be arranged on above-mentioned each first dowel 16 and the second dowel 17
Hole 18.When using the encapsulating structure of lead frame manufacture diode chip for backlight unit, due to each first pin 12 and each second pin
It needs to separate between 13, needs to cut away each first dowel 16 and the second dowel 17.Therefore, in cutting, the positioning
Hole 18 can play positioning action, facilitate and determine each cutting position.
In some alternative embodiments, as shown in Figure 1, lead frame ontology 1 is in adjacent leadframes unit 10
Between extend third dowel 19 along its length, it is mutual by third dowel 19 between adjacent leadframes unit 10
Connection.
In the present embodiment, it is connected with each other between each adjacent leadframes unit 10 by third dowel 19, it can be into one
Step improves the integrally-built stability of lead frame.
Also, one or more also settable pilot hole 20 on third dowel 19 facilitates and determines each cutting position.
In some alternative embodiments, the area of the centrally located chip Ji Dao is maximum, along the length
The area for spending direction close to the chip Ji Dao of another side edge of the leadframes unit is minimum, from middle position respectively to
The area of each chip Ji Dao in the two sides of the length direction successively decreases.
Further, the ratio of the area and the cross-sectional area of the insulation shell of the smallest chip Ji Dao of area is big
In being equal to 20%, the area ratio of the maximum chip Ji Dao of the area and the smallest chip Ji Dao of area is less than or equal to 1.8.
Encapsulating structure shown in Fig. 1 includes three chip base islands 11, according to above structure, then centrally located core
The area on chip base island 11 is maximum, and the area positioned at the chip base island 11 of the leftmost side takes second place, the area on the chip base island 11 of the rightmost side
It is minimum.
Each chip Ji Dao is used for each chip for being arranged in encapsulating structure, and when each chip operation can generate heat, due to being located at centre
There are chip operation in the two sides of the chip of position, and therefore, the temperature in middle position is relatively high, and are located at edge, i.e., outermost
The chip of side due to close with external environment distance, the heat which generates distribute it is relatively fast, from middle position to length direction
The heat of each chip position in two sides distribute speed and be sequentially increased, it is therefore, further each by setting in the present embodiment
The size of chip Ji Dao optimizes lead frame internal structure, reduces the heat dissipation difference between each chip base island, improves chip
The uneven problem of heat dissipation, improve heat dissipation uniformity, reduce the temperature difference of each chip position, reduce inside encapsulating structure
Temperature gradient is big, is effectively improved the heat dissipation effect of encapsulating structure.
It is provided on each chip base island 11 to perforation 21, it can be for one or multiple to the quantity of perforation.
Encapsulating structure in the fabrication process, by the way that the insulating materials of hot fluid is covered each leadframes unit, makes to insulate
Material coats each chip Ji Dao, is then cooled into encapsulating structure.By being arranged to perforation, fluid insulating material can be made not only may be used
It is flowed through from the interval between each chip base island, also the flow effect of insulating materials can be improved, and then make by flowing through to perforation
The thickness of the insulation shell of encapsulating structure everywhere is uniform.
In the optional embodiment of other, as shown in Figure 1, groove 22 is additionally provided on each chip base island 11, it is recessed
Slot 22 is arranged around the position of chip, and the position of chip is set as the rectangle frame 23 in Fig. 1 further groove.
The groove can play the role of two, in a first aspect, the position that chip can be arranged on chip Ji Dao carries out
Positioning；Second aspect, by be arranged groove, by chip by welding material setting when on chip Ji Dao, if having it is extra
It when welding material, can flow first in groove, groove can accommodate the welding material of a certain amount, and welding material is avoided to flow other
Therefore place influences the effect that chip is electrically connected with chip Ji Dao.
It will be appreciated by those skilled in the art that attached drawing is the schematic diagram of a preferred embodiment, module or stream in attached drawing
Journey is not necessarily implemented necessary to the present invention.The foregoing is merely a specific embodiment of the invention, but guarantor of the invention
Shield range is not limited thereto, and anyone skilled in the art in the technical scope disclosed by the present invention, can be light
It is readily conceivable that change or replacement, should be covered by the protection scope of the present invention.Therefore, protection scope of the present invention should be with described
Subject to scope of protection of the claims.
Claims (16)
1. a kind of lead frame characterized by comprising
Lead frame ontology, the lead frame ontology include at least two leadframes units, adjacent leadframes unit
Between be connected with each other；
The leadframes unit includes at least three spaced chip Ji Dao, and each chip Ji Dao is along the lead frame
The length direction of frame ontology is arranged side by side, and each chip Ji Dao is for being arranged chip.
2. lead frame according to claim 1, which is characterized in that the chip Ji Dao wherein extend first and draw by one end
Foot.
3. lead frame according to claim 1, which is characterized in that
The leadframes unit further include along the lead frame ontology width direction it is separately positioned and be spaced apart from each other
One pin and second pin.
4. lead frame according to claim 3, which is characterized in that separately positioned first pin and second
Pin is separately positioned on along the length direction close to the two sides of the chip Ji Dao of the leadframes unit one side edge.
5. lead frame according to claim 4, which is characterized in that
The leadframes unit is along the length direction close to the chip base of another side edge of the leadframes unit
The other end on island also extends second pin.
6. lead frame according to claim 3, which is characterized in that the leadframes unit further include: separately positioned
Upper connection sheet and lower connection sheet；
Separately positioned first pin and second pin extend shape by one end of the upper connection sheet and lower connection sheet respectively
At.
7. lead frame according to claim 6, which is characterized in that
The upper connection sheet and lower connection sheet are separately positioned on along the length direction close to described leadframes unit a side
The two sides of the chip Ji Dao of edge.
8. lead frame according to claim 5, which is characterized in that
Each first pin is respectively positioned on the first side of the leadframes unit and is arranged in parallel, each equal position of second pin
In the leadframes unit and described opposite second side in first side and it is arranged in parallel.
9. lead frame according to claim 8, which is characterized in that
The lead frame ontology further includes multiple first dowels, and each first dowel is set along the length direction
It sets, is connected between adjacent first pin by first dowel.
10. lead frame according to claim 8, which is characterized in that
The lead frame ontology further includes multiple second dowels, and each second dowel is set along the length direction
It sets, is connected between the adjacent second pin by second dowel.
11. -10 described in any item lead frames according to claim 1, which is characterized in that
The lead frame ontology extends third dowel, phase along the length direction between adjacent leadframes unit
It is connected with each other between adjacent leadframes unit by the third dowel.
12. -10 described in any item lead frames according to claim 1, which is characterized in that
The area of the centrally located chip Ji Dao is maximum, another close to the leadframes unit along the length direction
The area of the chip Ji Dao of one side edge is minimum, from middle position respectively to each chip in the two sides of the length direction
The area of Ji Dao successively decreases.
13. lead frame according to claim 12, which is characterized in that
The ratio of the cross-sectional area of the area and insulation shell of the smallest chip Ji Dao of area is more than or equal to 20%, face
The area ratio of the product maximum chip Ji Dao and the smallest chip Ji Dao of area is less than or equal to 1.8.
14. -10 described in any item lead frames according to claim 1, which is characterized in that be provided on the chip Ji Dao pair
Perforation.
15. -10 described in any item lead frames according to claim 1, which is characterized in that
Groove is additionally provided on the chip Ji Dao, the groove is arranged around the position of chip.
16. -10 described in any item lead frames according to claim 1, which is characterized in that each chip Ji Dao is for setting
The chip set includes one of diode, triode, metal-oxide-semiconductor or IC chip or a variety of.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710834270.6A CN109509733A (en) | 2017-09-15 | 2017-09-15 | A kind of lead frame |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710834270.6A CN109509733A (en) | 2017-09-15 | 2017-09-15 | A kind of lead frame |
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| Publication Number | Publication Date |
|---|---|
| CN109509733A true CN109509733A (en) | 2019-03-22 |
Family
ID=65745076
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710834270.6A Pending CN109509733A (en) | 2017-09-15 | 2017-09-15 | A kind of lead frame |
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| CN (1) | CN109509733A (en) |
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| CN103430305A (en) * | 2012-03-28 | 2013-12-04 | 松下电器产业株式会社 | Resin package |
| CN105006465A (en) * | 2015-08-07 | 2015-10-28 | 桂林斯壮微电子有限责任公司 | Universal lead frame |
| CN205211739U (en) * | 2015-12-04 | 2016-05-04 | 叶淑琼 | Lead -wire frame |
| CN207474451U (en) * | 2017-09-15 | 2018-06-08 | 无锡华润华晶微电子有限公司 | A kind of lead frame |
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2017
- 2017-09-15 CN CN201710834270.6A patent/CN109509733A/en active Pending
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| CN201838584U (en) * | 2010-09-30 | 2011-05-18 | 常州银河世纪微电子有限公司 | Encapsulated triode |
| CN103430305A (en) * | 2012-03-28 | 2013-12-04 | 松下电器产业株式会社 | Resin package |
| CN105006465A (en) * | 2015-08-07 | 2015-10-28 | 桂林斯壮微电子有限责任公司 | Universal lead frame |
| CN205211739U (en) * | 2015-12-04 | 2016-05-04 | 叶淑琼 | Lead -wire frame |
| CN207474451U (en) * | 2017-09-15 | 2018-06-08 | 无锡华润华晶微电子有限公司 | A kind of lead frame |
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