CN207115391U - A kind of automatic reset circuit - Google Patents
A kind of automatic reset circuit Download PDFInfo
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- CN207115391U CN207115391U CN201720735055.6U CN201720735055U CN207115391U CN 207115391 U CN207115391 U CN 207115391U CN 201720735055 U CN201720735055 U CN 201720735055U CN 207115391 U CN207115391 U CN 207115391U
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- watchdog
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Abstract
The utility model discloses a kind of automatic reset circuit.The circuit includes：First watchdog circuit and the second watchdog circuit, the first feeding-dog signal generation circuit and the second feeding-dog signal generation circuit, the first logic gates and the second logic gates；The output end of first feeding-dog signal generation circuit and the second feeding-dog signal generation circuit is connected with two inputs of the first logic gates respectively, output end of the input of first watchdog circuit and the second watchdog circuit with the first logic gates is connected, the output end of first watchdog circuit and the second watchdog circuit is connected with two inputs of the second logic gates respectively, and the output end of the second logic gates is connected with the reset terminal of processor.By setting two-way watchdog circuit and two-way feeding-dog signal generation circuit, when watchdog circuit and/or feeding-dog signal generation circuit break down, as long as having watchdog circuit all the way and feeding-dog signal generation circuit normal work, remain able to make computer automatically reset.
Description
Technical field
The utility model belongs to field of computer technology, and in particular to it is a kind of be used for avoid computer be in endless loop oneself
Dynamic reset circuit.
Background technology
In the microcomputer system being made up of single-chip microcomputer, because the work of single-chip microcomputer usually can be by from extraneous electricity
The interference in magnetic field, the data corruption of various registers and internal memory is caused, program pointer mistake can be caused, not in program area, taken out
Programmed instruction of mistake etc., can all be absorbed in endless loop, and the normal operation of program is interrupted.Because monolithic processor controlled system can not
Continue normal work, can cause whole system is absorbed in dead state, and unpredictable consequence occurs.
Watchdog circuit is for detecting whether computer is in endless loop, and when detecting that endless loop occurs in computer
The circuit of reset signal is sent to CPU.Watchdog circuit can be divided into hardware watchdog and software watchdog.Hardware watchdog is main
It is made up of a timer circuit, its timing output is connected to the reset terminal of processor.During computer program normal work, pass through
It is distributed in the continuous output control signal of a program statement (being commonly called as " feeding-dog signal ") among other sentences and (custom is reset to timer
Claim " feeding dog "), therefore program timer can not overflow always, cannot also produce reset signal；Once calculated caused by interference
Machine program fleet and when being absorbed in a certain improper program section and entering endless loop state, the program statement cannot perform, it is impossible to
Export feeding-dog signal.At this moment watchdog circuit is by judging that one reset signal of output to processor reset end, makes computer weight
Start, i.e., program performs since the original position of program storage, so just realizes automatically reseting for computer.Software is seen
Door dog is identical with the principle of hardware watchdog, simply replaces the timer on hardware circuit with the timer inside processor,
Hardware circuit design can so be simplified, but be not so good as hardware timer in terms of reliability, such as internal system timer itself
Breaking down can not just detect.
With the rapid development of electronic technology, electromagnetic environment is increasingly severe, feeding-dog signal generation circuit or watchdog circuit
Chip is easy to because disturbing or damage cisco unity malfunction, cause computer to export reset signal when being in endless loop, from
And computer program is seted to be automatically reset from jumping out endless loop realization.
Utility model content
In order to solve the above-mentioned problems in the prior art, the utility model proposes a kind of automatic reset circuit, sets
Two-way watchdog circuit, two-way feeding-dog signal generation circuit, as long as having watchdog circuit all the way and feeding-dog signal generation circuit just
Often work makes computer automatically reset with regard to that can export reset signal to the reset terminal of processor.
To achieve the above object, the utility model adopts the following technical scheme that：
The utility model provides a kind of automatic reset circuit, including：First watchdog circuit and the second watchdog circuit, the
One feeding-dog signal generation circuit and the second feeding-dog signal generation circuit, the first logic gates and the second logic gates；First
Two inputs with the first logic gates respectively of the output end of feeding-dog signal generation circuit and the second feeding-dog signal generation circuit
End is connected, and the output end of the input of the first watchdog circuit and the second watchdog circuit with the first logic gates is connected,
The output end of first watchdog circuit and the second watchdog circuit is connected with two inputs of the second logic gates respectively, the
The output end of two logic gates is connected with the reset terminal of processor.
Further, the first feeding-dog signal generation circuit and the second feeding-dog signal generation circuit are respectively at computer
Manage two different I/O mouths of device.
Further, the structure of first watchdog circuit and the second watchdog circuit is identical, including a model
For ADM8324 watchdog chip, the feeding-dog signal input WDI of watchdog chip and the output of first logic gates
End is connected, hand-reset endPower supply, reset signal output end are connect by pull-up resistorConnected by a switch
To an input of second logic gates；The switch usually closes, and disconnects during downloaded program.
Compared with prior art, the utility model has the advantages that：
The utility model proposes a kind of automatic reset circuit, mainly by the first watchdog circuit and the second house dog electricity
Road, the first feeding-dog signal generation circuit and the second feeding-dog signal generation circuit and the first logic gates and the second gate electricity
Road forms.The utility model by setting two-way watchdog circuit and two-way feeding-dog signal generation circuit, when watchdog circuit and/
Or feeding-dog signal generation circuit is when breaking down, as long as having watchdog circuit all the way and feeding-dog signal generation circuit normal work,
Remain able to export reset signal to the reset terminal of processor, computer is automatically reset, substantially increase the reliability of reset.
Brief description of the drawings
Fig. 1 is a kind of structural representation of automatic reset circuit of the utility model embodiment；
Fig. 2 is the connection diagram of the first watchdog circuit and the second watchdog circuit；
Fig. 3 is the inside theory of constitution block diagram of U1, U2 in Fig. 2.
In figure：The watchdog circuits of 1- first, the watchdog circuits of 2- second, 3- the first feeding-dog signal generation circuits, 4- second
Feeding-dog signal generation circuit, the logic gates of 5- first, the logic gates of 6- second.
Embodiment
The utility model is described in further detail below in conjunction with the accompanying drawings.
A kind of structural representation of automatic reset circuit of the utility model embodiment is as shown in figure 1, the automatic reset electro
Road includes：First watchdog circuit 1 and the second watchdog circuit 2, the first feeding-dog signal generation circuit 3 and the production of the second feeding-dog signal
Raw circuit 4, the first logic gates 5 and the second logic gates 6；First feeding-dog signal generation circuit 3 and the second feeding-dog signal
The output end of generation circuit 4 is connected with two inputs of the first logic gates 5 respectively, the first watchdog circuit 1 and second
Output end of the input of watchdog circuit 2 with the first logic gates 5 is connected, and the first watchdog circuit 1 and second is guarded the gate
The output end of dog circuit 2 is connected with two inputs of the second logic gates 6 respectively, the output end of the second logic gates 6
It is connected with the reset terminal of processor.
In the present embodiment, the automatic reset circuit mainly by the first watchdog circuit 1 and the second watchdog circuit 2,
First feeding-dog signal generation circuit 3 and the second feeding-dog signal generation circuit 4 and the first logic gates 5 and the second gate electricity
Road 6 forms.During computer normal work, the first feeding-dog signal generation circuit 3 and the second feeding-dog signal generation circuit 4 constantly export
Feeding-dog signal, the first watchdog circuit 1 and the second watchdog circuit 2 are delivered to after the first logic gates 5, makes the first house dog
The watchdog circuit 2 of circuit 1 and second can not export reset signal to the second logic gates 6, so as to the second logic gates 6
Computer is resetted without reset signal output；When due to interference etc. reason computer is absorbed in endless loop when, the first feeding-dog signal
The feeding-dog signal generation circuit 4 of generation circuit 3 and second can not produce feeding-dog signal, and the first watchdog circuit 1 and second are guarded the gate
Dog circuit 2 exports reset signal through judging after (can not receive feeding-dog signal in the time threshold of setting), through the second gate electricity
Reset signal is exported behind road 6 to the reset terminal of processor, restarts computer.First logic gates 5 and the second gate
As long as the function of circuit 6 is to have all the way that incoming signal level effectively just exports effective signal, specific gate circuit classification with
Input signal and output signal significant level are that high level or low level are relevant.For example resetted if processor is low level,
And first the output of watchdog circuit 1 and the second watchdog circuit 2 be that low level is effective, then the second logic gates 6 is optional
For with gate circuit, as long as the first watchdog circuit 1 and the second watchdog circuit 2 have exports low level all the way, described and gate circuit
With regard to exporting low level reset signal.The choosing method of first logic gates 5 is identical with the second logic gates 6.
The present embodiment is by setting two-way watchdog circuit (1,2), two-way feeding-dog signal generation circuit (3,4) and two-way to patrol
Volume gate circuit (5,6), when the automatic reset circuit is broken down, as long as have watchdog circuit (1 or 2) all the way and hello
Normally, just can export effective reset signal makes computer automatically reset to dog signal generating circuit (3 or 4).Substantially increase multiple
The reliability of position.
As a kind of alternative embodiment, the first feeding-dog signal generation circuit 3 and the second feeding-dog signal generation circuit 4 divide
Not Wei computer processor two different I/O mouths.
This gives a kind of technology of the first feeding-dog signal generation circuit 3 and the second feeding-dog signal generation circuit 4
Scheme.The implementation method of feeding-dog signal generation circuit is more, this gives a kind of simplest implementation, that is, uses
Two different I/O mouths of computer processor produce respectively as the first feeding-dog signal generation circuit 3 and the second feeding-dog signal
Circuit 4.Certainly, the cooperation of the need of work computer software of I/O mouths, i.e., the I/O mouths are set as height by a program statement
Level or low level, the program statement are distributed among other sentences, referring to the description of background section.
As a kind of alternative embodiment, first watchdog circuit 1 is identical with the structure of the second watchdog circuit 2,
Include model ADM8324 watchdog chip, the feeding-dog signal input WDI of watchdog chip and first logic
The output end of gate circuit 5 is connected, hand-reset endPower supply, reset signal output end are connect by pull-up resistorPass through
One switchs an input for being connected to second logic gates 6；The switch usually closes, downloaded program
When disconnect.
This gives a kind of technical scheme of the first watchdog circuit 1 and the second watchdog circuit 2.Such as Fig. 2 institutes
Show, the first watchdog circuit 1 and the second watchdog circuit 2 use identical circuit structure, mainly by a model
ADM8324 watchdog chip U1, U2 composition.ADM8324 internal structure as shown in figure 3, mainly by house dog detector and
Reseting signal generator forms.Timer is carried in ADM8324 pieces, base is independent when can be achieved.WDI is feeding-dog signal input,
House dog detector detects to the pulse signal inputted by WDI, if the pulse spacing exceeds window ranges, such as certain
Feeding-dog signal is not received in time, by control reseting signal generator output reset signal.For hand-reset input pipe
Pin, if pin input low level reset signal output endExport reset signal.Because need not be answered manually in the present embodiment
Position, so directly willPower supply is connect by pull-up resistor, hand-reset is failed.In addition, during downloaded program, dog is fed
Signal generating circuit (3,4) can not export feeding-dog signal, and watchdog circuit (1,2) resets computer by reset signal is exported,
So that computer can not normally download.Therefore, output end and second logic of the present embodiment in watchdog circuit (1,2)
Switch S1, S2 are provided between two inputs of gate circuit 6, is closed when S1, S2 are flat, is disconnected during downloaded program.
It is above-mentioned that only several specific embodiments in the utility model are illustrated, but can not be used as of the present utility model
Protection domain, the equivalent change or modification or equal proportion amplification or contracting that every design spirit according in the utility model is made
It is small etc., it is deemed to fall the scope of protection of the utility model.
Claims (3)
- A kind of 1. automatic reset circuit, it is characterised in that including：First watchdog circuit and the second watchdog circuit, first feeds Dog signal generating circuit and the second feeding-dog signal generation circuit, the first logic gates and the second logic gates；First feeds dog The output end of signal generating circuit and the second feeding-dog signal generation circuit two input phases with the first logic gates respectively Even, output end of the input of the first watchdog circuit and the second watchdog circuit with the first logic gates is connected, and first The output end of watchdog circuit and the second watchdog circuit is connected with two inputs of the second logic gates respectively, and second patrols The output end for collecting gate circuit is connected with the reset terminal of processor.
- 2. automatic reset circuit according to claim 1, it is characterised in that the first feeding-dog signal generation circuit and Two feeding-dog signal generation circuits are respectively the different I/O mouths of two of computer processor.
- 3. automatic reset circuit according to claim 1 or 2, it is characterised in that first watchdog circuit and second The structure of watchdog circuit is identical, includes model ADM8324 watchdog chip, the feeding-dog signal of watchdog chip Input WDI is connected with the output end of first logic gates, hand-reset endPower supply is connect by pull-up resistor, it is multiple Position signal output partAn input for being connected to second logic gates is switched by one；The switch Usually close, disconnected when processor downloads.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720735055.6U CN207115391U (en) | 2017-06-23 | 2017-06-23 | A kind of automatic reset circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720735055.6U CN207115391U (en) | 2017-06-23 | 2017-06-23 | A kind of automatic reset circuit |
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| Publication Number | Publication Date |
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| CN207115391U true CN207115391U (en) | 2018-03-16 |
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| CN201720735055.6U Active CN207115391U (en) | 2017-06-23 | 2017-06-23 | A kind of automatic reset circuit |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108958988A (en) * | 2018-06-13 | 2018-12-07 | 中国北方发动机研究所(天津) | A kind of minimum SCM system with redundant reset and redundancy control capability |
| CN112416646A (en) * | 2020-12-09 | 2021-02-26 | 威创集团股份有限公司 | Watchdog control circuit and watchdog circuit |
| CN112650093A (en) * | 2020-09-25 | 2021-04-13 | 合肥恒烁半导体有限公司 | Digital reset circuit applied to MCU chip |
| CN116880153A (en) * | 2023-09-07 | 2023-10-13 | 比亚迪股份有限公司 | Two-in-two system, control method thereof and railway vehicle |
-
2017
- 2017-06-23 CN CN201720735055.6U patent/CN207115391U/en active Active
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108958988A (en) * | 2018-06-13 | 2018-12-07 | 中国北方发动机研究所(天津) | A kind of minimum SCM system with redundant reset and redundancy control capability |
| CN112650093A (en) * | 2020-09-25 | 2021-04-13 | 合肥恒烁半导体有限公司 | Digital reset circuit applied to MCU chip |
| CN112650093B (en) * | 2020-09-25 | 2022-03-01 | 恒烁半导体(合肥)股份有限公司 | Digital reset circuit applied to MCU chip |
| CN112416646A (en) * | 2020-12-09 | 2021-02-26 | 威创集团股份有限公司 | Watchdog control circuit and watchdog circuit |
| CN116880153A (en) * | 2023-09-07 | 2023-10-13 | 比亚迪股份有限公司 | Two-in-two system, control method thereof and railway vehicle |
| CN116880153B (en) * | 2023-09-07 | 2024-01-09 | 比亚迪股份有限公司 | Two-in-two system, control method thereof and railway vehicle |
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| TR01 | Transfer of patent right |
Effective date of registration: 20200512 Address after: 101-10, floor 4, building 5, yard 9, Dijin Road, Haidian District, Beijing 100000 Patentee after: BEIJING ETROL OIL AND GAS TECHNOLOGY Co.,Ltd. Address before: 100095 Beijing city Haidian District P.Tricuspidata Road No. 9 Building No. 6 hospital Patentee before: BEIJING ECHO TECHNOLOGIES Co.,Ltd. |