CN207114044U

CN207114044U - A kind of positive temperature coefficient adjustable temperature sensing chip

Info

Publication number: CN207114044U
Application number: CN201720811658.XU
Authority: CN
Inventors: 姜帆; 陈利; 刘玉山
Original assignee: Xiamen Unstone Microelectronics Technology Co Ltd
Current assignee: Xiamen Xinyidai Integrated Circuit Co ltd
Priority date: 2017-07-06
Filing date: 2017-07-06
Publication date: 2018-03-16
Anticipated expiration: 2027-07-06

Abstract

A kind of positive temperature coefficient adjustable temperature sensing chip includes positive temperature coefficient sensing circuit, compensation circuit, analog to digital conversion circuit, clock circuit, logic control circuit, serial interface circuit and memory cell；The compensation circuit is connected with the sensing circuit, and the factor that temperature sense precision is influenceed on positive temperature coefficient sensor circuit compensates；The output of positive temperature coefficient sensing circuit is carried out transformation of the analog quantity to digital quantity by analog-digital conversion circuit as described, improves the noise resisting ability of output；For the serial interface circuit as chip and the communication interface of external signal, it is exported the sensing amount for reflecting temperature information；The memory cell input is connected with the serial interface circuit, two ports that client passes through serial interface circuit, the temperature coefficient for needing to adjust is stored in the unit, memory cell output end is connected with the positive temperature coefficient sensing circuit, positive temperature coefficient sensing circuit is trimmed, adjusts the temperature coefficient of chip.

Description

A kind of positive temperature coefficient adjustable temperature sensing chip

Technical field

A kind of sensing chip is the utility model is related to, a kind of positive temperature coefficient adjustable temperature sensing chip is especially provided.

Background technology

Traditional temperature sensor is typically using devices such as thermocouple, RTD, bimetal releases, by encapsulation volume Influence, be unfavorable for integrating, be unfavorable for the miniaturization of product.Traditional single chip integrated silicon substrate temperature sensor chip in addition, For the process of production due to the influence of the factors such as process drift, encapsulation stress, the temperature coefficient of finished product has a fluctuation, product it is consistent Property is poor.

Utility model content

In order to solve the above problems, the purpose of this utility model is to provide that a kind of finished product uniformity is good, measurement is accurate, height Integrated positive temperature coefficient adjustable temperature sensing chip, it is by positive temperature coefficient sensing circuit and its compensation circuit, analog-to-digital conversion Circuit, serial interface circuit etc. are integrated on chip piece simultaneously, at the same terminal applies client can by serial interface circuit and Memory cell trims to the positive temperature coefficient of chip.

To reach above-mentioned purpose, the technical solution of the utility model is as follows：A kind of positive temperature coefficient adjustable temperature senses core Piece, including positive temperature coefficient sensing circuit, compensation circuit, analog to digital conversion circuit, clock circuit, logic control circuit, serial interface Mouth circuit and memory cell；The positive temperature coefficient sensing circuit is the main part of chip, and its output voltage is with temperature sensor Rising and linear rise；The compensation circuit is connected with the sensing circuit, influences temperature to positive temperature coefficient sensor circuit The factor of induction precision compensates；Analog-digital conversion circuit as described is connected with the positive temperature coefficient sensor circuit, by positive temperature The output of coefficient sensing circuit carries out transformation of the analog quantity to digital quantity, improves the noise resisting ability of output；The clock circuit Clock signal is provided for chip internal, is connected with analog-digital conversion circuit as described and logic control circuit；The logic control circuit Logic control signal is provided for chip internal, output end is connected with analog-digital conversion circuit as described and serial interface circuit；The string The output end of line interface circuit input end and analog-digital conversion circuit as described connects, as chip and the communication interface of external signal, It is exported the sensing amount for reflecting temperature information；The memory cell input is connected with the serial interface circuit, visitor Two ports that family passes through serial interface circuit, it would be desirable to which the temperature coefficient of adjustment is stored in the unit, memory cell output end It is connected with the positive temperature coefficient sensing circuit, positive temperature coefficient sensing circuit is trimmed, adjusts the temperature coefficient of chip.

Further, the positive temperature coefficient sensing circuit includes power supply, start-up circuit, positive temperature coefficient voltage generation circuit With voltage follower circuit I0；The power supply is connected with the start-up circuit and positive temperature coefficient voltage generation circuit, for powering； The start-up circuit includes the first p-type FET MP1, the second p-type FET MP2, the first N-type field-effect MN1, the 2nd N Type FET MN2 and diode D1, it is connected with the positive temperature coefficient voltage generation circuit, electricity is initial on the supply voltage When, provide initial current for positive temperature coefficient voltage generation circuit；The positive temperature coefficient voltage generation circuit includes the 3rd p-type FET MP3, the 4th p-type FET MP4, the 5th p-type FET MP5, the first triode Q1, the second triode Q2, Resistance R1 and trim electric resistance array Rtrim；The voltage follower circuit I0 is connected with the positive temperature coefficient voltage generation circuit, Load capacity is driven for strengthening.

Further, the drain electrode of the first p-type FET MP1 connects power supply, source electrode respectively with the diode D1 just The drain electrode of pole and the first N-type FET MN1 is connected, and grid is connected with ground signalling；The second p-type FET MP2's Drain electrode connect power supply, source electrode is connected with the drain electrode of the second N-type FET MN2, grid respectively with the 3rd p-type field-effect Pipe MP3 grid and the 4th p-type FET MP4 grid are connected；The drain electrode of the first N-type FET MN1 respectively with The source electrode of the first p-type FET MP1 is connected with diode D1 positive pole, and source electrode is connected with ground signalling, grid and institute The grid for stating the second N-type FET MN2 is connected；The drain electrode of the second N-type FET MN2 is imitated with the second p-type field Should pipe MP2 source electrode be connected, source electrode is connected with ground signalling, and grid is connected with the grid of the first N-type FET MN1, And drain electrode is joined directly together with grid both ends, the first N-type FET MN1 and the second N-type FET MN2 form current mirror Relation；The positive pole of the diode D1 source electrode and the first N-type FET with the first p-type FET MP1 respectively MN1 drain electrode is connected, negative pole respectively with the source electrode of the 3rd p-type FET MP3 and the first triode Q1 colelctor electrode phase Even；The drain electrode of the 3rd p-type FET MP3 connects the power supply, the source electrode negative pole and first with the diode D1 respectively Triode Q1 colelctor electrode is connected, the grid grid and the 4th p-type FET with the second p-type FET MP2 respectively MP4 grid is connected；The drain electrode of the 4th p-type FET MP4 connects the power supply, source electrode respectively with the 5th p-type field Effect pipe MP5 grid and the second triode Q2 colelctor electrode are connected, and grid is respectively with the second p-type FET MP2's Grid and the 3rd p-type FET MP3 grid are connected, and grid and source electrode both ends are joined directly together, the second p-type field-effect Pipe MP2 and the 4th p-type FET MP4 forms the relation of current mirror；The drain electrode of the 5th p-type FET MP5 connects described Power supply, positive input terminal of the source electrode respectively with described one end for trimming electric resistance array Rtrim and voltage follower circuit I0 are connected, grid Pole is connected with the source electrode of the 4th p-type FET MP4 and the second triode Q2 colelctor electrode respectively；First triode Q1 colelctor electrode and base stage both ends are joined directly together, the colelctor electrode negative pole and the 3rd p-type FET with the diode D1 respectively MP3 source electrode is connected, and base stage is connected with the base stage of the second triode Q2, and emitter stage is connected with ground signalling；Described second Triode Q2 colelctor electrode respectively with the source electrode of the 4th p-type FET MP4 and the 5th p-type FET MP5 grid It is connected, base stage is connected with the base stage of the first triode Q1, and emitter stage is connected with one end of the resistance R1；The resistance R1 one end is connected with the emitter stage of the second triode Q2, and the other end is connected with ground signalling；It is described to trim electric resistance array Rtrim one end is connected with the source electrode of the 5th P type FETs MP5 and voltage follower circuit I0 positive input terminal respectively, The other end is connected with ground signalling.

Further, the resistance R1 and to trim electric resistance array Rtrim be same type resistance, and strictly match.

Further, the positive temperature coefficient temperature sensing circuit trim electric resistance array Rtrim include initial resistance Rint, Same type matching trims resistance R, 2R, 4R, 8R, 16R and switch K1, K2, K3, K4, K5, by it is described trim resistance R, 2R, 4R, After 8R, 16R connect with switch K1, K2, K3, K4, K5 one-to-one corresponding, it is formed in parallel respectively with the initial resistance Rint.

The beneficial effects of the utility model are：The utility model is semiconducting positive temperature coefficient adjustable temperature sensing chip, Positive temperature coefficient sensing circuit and its compensation circuit, analog to digital conversion circuit, serial interface circuit etc. are integrated in one piece of core simultaneously On piece, while terminal applies client can be trimmed by serial interface circuit and memory cell to the positive temperature coefficient of chip, Realize the application characteristic that finished product uniformity is good, measurement is accurate, highly integrated.

Brief description of the drawings

Fig. 1 is the utility model positive temperature coefficient adjustable temperature sensing chip Organization Chart；Fig. 2 is the positive temperature of the utility model The circuit diagram of coefficient temperature sensing circuit；Fig. 3 is the structural representation that the utility model trims electric resistance array.

Embodiment

Specific embodiment of the present utility model is described in detail below in conjunction with the accompanying drawings.

As illustrated, a kind of positive temperature coefficient adjustable temperature sensing chip, including positive temperature coefficient sensing circuit, compensation electricity Road, analog to digital conversion circuit, clock circuit, logic control circuit, serial interface circuit and memory cell；The positive temperature coefficient passes Inductive circuit be chip main part, its output voltage linear rise with the rising of temperature sensor；The compensation circuit and institute Sensing circuit connection is stated, to shadows such as the process drift of positive temperature coefficient sensor circuit, voltage pulsation, internal noise, encapsulation stress The factor for ringing temperature sense precision compensates；Analog-digital conversion circuit as described is connected with the positive temperature coefficient sensor circuit, will The output of positive temperature coefficient sensing circuit carries out transformation of the analog quantity to digital quantity, improves the noise resisting ability of output；When described Clock circuit provides clock signal for chip internal, is connected with analog-digital conversion circuit as described and logic control circuit；The logic control Circuit processed provides logic control signal for chip internal, and output end is connected with analog-digital conversion circuit as described and serial interface circuit； The output end connection of the serial interface circuit input and analog-digital conversion circuit as described, the communication as chip and external signal Interface, it is exported the sensing amount for reflecting temperature information；The memory cell input connects with the serial interface circuit Connect, two ports that client passes through serial interface circuit, it would be desirable to which the temperature coefficient of adjustment is stored in the unit, and memory cell is defeated Go out end to be connected with the positive temperature coefficient sensing circuit, positive temperature coefficient sensing circuit is trimmed, adjusts the temperature of chip Coefficient.

The positive temperature coefficient sensing circuit includes power supply, start-up circuit, positive temperature coefficient voltage generation circuit and voltage Follow circuit I 0；The power supply is connected with the start-up circuit and positive temperature coefficient voltage generation circuit, for powering；It is described to open Dynamic circuit includes the first p-type FET MP1, the second p-type FET MP2, the first N-type field-effect MN1, the second N-type field effect Should pipe MN2 and diode D1, be connected with the positive temperature coefficient voltage generation circuit, when electric initial on the supply voltage, for just Temperaturecoefficient voltage generation circuit provides initial current；The positive temperature coefficient voltage generation circuit includes the 3rd p-type field-effect Pipe MP3, the 4th p-type FET MP4, the 5th p-type FET MP5, the first triode Q1, the second triode Q2, resistance R1 With trim electric resistance array Rtrim；The voltage follower circuit I0 is connected with the positive temperature coefficient voltage generation circuit, for increasing Strong driving load capacity.

The drain electrode of the first p-type FET MP1 connects power supply, the source electrode positive pole and first with the diode D1 respectively N-type FET MN1 drain electrode is connected, and grid is connected with ground signalling；The drain electrode of the second p-type FET MP2 connects electricity Source, source electrode are connected with the drain electrode of the second N-type FET MN2, and grid is respectively with the 3rd p-type FET MP3's Grid and the 4th p-type FET MP4 grid are connected；The drain electrode of the first N-type FET MN1 is respectively with described first P-type FET MP1 source electrode is connected with diode D1 positive pole, and source electrode is connected with ground signalling, grid and second N-type FET MN2 grid is connected；The drain electrode of the second N-type FET MN2 is with the second p-type FET MP2's Source electrode is connected, and source electrode is connected with ground signalling, and grid is connected with the grid of the first N-type FET MN1, and drain electrode and grid Pole both ends are joined directly together, the relation of the first N-type FET MN1 and the 2nd N type FETs MN2 composition current mirrors；Institute State the diode D1 positive pole drain electrode with the source electrode and the first N-type FET MN1 of the first p-type FET MP1 respectively It is connected, negative pole is connected with the source electrode of the 3rd p-type FET MP3 and the first triode Q1 colelctor electrode respectively；Described Three p-type FET MP3 drain electrode connects the power supply, source electrode respectively with the negative pole of the diode D1 and the first triode Q1 Colelctor electrode is connected, grid respectively with the grid of the second p-type FET MP2 and the 4th p-type FET MP4 grid phase Even；The drain electrode of the 4th p-type FET MP4 connects the power supply, and source electrode is respectively with the 5th p-type FET MP5's Grid and the second triode Q2 colelctor electrode are connected, the grid grid and the 3rd P with the second p-type FET MP2 respectively Type FET MP3 grid is connected, and grid and source electrode both ends are joined directly together, the second p-type FET MP2 and the 4th P-type FET MP4 forms the relation of current mirror；The drain electrode of the 5th p-type FET MP5 connects the power supply, source electrode point Positive input terminal not with described one end for trimming electric resistance array Rtrim and voltage follower circuit I0 is connected, grid respectively with it is described 4th p-type FET MP4 source electrode and the second triode Q2 colelctor electrode are connected；The colelctor electrode of the first triode Q1 and Base stage both ends are joined directly together, colelctor electrode respectively with the negative pole of the diode D1 and the 3rd p-type FET MP3 source electrode phase Even, base stage is connected with the base stage of the second triode Q2, and emitter stage is connected with ground signalling；The collection of the second triode Q2 Electrode is connected with the source electrode of the 4th p-type FET MP4 and the 5th p-type FET MP5 grid respectively, base stage with The base stage of the first triode Q1 is connected, and emitter stage is connected with one end of the resistance R1；One end of the resistance R1 and institute The emitter stage for stating the second triode Q2 is connected, and the other end is connected with ground signalling；Described one end for trimming electric resistance array Rtrim It is connected respectively with the source electrode of the 5th P type FETs MP5 and voltage follower circuit I0 positive input terminal, the other end is with connecing Earth signal is connected.

The resistance R1 and to trim electric resistance array Rtrim be same type resistance, and strictly match.

The electric resistance array Rtrim that trims of the positive temperature coefficient temperature sensing circuit includes initial resistance Rint, same type Matching trims resistance R, 2R, 4R, 8R, 16R and switch K1, K2, K3, K4, K5, and resistance R, 2R, 4R, 8R, 16R are trimmed by described Correspond with described switch K1, K2, K3, K4, K5 after connecting, be formed in parallel respectively with the initial resistance Rint.

The start-up course of positive temperature coefficient sensing circuit：First p-type FET MP1 and diode D1 are in supply voltage When the upper electricity of VDD is initial, initial current is provided for the first triode Q1, after supply voltage VDD power up terminates, the 4th p-type FET MP4 provides stable bias current, and the second p-type FET MP2 and the 4th p-type FET MP4 form electric current The relation of mirror, the first N-type FET MN1 and the second N-type FET MN2 also form the relation of current mirror, because p-type field is imitated Should the breadth length ratio of pipe be much smaller than the breadth length ratio of N-type FET, therefore the first N FETs MN1 drain terminal current potential is diode D1 anode potential is pulled down to the level close to GND, diode cut-off, so start-up circuit departs from positive temperature coefficient temperature and passed The main body circuit of inductive circuit, i.e. positive temperature coefficient voltage generation circuit part, so as to complete the start-up course of the circuit.

In the main body circuit of positive temperature coefficient sensing circuit, the 4th p-type FET MP4 electric current is determined by following formula It is fixed：

In formula, V_beQ11And V_beQ12Respectively the first triode Q1 and the second triode Q2 base stages and emitter stage forward conduction Voltage；V_TFor thermal voltage, physical quantity；I_C1And I_C2Respectively the first triode Q1 and the second triode Q2 collector current, this I in example_C1=I_C2；I_S1And I_S2For the first triode Q1 and the second triode Q2 collector saturation current, the physical quantity is with three The base-emitter junction area of pole pipe is relevant, and the second triode Q2 base-emitter junction area is set in this example as the one or three N times of pole pipe Q1, i.e. I_S2=N*I_S1。

Formula (1) can be reduced to：

4th p-type FET MP4 and the 5th p-type FET MP5 form current mirror, thus both drain terminal electric currents into Proportionate relationship：

I_d(MP5)=M*I_d(MP4)……………………………………………………(3)

Voltage follower circuit I0 positive-negative input end is that p-type FET makes, and its input and output electric current is approximately zero, Therefore flow through trim electric resistance array Rtrim electric current be the 5th p-type FET MP5 drain terminals electric current.Voltage follower circuit The voltage of I0 positive input terminal is：

The voltage strengthens it and drives load capacity by voltage follower circuit I0 output：

Wherein, resistance R1 and to trim electric resistance array Rtrim be same type resistance, and strictly match, its temperature coefficient phase Mutually offset, V_TFor positive temperature coefficient voltage, therefore the output Vout of final circuit is positive temperature coefficient.

Electric resistance array Rtrim is trimmed as shown in figure 3, K1-K5 is switching signal, H represents high level, represents switch conduction, L represents low level, represents to switch off, and Rint is initial resistance, and R, 2R, 4R, 8R, 16R are the incremental same type matching of 2 times of resistance Resistance is trimmed, therefore the all-in resistance for trimming electric resistance array Rtrim is：

Rtrim=Rint+K1*R+K2*2R+K3*4R+K4*8R+K5*16R ... ... ... ... ... ... (10)

Whole circuit designs for micro energy lose, and the electric current of consumption can be neglected in temperature rise caused by chip, reduce itself circuit Influence to temperature sensing circuit temperature test, improve the precision of temperature test.

Above is preferably implement to be illustrated to of the present utility model, but the invention is not limited to the reality Example is applied, those skilled in the art can also make a variety of equivalent variations on the premise of without prejudice to the utility model spirit Or replace, these equivalent deformations or replacement are all contained in the application claim limited range.

Claims

A kind of 1. positive temperature coefficient adjustable temperature sensing chip, it is characterised in that：Including positive temperature coefficient sensing circuit, compensation electricity Road, analog to digital conversion circuit, clock circuit, logic control circuit, serial interface circuit and memory cell；The positive temperature coefficient passes Inductive circuit be chip main part, its output voltage linear rise with the rising of temperature sensor；The compensation circuit and institute Sensing circuit connection is stated, the factor that temperature sense precision is influenceed on positive temperature coefficient sensor circuit compensates；The modulus turns Change circuit to be connected with the positive temperature coefficient sensor circuit, the output of positive temperature coefficient sensing circuit is subjected to analog quantity to numeral The transformation of amount, improve the noise resisting ability of output；The clock circuit provides clock signal for chip internal, turns with the modulus Circuit is changed to connect with logic control circuit；The logic control circuit provides logic control signal for chip internal, output end with Analog-digital conversion circuit as described connects with serial interface circuit；The serial interface circuit input and analog-digital conversion circuit as described Output end is connected, and as chip and the communication interface of external signal, it is exported the sensing amount for reflecting temperature information；It is described Memory cell input is connected with the serial interface circuit, two ports that client passes through serial interface circuit, it would be desirable to adjust Whole temperature coefficient is stored in the unit, and memory cell output end is connected with the positive temperature coefficient sensing circuit, aligns temperature Coefficient sensing circuit is trimmed, and adjusts the temperature coefficient of chip.
A kind of 2. positive temperature coefficient adjustable temperature sensing chip according to claim 1, it is characterised in that：The positive temperature Coefficient sensing circuit includes power supply, start-up circuit, positive temperature coefficient voltage generation circuit and voltage follower circuit I0；The power supply It is connected with the start-up circuit and positive temperature coefficient voltage generation circuit, for powering；The start-up circuit includes the first p-type field Effect pipe MP1, the second p-type FET MP2, the first N-type FET MN1, the second N-type FET MN2 and diode D1, It is connected with the positive temperature coefficient voltage generation circuit, when electric initial on the supply voltage, electricity is produced for positive temperature coefficient voltage Road provides initial current；The positive temperature coefficient voltage generation circuit includes the 3rd p-type FET MP3, the 4th p-type field-effect Pipe MP4, the 5th p-type FET MP5, the first triode Q1, the second triode Q2, resistance R1 and trim electric resistance array Rtrim； The voltage follower circuit I0 is connected with the positive temperature coefficient voltage generation circuit, and load capacity is driven for strengthening.
A kind of 3. positive temperature coefficient adjustable temperature sensing chip according to claim 2, it is characterised in that：First P Type FET MP1 drain electrode connects power supply, source electrode respectively with the positive pole of the diode D1 and the first N-type FET MN1 Drain electrode is connected, and grid is connected with ground signalling；The drain electrode of the second p-type FET MP2 connects power supply, source electrode and described second N-type FET MN2 drain electrode is connected, and grid is imitated with the grid of the 3rd p-type FET MP3 and the 4th p-type field respectively Should pipe MP4 grid be connected；The drain electrode of the first N-type FET MN1 is respectively with the first p-type FET MP1's Source electrode is connected with diode D1 positive pole, and source electrode is connected with ground signalling, the grid of grid and the second N-type FET MN2 Extremely it is connected；The drain electrode of the second N-type FET MN2 is connected with the source electrode of the second p-type FET MP2, source electrode with Ground signalling is connected, and grid is connected with the grid of the first N-type FET MN1, and drain electrode is joined directly together with grid both ends, The first N-type FET MN1 and the second N-type FET MN2 forms the relation of current mirror；The positive pole of the diode D1 The drain electrode with the source electrode and the first N-type FET MN1 of the first p-type FET MP1 is connected respectively, negative pole respectively with institute The colelctor electrode of the source electrode and the first triode Q1 of stating the 3rd p-type FET MP3 is connected；The 3rd p-type FET MP3's Drain electrode connects the power supply, and source electrode is connected with the negative pole of the diode D1 and the first triode Q1 colelctor electrode respectively, grid point It is not connected with the grid of the second p-type FET MP2 and the 4th p-type FET MP4 grid；The 4th p-type field Effect pipe MP4 drain electrode connects the power supply, the source electrode grid and the second triode with the 5th p-type FET MP5 respectively Q2 colelctor electrode is connected, grid respectively with the grid of the second p-type FET MP2 and the 3rd p-type FET MP3 grid Extremely it is connected, and grid and source electrode both ends are joined directly together, the second p-type FET MP2 and the 4th p-type FET MP4 structures Into the relation of current mirror；The drain electrode of the 5th p-type FET MP5 connects the power supply, and source electrode trims resistance with described respectively Array Rtrim one end is connected with voltage follower circuit I0 positive input terminal, grid respectively with the 4th p-type FET MP4 source electrode and the second triode Q2 colelctor electrode are connected；The direct phase of colelctor electrode and base stage both ends of the first triode Q1 Even, colelctor electrode is connected with the negative pole of the diode D1 and the 3rd p-type FET MP3 source electrode respectively, base stage and described the Two triode Q2 base stage is connected, and emitter stage is connected with ground signalling；The colelctor electrode of the second triode Q2 respectively with it is described 4th p-type FET MP4 source electrode and the 5th p-type FET MP5 grid are connected, base stage and the first triode Q1 Base stage be connected, emitter stage is connected with one end of the resistance R1；One end of the resistance R1 is with the second triode Q2's Emitter stage is connected, and the other end is connected with ground signalling；Described one end for trimming electric resistance array Rtrim respectively with the 5th p-type FET MP5 source electrode is connected with voltage follower circuit I0 positive input terminal, and the other end is connected with ground signalling.
A kind of 4. positive temperature coefficient adjustable temperature sensing chip according to Claims 2 or 3, it is characterised in that：The electricity It is same type resistance to hinder R1 and trim electric resistance array Rtrim, and is strictly matched.
A kind of 5. positive temperature coefficient adjustable temperature sensing chip piece according to Claims 2 or 3, it is characterised in that：It is described The electric resistance array Rtrim that trims of positive temperature coefficient temperature sensing circuit trims resistance including initial resistance Rint, same type matching R, 2R, 4R, 8R, 16R and switch K1, K2, K3, K4, K5, by it is described trim resistance R, 2R, 4R, 8R, 16R and the switch K1, After K2, K3, K4, K5 correspond series connection, it is formed in parallel respectively with the initial resistance Rint.