CN207053470U - A kind of oscillator - Google Patents

A kind of oscillator Download PDF

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Publication number
CN207053470U
CN207053470U CN201720953160.7U CN201720953160U CN207053470U CN 207053470 U CN207053470 U CN 207053470U CN 201720953160 U CN201720953160 U CN 201720953160U CN 207053470 U CN207053470 U CN 207053470U
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oxide
metal
semiconductor
input
charge
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陆敏
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Hefei Can Core Technology Co Ltd
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Hefei Can Core Technology Co Ltd
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Abstract

The utility model provides a kind of oscillator, and it includes:Reference voltage/current generation circuit and pierce circuit.In reference voltage/current generation circuit, first resistor is connected between voltage source and first metal-oxide-semiconductor one end, and first metal-oxide-semiconductor other end ground connection, the first metal-oxide-semiconductor grid is connected with first metal-oxide-semiconductor one end;Second metal-oxide-semiconductor grid is connected with the first metal-oxide-semiconductor grid, second metal-oxide-semiconductor other end ground connection;3rd metal-oxide-semiconductor grid is connected with the first metal-oxide-semiconductor grid, the 3rd another ground connection of metal-oxide-semiconductor, and the first metal-oxide-semiconductor grid voltage is reference voltage, and the electric current of second metal-oxide-semiconductor one end is the first reference current, and the electric current of the 3rd metal-oxide-semiconductor one end is the second reference current.In pierce circuit, first electric capacity one end is connected with voltage source, and two inputs of the first comparison circuit are connected with the first electric capacity other end and reference voltage respectively;Second electric capacity one end is connected with voltage source, and two inputs of the second comparison circuit are connected with the second electric capacity other end and reference voltage respectively.Compared with prior art, the chip area and power consumption that the utility model takes significantly reduce.

Description

A kind of oscillator
【Technical field】
Technical field of circuit design is the utility model is related to, more particularly to a kind of frequency is not with the vibration of mains voltage variations Device.
【Background technology】
Synchronous digital circuit can be all typically included inside integrated circuit, synchronous digital circuit is required for an accurately clock To do synchronization.If if this clock, we are realized with built-in oscillator, in order to ensure the precision of clock, we can want Clock frequency is asked not change with the change of supply voltage.
The pierce circuit that traditional frequency does not change with the change of supply voltage is as shown in figure 1, we can be found that The inside is in addition to oscillator (OSC) itself, it is also necessary to which a band-gap reference generator bandgap is used for producing reference voltage VBG, in addition, it is also necessary to which a biasing circuit BIAS is used for producing two-way equal reference current IREF1 and IREF2.
From the principle of band-gap reference, VBG is a voltage not changed with mains voltage variations.And from BIAS circuits Formula can be obtained
Wherein, M is MP2 (MP3) and MP1 ratio, and RSET is resistance, so as to visible IREF1 and IREF2 numerical value It will not change with mains voltage variations.
Formula can be obtained from OSC circuits
Wherein Freq is the frequency for exporting clock CLK.Because IREF1, C1, VBG do not change with mains voltage variations, So Freq does not also change with mains voltage variations.
Although above-mentioned this way has obtained the frequency not changed with mains voltage variations, but the cost paid compares It is big, it is necessary to arrange in pairs or groups a band-gap reference Bandgap and a BIAS circuit, so as to cause area and power consumption all to increase, finally Cause the decline of product competitiveness.
【Utility model content】
The purpose of this utility model is to provide a kind of frequency not with the oscillator of mains voltage variations, its chip taken Area and power consumption can significantly reduce.
In order to solve the above problems, the utility model provides a kind of oscillator, and it includes:Reference voltage/current produces electricity Road, and pierce circuit.The reference voltage/current generation circuit includes the first metal-oxide-semiconductor, the second metal-oxide-semiconductor, the 3rd metal-oxide-semiconductor And first resistor, first resistor are connected between voltage source and the first connection end of the first metal-oxide-semiconductor, the second of the first metal-oxide-semiconductor connects End ground connection is connect, the control terminal of the first metal-oxide-semiconductor is connected with the first connection end of the first metal-oxide-semiconductor;The control terminal of second metal-oxide-semiconductor and first The control terminal of metal-oxide-semiconductor is connected, the second connection end ground connection of the second metal-oxide-semiconductor;The control terminal of 3rd metal-oxide-semiconductor and the control of the first metal-oxide-semiconductor End processed is connected, the second connection end ground connection of the 3rd metal-oxide-semiconductor, wherein, the voltage of the control terminal of the first metal-oxide-semiconductor is reference voltage, the The electric current of first connection end of two metal-oxide-semiconductors is the first reference current, and the electric current of the first connection end of the 3rd metal-oxide-semiconductor is the second reference Electric current.The pierce circuit includes the first oscillating unit and the second oscillating unit, and first oscillating unit includes the first ratio Compared with circuit, the first charge/discharge control circuit and the first electric capacity, one end of first electric capacity is connected with voltage source, and described first The other end of electric capacity is connected with the first input end of the first comparison circuit, the second input of first comparison circuit with it is described Reference voltage is connected;Second oscillating unit includes the second comparison circuit, the second charge/discharge control circuit and the second electric capacity, One end of second electric capacity is connected with voltage source, the other end of second electric capacity and the first input end of the second comparison circuit It is connected, the second input of second comparison circuit is connected with the reference voltage.Based on first reference current to The first electric capacity in one oscillating unit is charged, and the first comparison circuit is less than or equal to institute in the voltage of the first electric capacity other end When stating reference voltage, notify that the first charge/discharge control circuit starts electric discharge and the second charge/discharge control circuit starts to charge up;Base The second electric capacity of the second oscillating unit is charged in the second reference current IREF2, the second comparison circuit is in the second electricity When the voltage of the appearance other end is less than or equal to the reference voltage, the second charge/discharge control circuit is notified to start electric discharge and first Charge/discharge control circuit starts to charge up.
Further, first metal-oxide-semiconductor, the second metal-oxide-semiconductor and the 3rd metal-oxide-semiconductor are nmos pass transistor, the first MOS Pipe, the drain electrode that the first connection end of the second metal-oxide-semiconductor and the 3rd metal-oxide-semiconductor is nmos pass transistor, first metal-oxide-semiconductor, the second metal-oxide-semiconductor With the source electrode that the second connection end of the 3rd metal-oxide-semiconductor is nmos pass transistor, first metal-oxide-semiconductor, the second metal-oxide-semiconductor and the 3rd MOS Control terminal is the grid of nmos pass transistor.
Further, first reference current and the second reference current are equal.
Further, first charge/discharge control circuit includes the 4th metal-oxide-semiconductor and the 5th metal-oxide-semiconductor, wherein, the 4th MOS First connection end of pipe is connected with voltage source, and its second connection end is connected with the first connection end of the 5th metal-oxide-semiconductor, the 5th metal-oxide-semiconductor Second connection end be connected with first reference current, the connecting node between the 4th metal-oxide-semiconductor and the 5th metal-oxide-semiconductor and described the The other end of one electric capacity is connected, when first charge/discharge control circuit is notified electric discharge, the 4th metal-oxide-semiconductor conducting and the 5th Metal-oxide-semiconductor turns off;When first charge/discharge control circuit is notified charging, the shut-off of the 4th metal-oxide-semiconductor and the conducting of the 5th metal-oxide-semiconductor, Now the first reference current is charged by the 5th metal-oxide-semiconductor to the first electric capacity.Second charge/discharge control circuit includes the 6th Metal-oxide-semiconductor and the 7th metal-oxide-semiconductor, wherein, the first connection end of the 6th metal-oxide-semiconductor is connected with voltage source, its second connection end and the 7th MOS First connection end of pipe is connected, and the second connection end of the 7th metal-oxide-semiconductor is connected with second reference current, the 6th metal-oxide-semiconductor and Connecting node between seven metal-oxide-semiconductors is connected with the other end of second electric capacity, when second charge/discharge control circuit is led to When knowing electric discharge, the conducting of the 6th metal-oxide-semiconductor and the shut-off of the 7th metal-oxide-semiconductor;When second charge/discharge control circuit is notified charging, 6th metal-oxide-semiconductor is turned off and the 7th metal-oxide-semiconductor turns on, and now, the second reference current is charged by the 7th metal-oxide-semiconductor to the second electric capacity.
Further, the 4th metal-oxide-semiconductor and the 6th metal-oxide-semiconductor are PMOS transistor, the 4th metal-oxide-semiconductor and the 6th MOS First connection end of pipe is the source electrode of PMOS transistor, and the second connection end of the 4th metal-oxide-semiconductor and the 6th metal-oxide-semiconductor is brilliant for PMOS The drain electrode of body pipe;5th metal-oxide-semiconductor and the 7th metal-oxide-semiconductor are nmos pass transistor, the of the 5th metal-oxide-semiconductor and the 7th metal-oxide-semiconductor One connection end is the drain electrode of nmos pass transistor, and the second connection end of the 5th metal-oxide-semiconductor and the 7th metal-oxide-semiconductor is nmos pass transistor Source electrode.
Further, the first input end of the first comparison circuit and the second input are respectively the forward direction of the first comparison circuit Input and reverse input end;The first input end of second comparison circuit and the second input be respectively the second comparison circuit just To input and reverse input end, first oscillating unit and the second oscillating unit share a logic circuit, the logic electricity Road includes the first phase inverter, the second phase inverter, the first nor gate and the second nor gate, wherein, the input of the first phase inverter with The output end of first comparison circuit is connected, and the output end of the first phase inverter is connected with an input of the first nor gate, first or Another input of NOT gate is connected with the output end of the second nor gate, the output end of the first nor gate and the 4th metal-oxide-semiconductor and the 5th The grid of metal-oxide-semiconductor is connected;The input of second phase inverter is connected with the output end of the second comparison circuit, the output of the second phase inverter End is connected with an input of the second nor gate, and another input of the second nor gate is connected with the output end of the first nor gate, The output end of second nor gate is connected with the 6th metal-oxide-semiconductor MP2 and the 7th metal-oxide-semiconductor grid.
Further, relationship below is obtained by the reference voltage/current generation circuit:
Wherein, IREF1 is the current value of the first reference current, and IREF2 is the current value of the second reference current, and VDD is electricity The magnitude of voltage of potential source, RSET are the resistance value of first resistor, and M is the ratio of the second metal-oxide-semiconductor and the first metal-oxide-semiconductor, or M is the 3rd The ratio of metal-oxide-semiconductor and the first metal-oxide-semiconductor.Because the VDD rates of climb are more than the VBN rates of climb, so with VDD rising, first Reference current and the second reference current can also increase.
Further, below equation is obtained by the pierce circuit:
Wherein, Freq be the pierce circuit output frequency, C1 be the first electric capacity capacitance, IREF1 first The current value of reference current, IREF2 are the current value of the second reference current, and VDD is the magnitude of voltage of voltage source, and RSET is the first electricity The resistance value of resistance, M are the ratio of the second metal-oxide-semiconductor and the first metal-oxide-semiconductor, and M is also the ratio of the 3rd metal-oxide-semiconductor and the first metal-oxide-semiconductor, can See, output frequency Freq and M, C1 are relevant with RSET, and unrelated with VDD.
Compared with prior art, the utility model need not use Bandgap and BIAS circuits, and it is used including an electricity Resistance and the reference voltage/current generation circuit of three transistors, it is possible to produce reference voltage VBN, reference current IREF1 and IREF2, so as to realize oscillator that frequency do not change with mains voltage variations with smaller area and power consumption.
【Brief description of the drawings】
It is required in being described below to embodiment in order to illustrate more clearly of the technical scheme of the utility model embodiment The accompanying drawing used is briefly described, it should be apparent that, drawings in the following description are only some implementations of the present utility model Example, for those of ordinary skill in the art, without having to pay creative labor, can also be according to these accompanying drawings Obtain other accompanying drawings.Wherein:
Fig. 1 is a kind of circuit diagram for the oscillator that traditional frequency does not change with the change of supply voltage;
Fig. 2 is the oscillator that the frequency of the utility model in one embodiment does not change with the change of supply voltage Circuit diagram.
【Embodiment】
To enable above-mentioned purpose of the present utility model, feature and advantage more obvious understandable, below in conjunction with the accompanying drawings and tool Body embodiment is described in further detail to the utility model.
" one embodiment " or " embodiment " referred to herein refers to may be included at least one realization side of the utility model Special characteristic, structure or characteristic in formula." in one embodiment " that different places occur in this manual not refers both to Same embodiment, nor the single or selective embodiment mutually exclusive with other embodiment.Unless stated otherwise, The word that the expression connect, be connected, connecting herein is electrically connected with represents directly or indirectly to be electrical connected.
Fig. 2 is the oscillator that the frequency of the utility model in one embodiment does not change with the change of supply voltage Circuit diagram.The oscillator includes reference voltage/current generation circuit 210, and pierce circuit 220.
The reference voltage/current generation circuit 210 is used to produce reference voltage VBN, the first reference current IREF1 and the Two reference current IREF2.The reference voltage/current generation circuit 210 includes the first metal-oxide-semiconductor MN1, the second metal-oxide-semiconductor MN2, the Three metal-oxide-semiconductor MN3 and first resistor RSET.First resistor RSET is connected to voltage source VDD and the first metal-oxide-semiconductor MN1 the first connection Between end, the first metal-oxide-semiconductor MN1 second connection end ground connection, the first metal-oxide-semiconductor MN1 control terminal and the first of the first metal-oxide-semiconductor MN1 Connection end is connected;Second metal-oxide-semiconductor MN2 control terminal is connected with the first metal-oxide-semiconductor MN1 control terminal, and the second of the second metal-oxide-semiconductor MN2 Connection end is grounded;3rd metal-oxide-semiconductor MN3 control terminal is connected with the first metal-oxide-semiconductor MN1 control terminal, and the second of the 3rd metal-oxide-semiconductor MN3 Connection end is grounded.Wherein, the voltage of the first metal-oxide-semiconductor MN1 control terminals is the reference voltage VBN, the first of the second metal-oxide-semiconductor MN2 The electric current of connection end is the first reference current IREF1, and the electric current of the 3rd metal-oxide-semiconductor MN3 the first connection end is described second Reference current IREF2.
In the specific embodiment shown in Fig. 2, the first metal-oxide-semiconductor MN1, the second metal-oxide-semiconductor MN2 and the 3rd metal-oxide-semiconductor MN3 are equal For nmos pass transistor, the first metal-oxide-semiconductor MN1, the second metal-oxide-semiconductor MN2 and the 3rd metal-oxide-semiconductor MN3 the first connection end are brilliant for NMOS The drain electrode of body pipe, the first metal-oxide-semiconductor MN1, the second metal-oxide-semiconductor MN2 and the 3rd metal-oxide-semiconductor MN3 second connection end are NMOS crystal The source electrode of pipe, the control terminal of first metal-oxide-semiconductor, the second metal-oxide-semiconductor and the 3rd MOS are the grid of nmos pass transistor;Described first Reference current IREF1 and the second reference current IREF1 are equal.
The pierce circuit 220 includes the first oscillating unit and the second oscillating unit (not identifying), first vibration Unit includes the first comparison circuit CMP1, the first charge/discharge control circuit 222 and the first electric capacity C1 for producing comparison voltage, institute The one end for stating the first electric capacity C1 is connected with voltage source VDD, the other end of the first electric capacity C1 and the first comparison circuit CMP1's First input end is connected, and the second input of the first comparison circuit CMP1 is connected with reference voltage VBN;Second vibration Unit includes the second comparison circuit CMP2, the second charge/discharge control circuit 224 and the second electric capacity C2 for producing comparison voltage, institute The one end for stating the second electric capacity C2 is connected with voltage source VDD, the other end of the second electric capacity C2 and the second comparison circuit CMP2's First input end is connected, and the second input of the second comparison circuit CMP2 is connected with reference voltage VBN.Based on the reference The first reference current IREF1 that voltage/current generation unit 210 provides fills to the first electric capacity C1 in the first oscillating unit Electricity, the first comparison circuit CMP1 are less than or equal to the reference voltage in the voltage (i.e. comparison voltage) of the first electric capacity C1 other ends During VBN, notify that the first charge/discharge control circuit 222 starts electric discharge and the second charge/discharge control circuit 224 starts to charge up;It is based on Second electric capacity C2s of the second reference current IREF2 that the reference voltage/current generation unit 210 provides to the second oscillating unit Charged, the second comparison circuit CMP2 is less than or equal to the ginseng in the voltage (i.e. comparison voltage) of the second electric capacity C2 other ends When examining voltage VBN, notify that the second charge/discharge control circuit 224 starts electric discharge and the first charge/discharge control circuit 222 starts to fill Electricity.
In the embodiment shown in Figure 2, first charge/discharge control circuit 222 includes the 4th metal-oxide-semiconductor MP1 and the 5th Metal-oxide-semiconductor MN4, wherein, the 4th metal-oxide-semiconductor MP1 the first connection end is connected with voltage source VDD, its second connection end and the 5th metal-oxide-semiconductor MN4 the first connection end is connected, and the 5th metal-oxide-semiconductor MN4 second connection end is connected with the first reference current IREF1, and the 4th Connecting node between metal-oxide-semiconductor MP1 and the 5th metal-oxide-semiconductor MN4 is connected with the other end of the first electric capacity C1.When described first When charge/discharge control circuit 222 is notified electric discharge, the 4th metal-oxide-semiconductor MP1 conductings and the 5th metal-oxide-semiconductor MN4 shut-offs, now, the first electricity The one end for holding C1 is connected with the other end, so that the first electric capacity C1 discharges;When first charge/discharge control circuit 222 is led to Know when starting to charge up, the 4th metal-oxide-semiconductor MP1 shut-offs and the 5th metal-oxide-semiconductor MN4 is turned on, now, interrupt the first electric capacity C1 one end with it is another One end is connected, and the first reference current IREF1 is connected by the 5th metal-oxide-semiconductor MN4 with the first electric capacity C1 other end, so that by the One reference current IREF1 charges to the first electric capacity C1.Second charge/discharge control circuit 224 includes the 6th metal-oxide-semiconductor MP2 and the 7th metal-oxide-semiconductor MN5, wherein, the 6th metal-oxide-semiconductor MP2 the first connection end is connected with voltage source VDD, its second connection end with 7th metal-oxide-semiconductor MN5 the first connection end is connected, the 7th metal-oxide-semiconductor MN5 second connection end and the second reference current IREF2 It is connected, the connecting node between the 6th metal-oxide-semiconductor MP2 and the 7th metal-oxide-semiconductor MN5 is connected with the other end of the second electric capacity C2.When When second charge/discharge control circuit 224 is notified electric discharge, the 6th metal-oxide-semiconductor MP2 conductings and the 7th metal-oxide-semiconductor MN5 shut-offs, this When, the second electric capacity C2 one end is connected with the other end, so that the second electric capacity C2 discharges;When second charge/discharge controls electricity Road 224 is notified when starting to charge up, the 6th metal-oxide-semiconductor MP2 shut-offs and the 7th metal-oxide-semiconductor MN5 is turned on, and now, interrupts the second electric capacity C2 One end be connected with the other end, and the other end phase that the second reference current IREF2 passes through the 7th metal-oxide-semiconductor MN5 and the second electric capacity C2 Even, so as to be charged by the second reference current IREF2 to the second electric capacity C2.
In the specific embodiment shown in Fig. 2, the 4th metal-oxide-semiconductor MP1 and the 6th metal-oxide-semiconductor MP2 is PMOS transistor, institute State the 4th metal-oxide-semiconductor MP1 and the 6th metal-oxide-semiconductor MP2 the first connection end be PMOS transistor source electrode, the 4th metal-oxide-semiconductor MP1 and 6th metal-oxide-semiconductor MP2 second connection end is the drain electrode of PMOS transistor;The 5th metal-oxide-semiconductor MN4 and the 7th metal-oxide-semiconductor MN5 is Nmos pass transistor, the first connection end of the 5th metal-oxide-semiconductor MN4 and the 7th metal-oxide-semiconductor MN5 is the drain electrode of nmos pass transistor, described 5th metal-oxide-semiconductor MN4 and the 7th metal-oxide-semiconductor MN5 second connection end is the source electrode of nmos pass transistor.
In the specific embodiment shown in Fig. 2, the first comparison circuit CMP1 first input end and the second input difference For the first comparison circuit CMP1 positive input and reverse input end;Second comparison circuit CMP2 first input end and second Input is respectively the second comparison circuit CMP2 positive input and reverse input end.First oscillating unit and second shakes Swing unit and share a logic circuit 226, the logic circuit 226 includes the first phase inverter INV1, the second phase inverter INV2, first Nor gate NOR1 and the second nor gate NOR2, wherein, the first phase inverter INV1 input is defeated with the first comparison circuit CMP1's Go out end to be connected, the first phase inverter INV1 output end is connected with a first nor gate NOR1 input, the first nor gate NOR1 Another input be connected with the second nor gate NOR2 output end, the first nor gate NOR1 output end and the 4th metal-oxide-semiconductor MP1 Be connected with the 5th metal-oxide-semiconductor MN4 grid, the first nor gate NOR1 output end as with it is the first of the logic circuit 226 defeated Go out to hold O1;Second phase inverter INV2 input is connected with the second comparison circuit CMP2 output end, the second phase inverter INV2's Output end is connected with a second nor gate NOR2 input, the second nor gate NOR2 another input and the first nor gate NOR1 output end is connected, the second nor gate NOR2 output end and the 6th metal-oxide-semiconductor MP2 and the 7th metal-oxide-semiconductor MN5 grid phase Even, second output end O2 of the second nor gate NOR2 output end as the logic circuit 226.First nor gate NOR1's is defeated Go out signal and frequency signal (or clock signal) CLK is obtained after delayer.
Art technology those of ordinary skill, the annexation based on 220 each element of pierce circuit in Fig. 2 The course of work of pierce circuit 220 is specified, therefore is just no longer described in detail here.
It should be strongly noted that the utility model is compared with traditional oscillators, it is not necessary to uses Bandgap and BIAS electricity Road, only with the reference voltage/current generation circuit 210 (it include a resistance RSET and three transistors MN1, MN2 and MN3 reference voltage VBN, reference current IREF1 and IREF2) are just generated.From the reference voltage/current generation circuit shown in Fig. 2 210, which are not difficult, draws, with voltage source VDD rising, metal-oxide-semiconductor MN1 electric current can increase, so as to reference voltage VBN voltage It can increase.Relationship below is also can obtain from the reference voltage/current generation circuit 210 shown in Fig. 2:
Wherein, IREF1 is the first reference current IREF1 current value, and IREF2 is the second reference current IREF1 electric current Value, VDD are voltage source VDD magnitude of voltage, and RSET is first resistor RSET resistance value, and M is metal-oxide-semiconductor MN2 (or MN3) and MN1 Ratio.Because the VDD rates of climb are more than the VBN rates of climb, so with VDD rising, IREF1 can also increase.It can be seen that VBN and IREF1 can change with supply voltage VDD change, then output frequency Freq
Below equation can be obtained from the pierce circuit 220 shown in Fig. 2:
It can be seen that output frequency Freq (i.e. the frequency of clock signal clk) is only and M, C1 are relevant with RSET, it is and unrelated with VDD, Due to M, C1, RSET do not change and changed with supply voltage VDD, so output frequency Freq is not also with supply voltage VDD's Change and change.Thus we realize realizes that frequency does not change with mains voltage variations with smaller area and power consumption The idea of oscillator.So, the oscillator not changed with mains voltage variations in the utility model has more competitive superiority.
In the utility model, " connection ", it is connected, the word that " company ", the expression such as " connecing " are electrical connected, such as nothing is especially said It is bright, then it represents that direct or indirect electric connection.
It is pointed out that one skilled in the art specific embodiment of the present utility model is done it is any Change the scope all without departing from claims of the present utility model.Correspondingly, the scope of claim of the present utility model It is not limited only to previous embodiment.

Claims (6)

1. a kind of oscillator, it is characterised in that it includes:Reference voltage/current generation circuit, and pierce circuit,
The reference voltage/current generation circuit includes the first metal-oxide-semiconductor, the second metal-oxide-semiconductor, the 3rd metal-oxide-semiconductor and first resistor, and first Resistance is connected between voltage source and the first connection end of the first metal-oxide-semiconductor, the second connection end ground connection of the first metal-oxide-semiconductor, the first MOS The control terminal of pipe is connected with the first connection end of the first metal-oxide-semiconductor;The control terminal of second metal-oxide-semiconductor and the control terminal phase of the first metal-oxide-semiconductor Even, the second connection end ground connection of the second metal-oxide-semiconductor;The control terminal of 3rd metal-oxide-semiconductor is connected with the control terminal of the first metal-oxide-semiconductor, the 3rd MOS The second connection end ground connection of pipe, wherein, the voltage of the control terminal of the first metal-oxide-semiconductor is reference voltage, and the first of the second metal-oxide-semiconductor connects The electric current at end is the first reference current, and the electric current of the first connection end of the 3rd metal-oxide-semiconductor is the second reference current,
The pierce circuit includes the first oscillating unit and the second oscillating unit, and first oscillating unit compares including first Circuit, the first charge/discharge control circuit and the first electric capacity, one end of first electric capacity are connected with voltage source, first electricity The other end of appearance is connected with the first input end of the first comparison circuit, the second input and the ginseng of first comparison circuit Voltage is examined to be connected;Second oscillating unit includes the second comparison circuit, the second charge/discharge control circuit and the second electric capacity, institute The one end for stating the second electric capacity is connected with voltage source, the other end of second electric capacity and the first input end phase of the second comparison circuit Even, the second input of second comparison circuit is connected with the reference voltage,
The first electric capacity in the first oscillating unit is charged based on first reference current, the first comparison circuit is first When the voltage of the electric capacity other end is less than or equal to the reference voltage, the first charge/discharge control circuit is notified to start electric discharge and the Two charge/discharge control circuits start to charge up;The second electric capacity of the second oscillating unit is entered based on the second reference current IREF2 Row charging, the second comparison circuit when the voltage of the second electric capacity other end is less than or equal to the reference voltage, notify second to fill/ Charge/discharge control circuit starts electric discharge and the first charge/discharge control circuit starts to charge up.
2. oscillator according to claim 1, it is characterised in that
First metal-oxide-semiconductor, the second metal-oxide-semiconductor and the 3rd metal-oxide-semiconductor are nmos pass transistor, first metal-oxide-semiconductor, the second metal-oxide-semiconductor With the drain electrode that the first connection end of the 3rd metal-oxide-semiconductor is nmos pass transistor, first metal-oxide-semiconductor, the second metal-oxide-semiconductor and the 3rd metal-oxide-semiconductor Second connection end be nmos pass transistor source electrode, the control terminal of first metal-oxide-semiconductor, the second metal-oxide-semiconductor and the 3rd MOS is NMOS The grid of transistor.
3. oscillator according to claim 2, it is characterised in that
First reference current and the second reference current are equal.
4. oscillator according to claim 1, it is characterised in that
First charge/discharge control circuit includes the 4th metal-oxide-semiconductor and the 5th metal-oxide-semiconductor, wherein, the first connection of the 4th metal-oxide-semiconductor End is connected with voltage source, and its second connection end is connected with the first connection end of the 5th metal-oxide-semiconductor, the second connection end of the 5th metal-oxide-semiconductor It is connected with first reference current, the connecting node between the 4th metal-oxide-semiconductor and the 5th metal-oxide-semiconductor is another with first electric capacity End is connected, when first charge/discharge control circuit is notified electric discharge, the conducting of the 4th metal-oxide-semiconductor and the shut-off of the 5th metal-oxide-semiconductor;When When first charge/discharge control circuit is notified charging, the shut-off of the 4th metal-oxide-semiconductor and the conducting of the 5th metal-oxide-semiconductor, now the first reference Electric current is charged by the 5th metal-oxide-semiconductor to the first electric capacity,
Second charge/discharge control circuit includes the 6th metal-oxide-semiconductor and the 7th metal-oxide-semiconductor, wherein, the first connection of the 6th metal-oxide-semiconductor End is connected with voltage source, and its second connection end is connected with the first connection end of the 7th metal-oxide-semiconductor, the second connection end of the 7th metal-oxide-semiconductor It is connected with second reference current, the connecting node between the 6th metal-oxide-semiconductor and the 7th metal-oxide-semiconductor is another with second electric capacity End is connected, when second charge/discharge control circuit is notified electric discharge, the conducting of the 6th metal-oxide-semiconductor and the shut-off of the 7th metal-oxide-semiconductor;When When second charge/discharge control circuit is notified charging, the shut-off of the 6th metal-oxide-semiconductor and the conducting of the 7th metal-oxide-semiconductor, now, the second ginseng Electric current is examined to charge to the second electric capacity by the 7th metal-oxide-semiconductor.
5. according to claim 4 oscillator, it is characterised in that
4th metal-oxide-semiconductor and the 6th metal-oxide-semiconductor are PMOS transistor, the first connection end of the 4th metal-oxide-semiconductor and the 6th metal-oxide-semiconductor For the source electrode of PMOS transistor, the second connection end of the 4th metal-oxide-semiconductor and the 6th metal-oxide-semiconductor is the drain electrode of PMOS transistor;
5th metal-oxide-semiconductor and the 7th metal-oxide-semiconductor are nmos pass transistor, the first connection end of the 5th metal-oxide-semiconductor and the 7th metal-oxide-semiconductor For the drain electrode of nmos pass transistor, the second connection end of the 5th metal-oxide-semiconductor and the 7th metal-oxide-semiconductor is the source electrode of nmos pass transistor.
6. according to claim 5 oscillator, it is characterised in that
The first input end of first comparison circuit and the second input be respectively the first comparison circuit positive input and reversely Input;The first input end of second comparison circuit and the second input are respectively the positive input of the second comparison circuit and anti- To input,
First oscillating unit and the second oscillating unit share a logic circuit, the logic circuit include the first phase inverter, Second phase inverter, the first nor gate and the second nor gate, wherein, the output of the input of the first phase inverter and the first comparison circuit End be connected, the output end of the first phase inverter is connected with an input of the first nor gate, another input of the first nor gate and The output end of second nor gate is connected, and the output end of the first nor gate is connected with the grid of the 4th metal-oxide-semiconductor and the 5th metal-oxide-semiconductor;The The input of two phase inverters is connected with the output end of the second comparison circuit, the output end of the second phase inverter and the one of the second nor gate Input is connected, and another input of the second nor gate is connected with the output end of the first nor gate, the output end of the second nor gate It is connected with the 6th metal-oxide-semiconductor MP2 and the 7th metal-oxide-semiconductor grid.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107196606A (en) * 2017-08-01 2017-09-22 合肥灿芯科技有限公司 A kind of oscillator

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107196606A (en) * 2017-08-01 2017-09-22 合肥灿芯科技有限公司 A kind of oscillator
CN107196606B (en) * 2017-08-01 2023-06-02 合肥灿芯科技有限公司 Oscillator

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