CN206993093U - Reactor control bar position Golay code generating means - Google Patents
Reactor control bar position Golay code generating means Download PDFInfo
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- CN206993093U CN206993093U CN201720455960.6U CN201720455960U CN206993093U CN 206993093 U CN206993093 U CN 206993093U CN 201720455960 U CN201720455960 U CN 201720455960U CN 206993093 U CN206993093 U CN 206993093U
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Abstract
The utility model provides a kind of reactor control bar position Golay code generating means, including module occurs for Golay code, and module, which occurs, for the Golay code includes what is be sequentially connected：Waveform generating module, for according to predetermined waveform and rate-adaptive pacemaker square wave；Waveform count module, for the square wave to be recorded in the form of binary code value；Transcoding module, for binary code value to be converted into Golay code value corresponding with rod place value.By upper, reactor control bar position Golay code generating means produces the Golay code signal of corresponding rod position, Golay code signal output is measured into cabinet to reactor control bar position by communication module, to realize the real-time Simulation to rod position information in control rod lifting, insertion process, complete function debugging is carried out to measurement cabinet.
Description
Technical field
Nuclear power control technology field is the utility model is related to, is sent out more particularly to a kind of reactor control bar position Golay code
Generating apparatus.
Background technology
During nuclear power station opens heap, power conversion and shutdown, by the lifting, insertion and guarantor that control reactor control rod
Motion is held, so as to control the reactivity of reactor, ensures that reactor always works in slave mode.
Reactor control bar position measurement cabinet (PME) obtains stick location probe signal, is calculated what 5 Golay codes represented
Rod position information, send and handled by processing cabinet (PPE), monitor the rod position information, and rod position information is sent to reactor logic cabinet
(CLE), logic cabinet generates corresponding rod control order and rod control order is delivered into reactor power cabinet (PWE), power cabinet and control
Magnet coil in rod drive mechanism processed is connected, according to corresponding rod control order generation corresponding to magnet coil driving current,
So as to drive corresponding magnet coil to act so that reactor control rod makes lifting, insertion and holding action.
However, when debugging reactor control bar position measurement cabinet, it is difficult to measure cabinet using reactor control bar position
(PME) actual stick location probe signal is obtained to calculate 5 Golay codes, thus causes debugging process to be obstructed.
Utility model content
Main purpose of the present utility model is to provide a kind of reactor control bar position Golay code generating means, including lattice
Module occurs for Lay code；
Module, which occurs, for the Golay code includes what is be sequentially connected：
Waveform generating module, for according to predetermined waveform and rate-adaptive pacemaker square wave；
Waveform count module, for the square wave to be recorded in the form of binary code value；
Transcoding module, for binary code value to be converted into Golay code value, the Golay code value and reactor control bar
Position is corresponding.
By upper, reactor control bar position Golay code generating means produces the Golay code signal of corresponding rod position, by communication mould
Golay code signal output is measured cabinet by block to reactor control bar position, to realize to rod position in control rod lifting, insertion process
The real-time Simulation of information, complete function debugging is carried out to measurement cabinet.
Wherein, the waveform generating module includes the wave generator circuit and pulse delay circuit being sequentially connected.
By upper, wave generator circuit output test square wave, and pulse delay circuit is used for timing reset, ensures that waveform is normal
Output.
Wherein, the wave generator circuit includes binary string column split, the crystalline substance of connected different resonant frequencies
Shake and at least one decadic pulsing distributor.
By upper, waveform signal exports the square wave letter of different frequency after binary string column split divide several times
Number, the different frequency square-wave signal obtains final square-wave signal after decadic pulsing distributor is divided again.Such as
The crystal oscillator that resonant frequency is 30.72KHz is connected, waveform signal is after binary string column split carries out nine frequency dividings, output
60Hz frequency signals.One time ten frequency dividing and one time five frequency dividing are carried out by two decadic pulsing distributors being connected in series again, is obtained
To 1.2Hz square-wave signals, for follow-up Golay code transcoding.
Wherein, the waveform count module includes：
Binary add down counter；
NAND gate circuit, it is connected with the binary add down counter；
Pulse delay circuit, it is connected with the NAND gate circuit；
Trigger, its signal input part are connected to the output end of the pulse delay circuit, and its signal output part is connected to
The add-subtract control port of the binary add down counter.
By upper, binary add down counter be initiated with plus count, when binary counting reach it is default last when, will
Add counting to be converted to and subtract counting, pass through the triggering of NAND gate circuit realiration logic level.The trigger signal is by pulse daley electricity
Behind road and trigger, the plus-minus for being transferred to binary add down counter sets port, so realizes cycle count.
Wherein, the transcoding module includes：
NOR gate circuit, for the binary code value from most right one, successively with one, its left side progress XOR
Logical operation；
Inverter buffer, it is connected with the NOR gate circuit, it is anti-phase for the code value after XOR computing to be carried out；
NAND gate circuit, it is connected with the inverter buffer, NAND Logic computing is carried out for the code value after will be anti-phase, with
Transcoding is Golay code.
Wherein, in addition to Golay code hand control switch.
By upper, manually select, can be tested only for a certain rod position, from without being needed during such as automatic test
All situations are tested, it is possible thereby to save the testing time.
Wherein, in addition to the one-to-one indicator lamp of Golay code hand control switch.
Wherein, in addition to the Golay code generation module display module being connected, the display module include connecting successively
Connect：The digital lamp bar of main control chip, transistor and LED compositions；
The main control chip is used to receive the Golay code value from transcoding module output, and according to the value output control
Voltage is shown to transistor by transistor driving numeral lamp bar.
Wherein, in addition to the Golay code generation module serial communication modular being connected.
Wherein, described device includes housing and the handle in case top, and the housing and handle are provided with nuclear-grade
Other protective coating.
Brief description of the drawings
Fig. 1 is the principle schematic of reactor control bar position Golay code generating means；
Fig. 2 is the principle schematic that module occurs for Golay code；
Fig. 3 is the circuit theory diagrams of waveform generating module；
(A) is the circuit theory diagrams of waveform count module in Fig. 4；
(B) is the circuit theory diagrams of transcoding module in Fig. 4；
Fig. 5 is the circuit theory diagrams of display module；
(A) is the circuit theory diagrams of hand switch part in Fig. 6；
(B) is the schematic diagram of reactor control bar position Golay code generating means front panel in Fig. 6；
(C) is the schematic diagram of reactor control bar position Golay code generating means rear board in Fig. 6.
Embodiment
Reactor control bar position Golay code generating means described in the utility model is carried out referring to Fig. 1~Fig. 6
Describe in detail.
The reactor control bar position Golay code generating means includes Golay code and module 10 occurs, and connects respectively with it
The communication module 20 and display module 30 connect, in addition to the power supply module 40 to system power supply.
As shown in Fig. 2 module 10, which occurs, for the Golay code includes what is be sequentially connected：
Waveform generating module 101, for generating the square wave of frequency-adjustable.In the present embodiment, module 101 occurs for predetermined waveform
The frequency of exported square wave includes 1.2Hz, 0.8Hz and 0.1Hz.As shown in figure 3, waveform generating module 101 includes waveform
Circuit and pulse delay circuit composition.It is 1.2Hz, 0.8Hz and 0.1Hz that the wave generator circuit, which is used to generate aforementioned frequencies,
Square wave, its circuit composition include model CD4060 binary string column split (counter) and connected resonance frequently
Rate is the elements such as 30.72KHz crystal oscillator.CD4060 is 14 grades of frequency dividers (counter), and its divide ratio is 16~16348, ripple
Shape signal is after CD4060 carries out nine frequency dividings, in its Q9 port output 60Hz frequency signals (30720 ÷ 29=60Hz).
60Hz square wave frequency signal is carried out by the decadic pulsing distributor (counter) for two model CD4017 being connected in series
One time ten frequency dividing and one time five frequency dividing, obtain 1.2Hz square-wave signals.
Wave generator circuit also includes model CD4060 binary string column split (counter) and resonant frequency is
32.768KHz crystal oscillator composition another set wave generator circuit, waveform signal is after CD4060 progress ten divides three times, at it
Q13 ports output 4Hz frequency signals (32768 ÷ 213=4Hz).4Hz square wave frequency signal with CD4060 all the way by exporting
Hold the decadic pulsing distributor (counter) for the model CD4017 being connected in series to carry out one time five frequency dividing, obtain 0.8Hz's
Square-wave signal.4Hz square wave frequency signal another way passes through the ten of the model CD4017 being connected in series with CD4060 output ends
System pulsqe distributor (counter) carries out one time eight frequency dividing respectively, obtains 0.1Hz square-wave signal.
Pulse delay circuit, including three tunnels, respectively with the decimal system of the model CD4017 in the wave generator circuit
Pulsqe distributor (counter) is connected in series, and includes model CD4098 monostable flipflop cascade.Wherein, first is monostable
State trigger is set to rising edge triggering, and the second monostable flipflop is set to trailing edge triggering, and time delay is related to resistance capacitance.
By decade counter/pulsqe distributor of model CD4017 described in monostable trigger time-delay reset, realize to frequency dividing electricity
The timing reset on road, ensure that waveform normally exports.
Waveform count module 102, it is connected with the waveform generating module 101, for square wave described in binary recording.Such as
Fig. 4 (A) show the circuit theory diagrams of waveform count module 102, as illustrated, waveform count module 102 includes consisting of：
Binary add down counter, in the square wave that the trailing edge of clock is exported to waveform generating module 101 with binary system
Counted.In the present embodiment, the binary system plus-minus counting chip of the binary add down counter selection model CD4516,
Can be preset 4.Two panels CD4516 cascades form 5 binary add down counters, are initiated with plus count, when binary counting reaches
To when binary numeral is 11111 state corresponding to aftermentioned table 1, counting will be added to be converted to and subtract counting, by accessing model
The triggering of logic level is realized in CD4068 8 tunnels input with NAND gate.The trigger signal is formed by model CD4098 cascades
After pulse delay circuit and model DC4013 double D trigger, the plus-minus for being transferred to counting chip CD4516 sets port
U/D, when adding counting, the U/D ports for maintaining counting chip CD4516 are high level, when subtracting counting, maintain counting chip
CD4516 U/D ports are low level, so realize cycle count.
When waveform generating module 101 generates square wave, by being preset to its waveform, so that waveform count module 102
The binary count value finally given is as shown in table 1 below, according to the order presentation by the row of table 1 the 1st to the 31st row cyclic.
In addition, table 1 goes back corresponding relation of the publicity between binary numeral, Golay code value and mechanical step number three.
Table 1
Transcoding module 103, it is connected with the binary counting module 102, for according to shown in table 1, by binary counting
Value transcoding is Golay code value.Its transcoding principle is：From rightmost one, each and one, left side progress XOR are patrolled successively
Computing (differ and be expressed as " 1 ", be identical to be expressed as " 0 ") is collected, as the value of this of corresponding Golay code, the invariant position of Far Left one.
It is expressed as with mathematical expression：Provided with N position binary count value B (i), wherein 0≤i≤N-1, it can be for conversion into same digit
Golay code G (i).The conversion formula of binary number and Golay code is as follows：
G (i)=B (i+1) XOR B (i)；0≤i ＜ N-1
G (i)=B (i)；I=N-1
In above-mentioned formula, XOR represents distance, and B (i) represents the i-th bit of binary number, and G (i) represents the i-th of Golay code
Position.
As shown in Fig. 4 (B), the XOR gate chip that transcoding module 103 includes model CD4070 is realized, including 4 XORs
Door chip, to carry out XOR computing to two adjacent binary digits.
To adapt to drive, Golay code is first carried out it is anti-phase, then via NAND gate according to being converted to Golay code shown in table 1.Its
In, reversely realized using model CD4049 six inverter buffer converters；Inputted with non-conversion using model CD40107
NAND gate is realized.
Display module 30, module 10 occurs with the Golay code and is connected, for showing generated Golay code value.Such as Fig. 5
The circuit theory diagrams of display module 30 are shown, including main control chip, transistor and the LED light bar composition being sequentially connected.
Wherein, main control chip receives the Golay code value that module 10 occurs and exports from the Golay code, and defeated according to the value
Go out control voltage to transistor, numerical monitor is carried out by transistor driving LED light bar.In the present embodiment, the main control chip is adopted
With the classical chip microcontroller of model AT89C51 series, the transistor uses model ULN2003 chip.
Communication module 20, module 10 occurs with the Golay code and is connected, for its caused Golay code value to be exported.Institute
Stating communication module 20 may include serial communication modular, for example with DB9 communication interfaces, or, the communication module 20 may be used also
Using network communication module, for example with RJ-45 communication interfaces etc..
In addition, as shown in Fig. 6 (A), reactor control bar position Golay code generating means also includes lattice described in the present embodiment
Lay code hand switch part, the reactor control bar position Golay code generating means front panel signal with reference to shown in (B) in Fig. 6
Figure.The Golay code hand switch part includes 8 groups of Golay code hand switch toggles, every group 5, i.e. lattice Lay in corresponding table 1 altogether
Code ABCDE regions.Hand switch part includes 5 road level switching circuits, often connects all the way, represents that the road turns on, corresponding output
High level；If otherwise the road disconnects, and corresponds to low level.Manually select, can be tested only for a certain rod position,
Need to test all situations during from without such as testing automatically, it is possible thereby to save the testing time.
Power module 40, electrically connected with the waveform generating module 101, for by 220V civil powers carry out rectification, filtering with
And decompression processing, final output is 12V or 5V direct currents, is powered to reactor control bar position Golay code generating means.
As Fig. 6 (B) show the schematic diagram of reactor control bar position Golay code generating means.Including housing 61 and
The handle 63 at the top of housing 61.In the front panel of described device, including viewing area and operating area.
The viewing area is LCDs 62, that is, corresponds to foregoing display module 30.
Operating area includes：
Frequency knob 64, including 3 grades, foregoing 1.2Hz, 0.8Hz and 0.1Hz are corresponded to respectively.
Pause button 65, electrically connected with the waveform generating module 101, for having controlled pause, operation.
Golay code hand switch toggle 66, the operation of corresponding hand switch part, altogether including 8 groups, every group 5.Preferably,
For each Golay code hand switch toggle 66, in addition to a LED light 67 corresponding on circuit with it.That is, each
The LED that is also in series with circuit of Golay code hand switch toggle 66, when switching toggle unlatching, corresponding LED
Lamp is lighted simultaneously.
(C) show the rear board schematic diagram of reactor control bar position Golay code generating means in Fig. 6, in plate below,
Including the power interface 69 corresponding with aforementioned power source module 40, and totally 16 road Golay code output interface 68, including 8 tunnels are manual
Output and 8 tunnels export automatically, that is, correspond to the DB9 communication imports in aforementioned communication module 20.
Further, the reactor control bar position Golay code generating means housing and handle surface are provided with nuclear power
Rank protective coating.
Preferred embodiment of the present utility model is the foregoing is only, it is all in this practicality not to limit the utility model
Within new spirit and principle, any modification, equivalent substitution and improvements made etc., guarantor of the present utility model should be included in
Within the scope of shield.
Claims (10)
- A kind of 1. reactor control bar position Golay code generating means, it is characterised in that including：Module occurs for Golay code,Module, which occurs, for the Golay code includes what is be sequentially connected：Waveform generating module, for according to predetermined waveform and rate-adaptive pacemaker square wave；Waveform count module, for the square wave to be recorded in the form of binary code value；Transcoding module, for binary code value to be converted into Golay code value, the Golay code value and reactor control bar position phase It is corresponding.
- 2. device according to claim 1, it is characterised in that the waveform generating module includes the waveform hair being sequentially connected Raw circuit and pulse delay circuit.
- 3. device according to claim 2, it is characterised in that the wave generator circuit divides including binary serial Device, the crystal oscillator of connected different resonant frequencies and at least one decadic pulsing distributor.
- 4. device according to claim 1, it is characterised in that the waveform count module includes：Binary add down counter；NAND gate circuit, it is connected with the binary add down counter；Pulse delay circuit, it is connected with the NAND gate circuit；Trigger, its signal input part are connected to the output end of the pulse delay circuit, and its signal output part is connected to described The add-subtract control port of binary add down counter.
- 5. device according to claim 1, it is characterised in that the transcoding module includes：NOR gate circuit, for the binary code value from most right one, successively with one, its left side progress XOR Computing；Inverter buffer, it is connected with the NOR gate circuit, it is anti-phase for the code value after XOR computing to be carried out；NAND gate circuit, it is connected with the inverter buffer, NAND Logic computing is carried out for the code value after will be anti-phase, with transcoding For Golay code value.
- 6. device according to claim 1, it is characterised in that also including Golay code hand control switch.
- 7. device according to claim 6, it is characterised in that also include and a pair of the Golay code hand control switch 1 The indicator lamp answered.
- 8. device according to claim 1, it is characterised in that also include the display that module occurs and is connected with the Golay code Module, the display module include what is be sequentially connected：The digital lamp bar of main control chip, transistor and LED compositions；The main control chip is used to receive the Golay code value from transcoding module output, and according to the value output control voltage To transistor, shown by transistor driving numeral lamp bar.
- 9. device according to claim 1, it is characterised in that also include the serial ports that module occurs and is connected with the Golay code Communication module.
- 10. device according to claim 1, it is characterised in that described device includes housing and carrying in case top Hand, the housing and handle are provided with nuclear power rank protective coating.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720455960.6U CN206993093U (en) | 2017-04-27 | 2017-04-27 | Reactor control bar position Golay code generating means |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720455960.6U CN206993093U (en) | 2017-04-27 | 2017-04-27 | Reactor control bar position Golay code generating means |
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