CN2067052U - Superposition device for tv station standard time - Google Patents

Abstract

The utility model discloses a superposition device for the TV station standard time capable of automatically calibrating the time, which is composed of circuits of an external time calibrating and signal judging interface, an external video signal synchronous separation, an internal clock program processor, a switch, an output register, a video dot superposition device and a casing. An external standard clock can be connected to calibrate, and an internal clock capable of being manually adjusted can be run under the condition of not connecting the external standard clock. The utility model adopts a video dot output circuit capable of calibrating the time and inputting externally and automatically and saving the display area address hardware counter. The utility model is accurate, stable and simple. The utility model can be widely applied to the superposition of the white station mark and the time on the TV screen, and can be also used as a multifunction display for an eight bit interface.

Description

Superposition device for TV station standard time

The utility model relates to TV station logo time superposer, more clearly says so to be used on the video screen superposition white TV station's station symbol and the TV station logo time superposer of time in broadcast items.

Be everlasting when at present each TV station of China is in program broadcasts the station symbol and the time of superposition this TV station on the screen.But because the time of TV station logo time superposer in the past itself can not be calibrated effectively in standard Beijing time, so the time that the televiewer is often shown on the screen when seeing several channel as can be seen is inconsistent.This has just influenced authenticity, reliability that screen gives people's temporal information.In addition, the TV station logo time superposer automaticity in past is lower, stability is also relatively poor.

The purpose of the utility model TV station logo time superposer, be to provide a kind of and can eliminate above-mentioned shortcoming, its time signal can be calibrated automatically by external regulator, also can be outside not connecing clock in the operation under the situation of regulator, but interior clock hand adjustment, have higher automaticity and stable, accurate, stable, easy TV station logo time superposer.

In order to achieve the above object, the utility model TV station logo time superposer by cabinet and be installed in external audio video synchronization split circuit in the cabinet, and the program processor circuit that joins of external audio video synchronization split circuit, and the program processor circuit join external school the time and judge interface circuit and logic switching circuit, and the output register circuit that joins of program processor, and the output register circuit joins, and the superposition relay circuit of superposition signal is constituted between last output table timestamp.The program processor circuit is made of CPU microprocessor, the read-only memory that links to each other with the CPU microprocessor, read-write memory and six not gates that link to each other with foregoing circuit, counter or logical circuits such as door, NAND gate.Read-only memory can be replaced by the 16K internal memory, to adapt to multi-functional demonstration.Program processor during also with external school with judge that signaling interface links to each other, during external school with judge that signaling interface is by with two monostable triggers of external regulator time signal input, the data selector that links to each other with two monostable triggers, the shift register that links to each other with data selector, the logical circuits such as data buffer that link to each other with shift register constitute.Data buffer can be imported data to adjust interior clock, to determine the demonstration time.

The timing code that outer regulator comes during through external school with judge that signaling interface enters program processor.The external vision signal of desiring superposition also enters program processor behind external audio video synchronization split circuit.Program processor is calibrated interior clock time in the back by analysis with the timing code of outer regulator, the pulse that comes according to synchronizing separator circuit then, and the state of decision logic switching circuit is to output to time dot matrix and station symbol dot matrix on the output register circuit.The serial output of output register promptly is corresponding video dot matrix on the screen, through superposition relay and the output of external vision signal superposition, becomes the programme signal with station symbol time.

In above process, time dot matrix and station symbol dot matrix exist in the display buffer in the program processor, totally 16 on buffer zone address line.Program processor is the logic state of the pulse decision logic switch according to external audio video synchronization split circuit also, make logic switch that the 8th hardware address line of display buffer is provided, and all the other 15 addresses are provided by the timesharing when refreshing of CPU microprocessor, and on hardware with original program address conllinear.The refresh signal warp or the door and behind the door non-of microprocessor provide write pulse to Output Shift Register, to realize high-speed dot array output.This and general display display buffer need independent address register or counter that fundamental difference be arranged, and it is few to be particularly suitable for program, the occasion that hardware circuit is few.Its display routine running is: determine the vertical starting point that shows earlier and show line number, determine the display buffer first address then, the high eight-bit of this address is placed in the I register of microprocessor, in low seven R registers that are placed on little processing of low eight, deliver in the logic switch with the data that open and close output register for the 8th.In procedure for displaying, low seven of explicit address are progressively increased automatically by microprocessor internal, and the address more than the 8th during by demonstration the program of synchronous operation progressively increase.

Because output shows the moment of dot matrix and has determined the position of dot matrix on screen, so can not swing in time during output dot matrix, this mainly leans on the bus request end of the pulse-triggered program processor of synchronizing separator circuit, then please zero consistency with raising display routine execution starting point to counter.In addition, the timeliness that the temporal information of outer regulator arrives is also very strong, if showing then, program can not handle outer clock information simultaneously, so designed outer regulator sign indicating number input block with judging in the signaling interface during external school, make the clock sign indicating number from being advanced into buffer memory in the shift register, program processor is just read into the time data in the shift register when showing the fixed point battle array, in this process, if outer regulator is entering shift register just, the data of then this time reading are cancelled, and treat to read again next time.The data of reading are into judged not error code by program, then include interior clock in, according to timing code corresponding digital dot matrix is taken out from character repertoire again and be filled in the buffering area, with the state of judging signaling interface, select display mode whether to show station symbol and time during again according to external school with decision.Station symbol and digital character pattern storehouse all exist in a slice read-only memory with working procedure.

During external school with the state of judging signaling interface by the signal or the position of the switch decision that connect thereon, state has that forbid showing, can show, only show half an hour, the time-delay of program switching point shows etc., switch bit is equipped with clock Hour Minute Second in the hand adjustment, by program processor read the post analysis decision whether show with and whether transfer in the clock Hour Minute Second.In addition, also can realize multi-functional demonstration as eight interfaces of standard after changing read-only memory with judging signaling interface during above-mentioned external school, the viewing area can be filled up 80% of screen continuously.

Logic switching circuit is made of 4 d latch and four triple gates, and the output register circuit is made of eight bit shift register and not gate etc.

The relay that the superposition relay circuit joins by the triode that joins with the output register circuit, with triode and vision signal input, output etc. constitutes.Station symbol time superposer is the series devices in picture intelligence processing and the transmission course, and for strengthening its adaptability to changes, when this superposer no power, the relay in the foregoing circuit directly jumps to signal output part with signal input part.

Task of the present utility model comes to this and finishes.

The time signal of the utility model TV station logo time superposer can be calibrated automatically by external regulator, clock in also can moving under the situation that does not connect external regulator, but interior clock hand adjustment.The utility model has higher automaticity and stability, and is accurate, stable, easy, can be widely used in character such as superposition white station symbol and time on the video screen.

Below in conjunction with drawings and Examples the utility model is done further explanation.Fig. 1 is the external form figure of the utility model embodiment.Among the figure, the circuit of installing in the shell 12.Outer regulator 3 also can be installed in the same shell.Fig. 2 is the circuit block diagram of the utility model embodiment.As can be seen, become circuit of the present utility model with judging signaling interface 9 and outer regulator 10 mutual group when external audio video synchronization split circuit 4, program processor circuit 5, logic switching circuit 6, output register circuit 7, superposition relay circuit 8, external school among the figure.Fig. 3 is the physical circuit figure of the utility model embodiment.Among the figure as can be seen: program processor 5 by CPU microprocessor 11, read-only memory 12, read-write memory 13, six not gates 14, counter 15, four or circuit such as door 16, six not gates 17 form; Send out device 18, data selector 19, shift register 20, data buffer 21 etc. by two monostable tentaculums and form with judging signaling interface 9 during external school; Superposition relay circuit 8 is made up of triode 22, relay 23 etc.Logic switching circuit 6 is made up of 4 d latch 24, four triple gates 25 etc., and output register circuit 7 is made of eight bit shift register 26 and not gate 27 etc.

But the present embodiment automatic calibration is in standard Beijing time, accurately, stable, easy, can be widely used in the character such as superposition white station symbol and time on the video screen.

Claims (5)

1, a kind of by cabinet and be installed in external audio video synchronization split circuit in the cabinet and program processor circuit that external audio video synchronization split circuit joins, during the external school that joins with the program processor circuit with judge interface circuit and logic switching circuit and output register circuit, and the output register circuit TV station logo time superposer that the superposition relay circuit of superposition signal is constituted between last output table timestamp that joins is characterized in that said program processor circuit is by the CPU microprocessor, the read-only storage that links to each other with the CPU microprocessor and read-write memory and six not gates that link to each other with foregoing circuit, counter, or door, logical circuits such as NAND gate constitute.

2, according to 1 described TV station logo time of claim superposer, when it is characterized in that said external school with judge that signal interface circuit is by with two monostable triggers of external regulator time signal input, the data selector that links to each other with two monostable triggers, the shift register that links to each other with data selector, the data of importing that link to each other with shift register are constituted with clock in adjusting and the logical circuits such as data buffer of definite demonstration time.

3, according to claim 1 or 2 described TV station logo time superposers, it is characterized in that said logic switching circuit by 4 d latch and provide the triple gate of a unique display buffer hardware address line to constitute, the output register circuit is made of eight bit shift register and the not gate that leads to microprocessor refresh signal line.

4,, it is characterized in that said program processor saves as 16K in can using, to adapt to the read-only memory of multi-functional demonstration according to claim 1 or 2 described TV station logo time superposers.

5, according to claim 1 or 2 described TV station logo superposers, the relay of energy cross-over connection input and output video signals when it is characterized in that containing outage in the described superposition relay circuit.

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