CN206542391U - A kind of charge pump - Google Patents
A kind of charge pump Download PDFInfo
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- CN206542391U CN206542391U CN201720165200.1U CN201720165200U CN206542391U CN 206542391 U CN206542391 U CN 206542391U CN 201720165200 U CN201720165200 U CN 201720165200U CN 206542391 U CN206542391 U CN 206542391U
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Abstract
The utility model discloses a kind of charge pump, including：Reference current source module (410), voltage follower (420) and charge pump main body circuit (430).The reference current source module (410) includes start-up circuit (411) and reference current generating circuit (412).The start-up circuit (411) is used for the startup and shut-off for controlling the reference current generating circuit (412), and the reference current generating circuit (412) is used to produce two-way biasing voltage signal VNAnd VM, and export to the charge pump main body circuit (430).The voltage follower (420), is connected with the charge pump main body circuit (430), for providing two-way approximately equal voltage signal V for charge pump main body circuitAAnd VB, so as to eliminate electric charge distribution；The charge pump main body circuit (430), for producing charging and discharging currents, including charging circuit and discharge circuit, so as to reduce charging and discharging currents mismatch, it is to avoid electric charge shares effect.
Description
Technical field
The utility model is related to technical field of integrated circuits, more particularly to a kind of charge pump.
Background technology
In the last few years, in various phase-locked loop structures, charge pump phase lock loop (Phase-Locked Loop, PLL) application is most
To be extensive, its capture range is big, and zero phase difference can be reached during locking.Fig. 1 is a kind of structural representation of charge pump phase lock loop,
Including phase frequency detector (Phase Frequency Detector, PFD) 101 and Fractional-N frequency device (Divider) 105, charge pump
(Charge Pump, CP) 102, loop filter (Loop Filter, LPF) 103 and voltage controlled oscillator (Voltage
Controlled Oscillator,VCO)104.Wherein charge pump 102 is the important module in phase-locked loop circuit, can be by frequency discrimination
The digital level that phase discriminator 101 is exported is converted into analog signal.And often there are charging and discharging currents in circuit realiration in charge pump
The non-ideal effects such as mismatch and electric charge be shared, cause output voltage UoutProduce shake.
It can be seen that, there is charge pump charging and discharging currents mismatch in the prior art and electric charge shares effect so that output voltage
The problem of producing shake.
Utility model content
The utility model is directed to present in prior art, and charge pump charging and discharging currents mismatch and electric charge share effect,
So that output voltage produces the technical problem of shake there is provided a kind of charge pump, charge pump charging and discharging currents can be effectively reduced
Mismatch and electric charge is avoided to share effect.
The utility model provides a kind of charge pump, including：Reference current source module, voltage follower and charge pump master
Body circuit；
The reference current source module, including start-up circuit and reference current generating circuit, the start-up circuit are used to control
The startup and shut-off of the reference current generating circuit are made, the reference current generating circuit is used to produce two-way bias voltage letter
Number VNAnd VM, and export to the charge pump main body circuit；
The voltage follower, is connected with the charge pump main body circuit, for providing two for charge pump main body circuit
Road approximately equal voltage signal VAAnd VB, so as to eliminate electric charge distribution；
The charge pump main body circuit, for producing charging and discharging currents, including charging circuit and discharge circuit, the charging
Circuit is used to utilize charging control signal UP, and output node is charged, and the discharge circuit is used to utilize control of discharge letter
Number DN, discharges output node.
Optionally, the start-up circuit includes：First PMOS, the first electric capacity, the second PMOS and the 3rd PMOS；
The first PMOS source class is connected to supply voltage Vdd, one end of its drain connection first electric capacity, and with
The grid of second PMOS is connected, the other end ground connection of first electric capacity；The source class connection electricity of second PMOS
Source voltage Vdd；The grid of 3rd PMOS connects the grid of second PMOS, its drain ground connection.
Optionally, the reference current generating circuit include the 4th PMOS, the 5th PMOS (MP5), the first NMOS tube,
Second NMOS tube and first resistor R1；
The source class connection supply voltage Vdd of 4th PMOS, it is its grid level and the grid of first PMOS, described
The source class of 3rd PMOS is connected, and its drain connects the drain of second PMOS；First NMOS tube uses diode
Connection, its grid is connected with its drain, and is connected to the drain of the 4th PMOS, and its source class is connected to the ground；Described 5th
PMOS uses diode-connected, and its grid is connected with drain, and is connected to the grid of the 4th PMOS, its source class and power supply electricity
Vdd is pressed to be connected；The grid of second NMOS tube is connected with the grid of first NMOS tube, and its drain is connected to the described 5th
The drain of PMOS, its source class is connected with one end of the first resistor；The other end of the first resistor is connected to the ground.
Optionally, the voltage follower includes：6th PMOS, the 7th PMOS, the 3rd NMOS tube, the 4th NMOS tube
And the 5th NMOS tube；
The source class connection supply voltage Vdd of 6th PMOS；The source class of 7th PMOS and supply voltage Vdd
It is connected, its grid is connected with drain, and is connected to the grid of the 6th PMOS；
The drain for stating the 3rd NMOS tube is connected with grid, and is connected to the drain electrode of the 6th PMOS, and to the electricity
Lotus pump main body circuit output voltage signal VB；The drain of 4th NMOS tube is connected to the drain of the 7th PMOS, its
Source class is connected with the source class of the 3rd NMOS tube, and its grid is to the charge pump main body circuit output voltage signal VA；It is described
The grid of 5th NMOS tube is connected to the biasing voltage signal V that the reference current generating circuit is producedM, its drain connects described
The source class of 3rd NMOS tube, its source class ground connection.
Optionally, the charging circuit includes：8th PMOS, the 9th PMOS and the tenth PMOS；Described 8th
PMOS connects the biasing voltage signal V that the reference current generating circuit is produced as charging current source, its gridN, its source
Level is connected to power supply Vdd；9th PMOS and the tenth PMOS, as charge switch, the 9th PMOS
Grid connection charging control signal UP reverse logic, its source class connects the drain of the 8th PMOS, its drain connection institute
State the voltage signal V of voltage follower generationB；The grid connection charging control signal UP of tenth PMOS, its source class connects
The drain of the 8th PMOS is connect, its drain is connected to the output node of charge pump；
The discharge circuit includes：7th NMOS tube, the 8th NMOS tube and the 6th NMOS tube；7th NMOS tube and
Eight NMOS tubes are used as discharge switch, the grid connection discharge control signal DN of the 7th NMOS tube, its drain and the 9th PMOS
The drain of pipe is connected；The grid connection discharge control signal DN of 8th NMOS tube reverse logic, its drain is connected to charge pump
Output node, its source class connects the source class of the 7th NMOS tube；6th NMOS tube, is used as discharge current source, the connection of its grid
The biasing voltage signal V that the reference current generating circuit is producedM, its source class ground connection, its drain connection the 7th NMOS tube
Source class.
Optionally, for phase-locked loop circuit, wherein：The output node is used as the phase-locked loop circuit loop filter
Input；The charging control signal UP comes from the charging sign letter of the phase frequency detector output in the phase-locked loop circuit
Number；The discharge control signal DN comes from the electric discharge beacon signal of the phase frequency detector output in the phase-locked loop circuit.
The one or more technical schemes provided in the utility model, have at least the following technical effects or advantages：
Because in the utility model, charge pump includes：Reference current source module, voltage follower and charge pump main body
Circuit；The reference current source module, including start-up circuit and reference current generating circuit, the start-up circuit are used to control institute
The startup and shut-off of reference current generating circuit are stated, the reference current generating circuit is used to produce two-way biasing voltage signal VN
And VM, and export to the charge pump main body circuit；The voltage follower, is connected with the charge pump main body circuit, uses
In providing two-way approximately equal voltage signal V for charge pump main body circuitAAnd VB, so as to eliminate electric charge distribution；The charge pump
Main body circuit, for producing charging and discharging currents, including charging circuit and discharge circuit, the charging circuit is used to utilize charging control
Signal UP processed, charges to output node, and the discharge circuit is used to utilize discharge control signal DN, and output node is carried out
Electric discharge.Efficiently solve for present in prior art, charge pump charging and discharging currents mismatch and electric charge share effect, make
Obtain the technical problem that output voltage produces shake.
Brief description of the drawings
, below will be to embodiment in order to illustrate more clearly of the utility model embodiment or technical scheme of the prior art
Or the accompanying drawing used required in description of the prior art is briefly described, it should be apparent that, drawings in the following description are only
It is embodiment of the present utility model, for those of ordinary skill in the art, on the premise of not paying creative work, also
Other accompanying drawings can be obtained according to the accompanying drawing of offer.
A kind of structural representation for charge pump phase lock loop that Fig. 1 provides for the utility model background technology；
A kind of structural representation for charge pump that Fig. 2 provides for the utility model embodiment；
A kind of circuit diagram for charge pump that Fig. 3 provides for the utility model embodiment.
Embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, the technical scheme to the utility model embodiment is carried out clearly
Chu, it is fully described by, it is clear that described embodiment is only a part of embodiment of the utility model, rather than whole realities
Apply example.Based on the embodiment in the utility model, those skilled in the art are obtained under the premise of creative work is not made
Every other embodiment, belong to the utility model protection scope.
The utility model embodiment provides a kind of charge pump, refer to Fig. 3, the charge pump includes：Reference current source mould
Block 410, voltage follower 420 and charge pump main body circuit 430.
Wherein, reference current source module 410 includes start-up circuit 411 and reference current generating circuit 412, start-up circuit
411 startup and shut-off for controlling the reference current generating circuit, the reference current generating circuit 410 is used to produce two
Road biasing voltage signal VNAnd VM, and export to charge pump main body circuit 430.
Start-up circuit 411 includes：First PMOS MP1, the first electric capacity C1, the second PMOS MP2 and the 3rd PMOS
MP3；The first PMOS MP1 source class is connected to supply voltage Vdd, and its drain connects one end of the first electric capacity C1, and
It is connected with the grid of the second PMOS MP2, the other end ground connection of the first electric capacity C1；The second PMOS MP2's
Source class connection supply voltage Vdd；The grid of the 3rd PMOS MP3 connects the grid of the second PMOS MP2, its drain
Ground connection.
Reference current generating circuit 412 includes：4th PMOS MP4, the 5th PMOS MP5, the first NMOS tube MN1,
Two NMOS tube MN2 and first resistor R1；The 4th PMOS MP4 source class connection supply voltage Vdd, its grid level with it is described
5th PMOS MP5 grid, the grid of the first PMOS MP1, the source class of the 3rd PMOS MP3 are connected, and it leaks
Level connection the second PMOS MP2 drain；The first NMOS tube MN1 uses diode-connected, its grid and its drain
It is connected, and is connected to the drain of the 4th PMOS MP4, its source class is connected to the ground；The 5th PMOS MP5 uses two poles
Pipe connection, its grid is connected with its drain, and is connected to the 4th PMOS MP4 grid, its source class and supply voltage Vdd phases
Even；The grid of the second NMOS tube MN2 is connected with the grid of the first NMOS tube MN1, and its drain is connected to the described 5th
PMOS MP5 drain, its source class is connected with one end of the first resistor R1；The other end of the first resistor R1 and ground phase
Even.
In specific implementation process, start-up circuit is used for the startup and shut-off for controlling the reference current generating circuit 412.
Specifically, it is 0 that electric charge on the first electric capacity C1 is given tacit consent to upon power-up, now, the second PMOS MP2 and described the
Three PMOS MP3 are turned on, and have been dragged down N point potential voltages, have been increased M point potential voltages so that the grid of the 4th PMOS MP4
Drops, the grid voltage rise of the first NMOS tube MN1, reference current generating circuit 412 enters working condition, while described the
One PMOS MP1 grid voltage declines, and is turned in the presence of supply voltage Vdd, and then gives the first electric capacity C1 chargings, makes it
Upper step voltage gradually rises, when the first electric capacity C1 is charged to supply voltage Vdd, the first PMOS MP1, described
Second PMOS MP2 and the 3rd PMOS MP3 disconnects, and start-up circuit disconnects.
Further, after start-up circuit 411 is turned on, reference current generating circuit 412 enters working condition, produces two-way
Biasing voltage signal VNAnd VM, correspond output the 8th PMOS MP8 and the 6th into the charge pump main body circuit 430
There is provided the bias voltage needed for its conducting for NMOS tube MN6 grid end.
In specific implementation process, referring still to Fig. 3, voltage follower 420 includes：6th PMOS MP6, the 7th PMOS
Pipe MP7, the 3rd NMOS tube MN3, the 4th NMOS tube MN4 and the 5th NMOS tube MN5；The source class of the 6th PMOS MP6 connects
Meet supply voltage Vdd；The source class of the 7th PMOS MP7 is connected with supply voltage Vdd, and its grid is connected with drain, and even
It is connected to the grid of the 6th PMOS MP6；The drain of the 3rd NMOS tube MN3 is connected with grid, and is connected to described
Six PMOS MP6 drain electrode, and to the output voltage signal V of charge pump main body circuit 430B；The 4th NMOS tube MN4's
Drain is connected to the drain of the 7th PMOS MP7, and its source class is connected with the source class of the 3rd NMOS tube MN3, its grid
To the output voltage signal V of charge pump main body circuit 430A；The drain of the 5th NMOS tube MN5 is connected to the benchmark electricity
Flow the biasing voltage signal V that generation circuit 412 is producedM, its source class ground connection.
Voltage follower 420 is connected with the module of charge pump main body circuit 430, is carried to charge pump main body circuit 430
For two-way approximately equal voltage signal VAAnd VB, and export to the charge pump main body circuit, so as to eliminate electric charge distribution.Tool
For body, voltage signal VAFor giving the tenth PMOS MP10 in charge pump main body circuit and the 8th NMOS tube MN8 offers
Drain voltage, voltage signal VBFor giving the 9th PMOS MP9 in charge pump main body circuit and the 7th NMOS tube MN7 offers
Drain voltage, to ensure the charging current source Imp in charge pump main body circuit 430 and discharge current source Imn in any work shape
Under state, there is the road of water conservancy diversion, and then ensure that node N1 voltage is relative with node N2 voltage stable, so as to effectively reduce
Electric charge between node N1, N2 and output voltage Vout is shared.
Further, referring still to Fig. 3, charge pump main body circuit 430 is used to produce charging and discharging currents, including charging circuit
And discharge circuit, charging circuit to output node for using charging control signal UP, charging；Discharge circuit, for profit
Discharge control signal DN is used, output node is discharged.
Wherein, the charging circuit includes：8th PMOS MP8, the 9th PMOS MP9 and the tenth PMOS MP10；Institute
The 8th PMOS MP8 is stated as charging current source, its grid connects the bias voltage that the reference current generating circuit 412 is produced
Signal VN, its source class is connected to power supply Vdd；The 9th PMOS MP9 and the tenth PMOS MP10, are opened as charging
Close, the grid connection charging control signal UP of the 9th PMOS MP9 reverse logic, its source class connects the 8th PMOS
Pipe MP8 drain, its drain connects the voltage signal V that the voltage follower 420 is producedB；The tenth PMOS MP10's
Grid connects charging control signal UP, and its source class connects the drain of the 8th PMOS MP8, and its drain is connected to the defeated of charge pump
Egress.
The discharge circuit includes：7th NMOS tube MN7, the 8th NMOS tube MN8 and the 6th NMOS tube MN6；Described 7th
NMOS tube MN7 and the 8th NMOS tube MN8 connects discharge control signal DN as discharge switch, the 7th NMOS tube MN7 grid, its
Drain is connected with the drain of the 9th PMOS MP9；8th NMOS tube MN8 grid connection discharge control signal DN's is reverse
Logic, its drain is connected to the output node of charge pump, and its source class connects the source class of the 7th NMOS tube MN7；6th NMOS tube
MN6, as discharge current source, its grid connects the biasing voltage signal V that the reference current generating circuit 412 is producedM, its source
Level ground connection, its drain connects the source class of the 7th NMOS tube MN7.
It is pointed out that charge pump main body circuit 430 includes four differential signal inputs, respectively charge control is believed
Number UP and its reverse logicDischarge control signal DN and its reverse logicThe charging control signal UP comes from described
The charging beacon signal of phase frequency detector output in phase-locked loop circuit, the discharge control signal DN comes from the phaselocked loop
The electric discharge beacon signal of phase frequency detector output in circuit；Further, charge pump main body circuit 430 also includes a signal
Output node, exemplary, as shown in figure 3, the signal output node is labeled as A, output node A is used as the phase-locked loop circuit
The input of loop filter.
Charge pump main body circuit 430 is used for using charging control signal UP and discharge control signal DN to output node charge and discharge
Electricity carries out voltage control, realizes and carries out discharge and recharge to loop filter.In specific implementation process, charging circuit, which is used to utilize, to be filled
Electric control signal UP, charges to output node；Discharge circuit is used to utilize discharge control signal DN, and output node is carried out
Electric discharge.Specifically, Fig. 3 is refer to, when UP signals are that low level, DN signals are high level, in the charge circuit, described
Ten PMOS MP10 are turned on, the 9th PMOS MP9 shut-offs, in discharge circuit, the 7th NMOS tube MN7 conductings, and
The 8th NMOS tube MN8 shut-offs, charging current source Imp flows through the tenth PMOS MP10 branch roads, loop filter is entered
Row charging, output voltage VoutRise.
When UP signals are that high level, DN signals are low level, in the charge circuit, the tenth PMOS MP10 is closed
It is disconnected, the 9th PMOS MP9 conductings, in discharge circuit, the 7th NMOS tube MN7 shut-offs, and the 8th NMOS tube
MN8 is turned on, and discharge current source Imn flows through the 8th NMOS tube MN8 branch roads, loop filter is discharged, output voltage
VoutReduction.
When UP signals and DN signals are simultaneously low level, in the charge circuit, the tenth PMOS MP10 conductings, institute
The 9th PMOS MP9 shut-offs are stated, in discharge circuit, the 7th NMOS tube MN7 shut-offs, and the 8th NMOS tube MN8 are led
Logical, charging current source Imp flows through the tenth PMOS MP10, the 8th NMOS tube MN8 and discharge current source Imn branch
Road, now, meets relational expression Imp=Iup=Idn=Imn, that is, it is equal with the electric current for flowing through discharge paths to flow through charging paths,
Therefore it is zero to flow into the electric current of loop filter for 0, i.e. charge pump charging and discharging currents mismatch, charge pump output voltage Vout will be kept
It is constant.
When UP signals and DN signals are simultaneously high level, in the charge circuit, the tenth PMOS MP10 shut-offs, institute
The 9th PMOS MP9 conductings are stated, in discharge circuit, the 7th NMOS tube MN7 conductings, and the 8th NMOS tube MN8 are closed
Disconnected, now, charging current source Imp flows through the 9th PMOS MP9, the 7th NMOS tube MN7 and discharge current source Imn
Discharge and recharge branch road in branch road, charge pump main body circuit disconnects, and charge pump charging and discharging currents mismatch is zero, charge pump output voltage
VoutIt will keep constant
It can be seen that, on the one hand, when charge pump discharge and recharge branch road is turned on and switched with turning off, no matter in which kind of working condition, by
Two-way approximately equal voltage signal V is provided in voltage follower 420AAnd VB, it is ensured that charging current source and discharge current source
There is the road of water conservancy diversion, realize that charging and discharging currents source is in the conduction state all the time, it is to avoid the 8th PMOS MP8 and the 6th NMOS tube
Switchings of the MN6 between saturation region and cut-off region, namely avoid the electric current for flowing through the 8th PMOS MP8 play between 0 and Imp
Strong saltus step, maintains node N1 voltage relative stability, at the same it also avoid flowing through the 6th NMOS tube MN6 electric current 0 with
Violent saltus step, maintains node N2 voltage relative stability, reduces node N1, N2 and output node V between ImnoutIt
Between electric charge share；On the other hand, the voltage follower 420 causes node N1 and N2 voltage and charge pump main body circuit
430 output voltage VoutApproximately equal, therefore will not also produce electricity between stray capacitance and loop filter on node N1 and N2
Lotus distributes phenomenon.So as to effectively reducing charge pump charging and discharging currents mismatch, it is to avoid electric charge partition effect.
Although having been described for preferred embodiment of the present utility model, those skilled in the art once know substantially
Creative concept, then can make other change and modification to these embodiments.So, appended claims are intended to be construed to bag
Include preferred embodiment and fall into having altered and changing for the utility model scope.
Obviously, those skilled in the art can carry out various changes and modification without departing from this practicality to the utility model
New spirit and scope.So, if these modifications and variations of the present utility model belong to the utility model claim and
Within the scope of its equivalent technologies, then the utility model is also intended to comprising including these changes and modification.
Claims (6)
1. a kind of charge pump, it is characterised in that including：Reference current source module (410), voltage follower (420) and electric charge
Pump main body circuit (430)；
The reference current source module (410) includes start-up circuit (411) and reference current generating circuit (412), described to start
Circuit (411) is used for the startup and shut-off for controlling the reference current generating circuit (412), the reference current generating circuit
(412) it is used to produce two-way biasing voltage signal VNAnd VM, and export to the charge pump main body circuit (430)；
The voltage follower (420), is connected with the charge pump main body circuit (430), for for charge pump main body circuit
Two-way approximately equal voltage signal V is providedAAnd VB, so as to eliminate electric charge distribution；
The charge pump main body circuit (430) is described to fill for producing charging and discharging currents, including charging circuit and discharge circuit
Circuit is used to utilize charging control signal UP, and output node is charged, and the discharge circuit is used to utilize control of discharge
Signal DN, discharges output node.
2. a kind of charge pump as claimed in claim 1, it is characterised in that the start-up circuit (411) includes：First PMOS
(MP1), the first electric capacity (C1), the second PMOS (MP2) and the 3rd PMOS (MP3)；
The source class of first PMOS (MP1) is connected to supply voltage Vdd, and its drain connects the one of first electric capacity (C1)
End, and be connected with the grid of second PMOS (MP2), the other end ground connection of first electric capacity (C1)；Described second
The source class connection supply voltage Vdd of PMOS (MP2)；The grid of 3rd PMOS (MP3) connects second PMOS
(MP2) grid, its drain ground connection.
3. a kind of charge pump as claimed in claim 2, it is characterised in that the reference current generating circuit (412) includes：The
Four PMOSs (MP4), the 5th PMOS (MP5), the first NMOS tube (MN1), the second NMOS tube (MN2) and first resistor R1；
The source class connection supply voltage Vdd of 4th PMOS (MP4), its grid level and the grid of first PMOS (MP1)
Pole, the source class of the 3rd PMOS (MP3) are connected, and its drain connects the drain of second PMOS (MP2)；Described first
NMOS tube (MN1) uses diode-connected, and its grid is connected with its drain, and is connected to the leakage of the 4th PMOS (MP4)
Level, its source class is connected to the ground；5th PMOS (MP5) uses diode-connected, and its grid is connected with drain, and is connected to
The grid of 4th PMOS (MP4), its source class is connected with supply voltage Vdd；The grid of second NMOS tube (MN2) with it is described
The grid of first NMOS tube (MN1) is connected, and its drain is connected to the drain of the 5th PMOS (MP5), its source class with it is described
One end of first resistor (R1) is connected；The other end of the first resistor (R1) is connected to the ground.
4. a kind of charge pump as claimed in claim 1, it is characterised in that the voltage follower (420) includes：6th PMOS
Manage (MP6), the 7th PMOS (MP7), the 3rd NMOS tube (MN3), the 4th NMOS tube (MN4) and the 5th NMOS tube (MN5)；
The source class connection supply voltage Vdd of 6th PMOS (MP6)；The source class and power supply of 7th PMOS (MP7)
Voltage Vdd is connected, and its grid is connected with drain, and is connected to the grid of the 6th PMOS (MP6)；3rd NMOS tube
(MN3) drain is connected with grid, and is connected to the drain electrode of the 6th PMOS (MP6), and electric to the charge pump main body
Road (430) output voltage signal VB；The drain of 4th NMOS tube (MN4) is connected to the leakage of the 7th PMOS (MP7)
Level, its source class is connected with the source class of the 3rd NMOS tube (MN3), and its grid is exported to the charge pump main body circuit (430)
Voltage signal VA；The grid of 5th NMOS tube (MN5) is connected to the biasing of the reference current generating circuit (412) generation
Voltage signal VM, the source class of its drain connection the 3rd NMOS tube (MN3), its source class ground connection.
5. a kind of charge pump as claimed in claim 1, it is characterised in that the charging circuit includes：8th PMOS
(MP8), the 9th PMOS (MP9) and the tenth PMOS (MP10)；
8th PMOS (MP8) connects the reference current generating circuit (412) and produced as charging current source, its grid
Biasing voltage signal VN, its source class is connected to power supply Vdd；9th PMOS (MP9) and the tenth PMOS
(MP10), as charge switch, the grid connection charging control signal UP of the 9th PMOS (MP9) reverse logic, its
Source class connects the drain of the 8th PMOS (MP8), and its drain connects the voltage signal that the voltage follower (420) produces
VB；The grid connection charging control signal UP of tenth PMOS (MP10), its source class connects the 8th PMOS (MP8)
Drain, its drain is connected to the output node of charge pump；
The discharge circuit includes：7th NMOS tube (MN7), the 8th NMOS tube (MN8) and the 6th NMOS tube (MN6)；
7th NMOS tube (MN7) and the 8th NMOS tube (MN8) are as discharge switch, and the grid of the 7th NMOS tube (MN7) connects
Discharge control signal DN is met, its drain is connected with the drain of the 9th PMOS (MP9)；The grid of 8th NMOS tube (MN8)
Discharge control signal DN reverse logic is connected, its drain is connected to the output node of charge pump, its source class connection the described 7th
The source class of NMOS tube (MN7)；6th NMOS tube (MN6), as discharge current source, its grid connects the reference current and produces electricity
The biasing voltage signal V that road (412) is producedM, its source class ground connection, the source class of its drain connection the 7th NMOS tube (MN7).
6. a kind of charge pump as described in any one of claim 1 to 5, it is characterised in that the charge pump is used for phaselocked loop electricity
Road, wherein：
The output node as the phase-locked loop circuit loop filter input；
The charging control signal UP comes from the charging beacon signal of the phase frequency detector output in the phase-locked loop circuit；
The discharge control signal DN comes from the electric discharge beacon signal of the phase frequency detector output in the phase-locked loop circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720165200.1U CN206542391U (en) | 2017-02-23 | 2017-02-23 | A kind of charge pump |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720165200.1U CN206542391U (en) | 2017-02-23 | 2017-02-23 | A kind of charge pump |
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| Publication Number | Publication Date |
|---|---|
| CN206542391U true CN206542391U (en) | 2017-10-03 |
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ID=59949059
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201720165200.1U Active CN206542391U (en) | 2017-02-23 | 2017-02-23 | A kind of charge pump |
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| CN (1) | CN206542391U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109991526A (en) * | 2017-12-30 | 2019-07-09 | 杭州广立微电子有限公司 | Capacitance test method and its test chip, system under different voltages biasing |
-
2017
- 2017-02-23 CN CN201720165200.1U patent/CN206542391U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109991526A (en) * | 2017-12-30 | 2019-07-09 | 杭州广立微电子有限公司 | Capacitance test method and its test chip, system under different voltages biasing |
| CN109991526B (en) * | 2017-12-30 | 2024-05-03 | 杭州广立微电子股份有限公司 | Capacitance testing method under different voltage bias, and testing chip and system thereof |
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