CN104993817B - A kind of fast start circuit for charge pump phase lock loop - Google Patents
A kind of fast start circuit for charge pump phase lock loop Download PDFInfo
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- CN104993817B CN104993817B CN201510490675.3A CN201510490675A CN104993817B CN 104993817 B CN104993817 B CN 104993817B CN 201510490675 A CN201510490675 A CN 201510490675A CN 104993817 B CN104993817 B CN 104993817B
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Abstract
The invention belongs to electronic circuit technology field, more particularly to a kind of fast start circuit for charge pump phase lock loop.The circuit of the present invention, including phase frequency detector, quick charge module, charge pump, low pass filter, voltage controlled oscillator and frequency divider；The phase frequency detector connects external timing signal, and it inputs the output end of termination voltage controlled oscillator, the first input end of its first output termination charge pump, the second input of the second output termination charge pump；The output end of charge pump is followed by the input of voltage controlled oscillator by low pass filter；The output end of quick charge module is followed by low pass by switching tube and connects low pass filter；The input of the output termination frequency divider of voltage controlled oscillator；The output end of frequency divider connects the control terminal of switching tube by exporting enable signal, enable signal after d type flip flop.Invention has the beneficial effect that, there is provided is capable of the charge pump phase lock loop of quick lock in.
Description
Technical field
The invention belongs to electronic circuit technology field, more particularly to a kind of quick startup for charge pump phase lock loop
Circuit.
Background technology
In electronics and the communications field, phaselocked loop turns into indispensable basic device, with large-scale integrated electricity
The development of road technique with it is ripe, use the phaselocked loop of charge pump construction to be easily integrated with it, low-power consumption, low jitter, lock without difference
The advantages that determining, it is widely used.As shown in figure 1, basic charge pump phase lock loop includes phase frequency detector PFD, electric charge
Pump CP, low pass filter LPF, voltage controlled oscillator VCO, frequency divider DIV.Phase frequency detector compares the phase and frequency of two signals
Difference, and control signal is produced to charge pump, charge pump gives loop filter discharge and recharge, the output frequency of voltage controlled oscillator accordingly
Rate is proportional to the control voltage on low pass filter, finally makes reference clock with Fractional-N frequency device output signal with the same phase of frequency, so as to press
Controlled oscillator output frequency is N times of reference clock frequency.
In traditional low frequency charge pumping phaselocked loop application, phase-locked loop operation is also limited in lower frequency, loop bandwidth
Must be relatively low, and loop bandwidth and pull-down current in charge pump are proportional, therefore the pull-up current of charge pump is generally smaller, to low
Big integrating capacitor charging rate is very slow in bandpass filter, and this causes voltage controlled oscillator during circuit start to reach the control of needs
Voltage needs long time, so as to which phaselocked loop is unable to quick lock in.
The content of the invention
It is to be solved by this invention, the problem of aiming at quick lock in is unable to existing for existing phaselocked loop, propose a kind of
Fast start circuit for charge pump phase lock loop.
To achieve the above object, the present invention adopts the following technical scheme that：
A kind of fast start circuit for charge pump phase lock loop, including phase frequency detector, quick charge module, electric charge
Pump, low pass filter, voltage controlled oscillator and frequency divider；The phase frequency detector connects external timing signal, and it inputs termination stream control
The output end of oscillator, the first input end of its first output termination charge pump, the second input of the second output termination charge pump
End；The output end of charge pump is followed by the input that voltage turns current module by low pass filter；The output of quick charge module
End is followed by low pass by switching tube and connects low pass filter；Voltage turns the first input of the output termination controlled oscillator of current module
End；Second input termination external dc electricity stream Idc of controlled oscillator, the input of output 16 frequency dividers of termination；16 frequency dividers
Output end Fout take back phase frequency detector and by exporting enable signal after d type flip flop, enable signal connects the control of switching tube
End；
Quick charge is carried out to the bulky capacitor in low pass filter when the quick charge module is used to start, realized to pressure
The control voltage of controlled oscillator (turn current module by voltage and controlled oscillator is formed) is quickly adjusted.
The total technical scheme of the present invention, integrating capacitor in low pass filter during in order to solve the startup of conventional charge pump phaselocked loop
The problem of phaselocked loop is unable to quick lock in caused by charging slowly, by embedded quick charge module, to low when realizing startup
The quick charge of bulky capacitor in bandpass filter.When phaselocked loop starts, electric capacity both end voltage is zero in low pass filter, by quick
Large-drive-current in charging module carries out quick charge to electric capacity, and the control voltage for turning current module to voltage carries out coarse adjustment,
Charging interval is 16 cycles of controlled oscillator centre frequency, and centre frequency vibrates for peripheral input current Idc controlling streams control
Signal frequency caused by device, guarantee have enough time to charge near the control voltage needed for centre frequency, and Fout passes through 16 weeks
Phase, 16 frequency divider output switching activities make trigger export enable signal EN, turn off quick charge module with the effect of d type flip flop set end
And PFD module normal works output control signal control charge pump is carried out discharge and recharge to integrating capacitor, current-mode is turned to voltage
The control voltage of block is finely adjusted, until the input signals of PFD two are the same as the same phase of frequency.
Further, the charge pump is by the first PMOS P1, the second PMOS MP2, the 3rd PMOS MP3, the 4th
PMOS MP4, the 5th PMOS MP5, the 15th PMOS MP15, the 16th PMOS MP16, the first NMOS tube MN1, second
NMOS tube MN2, the 3rd NMOS tube MN3, the 4th NMOS tube MN4, the tenth NMOS tube MN10, the first phase inverter INV1 and the first electric current
Source I1 is formed；First phase inverter INV1 input termination enable signal, it exports the 3rd PMOS MP3 of termination grid；3rd
PMOS MP3 source electrode connects power supply, and it, which drains, connects the 4th PMOS MP4 grid, the 5th PMOS MP5 grid and second
PMOS MP2 grid；15th PMOS MP15 source electrode connects power supply, its grounded-grid, and its drain electrode meets the 4th PMOS MP4
Source electrode；16th PMOS MP16 source electrode connects power supply, its grounded-grid, and it, which drains, connects the 5th PMOS MP5 source electrode；The
Four PMOS MP4 drain electrode connects the first current source I1 positive pole, the first current source I1 negative pole ground connection；5th PMOS MP5's
Drain electrode connects the 4th NMOS tube MN4 drain electrode；4th NMOS tube MN4 source electrode connects the tenth NMOS tube MN10 drain electrode, and its grid connects
The drain electrode of first NMOS tube MN1 grid and the 3rd NMOS tube MN3；3rd NMOS tube MN3 grid connects enable signal, its source electrode
Ground connection；Tenth NMOS tube MN10 grid connects power supply, its source ground；First NMOS tube MN1 drain electrode meets the second PMOS MP2
Drain electrode, its source electrode connects the second NMOS tube MN2 drain electrode；Second PMOS MP2 source electrode connects the first PMOS MP1 drain electrode；
First PMOS MP1 grid is the first input end of charge pump；Second NMOS tube MN2 source ground, its grid are electric charge
Second input of pump；The output end that second PMOS MP2 drains with the tie point of the first NMOS tube MN1 drain electrodes is charge pump.
Further, the low pass filter is made up of the first electric capacity C1, the second electric capacity C2 and first resistor R1；Second electricity
Hold in parallel with the first electric capacity C1 after C2 and first resistor R1 connects；First electric capacity C1 and first resistor R1 tie point connects electric charge
Pump, voltage controlled oscillator and quick charge module；Wherein the first electric capacity C1 is bulky capacitor.
Further, the quick charge module by the 6th PMOS MP6, the 7th PMOS MP7, the 8th PMOS MP8,
9th PMOS MP9, the tenth PMOS MP10, the 11st PMOS MP11, the 12nd PMOS MP12, the 15th PMOS
MP15, the 5th NMOS tube MN5, the 11st NMOS tube MN11, the second current source I2, second resistance R2, the first operational amplifier and
Transmission gate is formed；6th PMOS MP6 source electrode connects power supply, and its grid connects the 7th PMOS MP7 grid and the second current source
I2 positive pole, it drains and gate interconnection；7th PMOS MP7 source electrode connects power supply, and its drain electrode is followed by by second resistance R2
Ground；7th PMOS MP7, which drains, connects the 11st PMOS MP11 grid with second resistance R2 tie point；11st PMOS
MP11 source electrode connects the 9th PMOS MP9 drain electrode, its grounded drain；9th PMOS MP9 source electrode connects power supply, and its grid connects
The drain electrode of 8th PMOS MP8 grid, the tenth PMOS MP10 grid and the 15th PMOS MP15；15th PMOS
MP15 grid connects enable signal, and its source electrode connects power supply；8th PMOS MP8 source electrode connects power supply, its grid and drain interconnection,
It, which drains, connects the 5th NMOS tube MN5 drain electrode；5th NMOS tube MN5 grid connects enable signal, and its source electrode meets the 11st NMOS
Pipe MN11 drain electrode；11st NMOS tube MN11 grid connects bias voltage, its source ground；Tenth PMOS MP10 source electrode
Power supply is connect, it, which drains, connects the 12nd PMOS MP12 source electrode；12nd PMOS MP12 grid connects the output end of transmission gate,
Its grounded drain；9th PMOS MP9 drains connects the first operational amplifier with the tie point of the 11st PMOS MP11 source electrodes
First input end, the tenth PMOS MP10 drain electrodes and the operational amplifier of tie point solution first of the 12nd PMOS MP12 source electrodes
Second input；The biasing termination bias voltage of operational amplifier, it exports the first input end of termination transmission gate；Transmission gate
Second input termination enable signal, its reversed enable signal backward of the 3rd input.
Further, first operational amplifier is by the 17th POMS pipes MP17, the 18th PMOS MP18, the 13rd
NMOS tube MN13, the 14th NMOS tube MN14, the 15th NMOS tube MN15, the 16th NMOS tube MN16 and the 17th NMOS tube
MN17 is formed；17th PMOS MP17 source electrode connects power supply, and its grid and drain interconnection, its grid connect the 18th PMOS
MP18 grid, it, which drains, connects the 12nd NMOS tube MN12 drain electrode；12nd NMOS tube MN12 grid is that the first computing is put
The first input end of big device, its source electrode connect the 15th NMOS tube MN15 drain electrode and the 13rd NMOS tube MN13 source electrode；Tenth
Five NMOS tube MN15 grid connects bias voltage, its source ground；13rd NMOS tube MN13 grid is the first operation amplifier
Second input of device, its drain electrode connect power supply；18th PMOS MP18 source electrode connects power supply, and its drain electrode connects the 14th NMOS tube
The drain electrode of MN14 grid and the 16th NMOS tube MN16；16th NMOS tube MN16 grid connects bias voltage, and its source electrode connects
Ground；14th NMOS tube MN14 source electrode connects the 17th NMOS tube MN17 drain electrode；17th NMOS tube MN17 grid connects partially
Voltage is put, its source ground；14th NMOS tube MN14 source electrodes and the tie point of the 17th NMOS tube MN17 drain electrodes are the first fortune
Calculate the output end of amplifier.
Further, the voltage controlled oscillator turns current module and current control oscillator module composition by voltage；It is described
Voltage turns current module by the 13rd PMOS MP13, the 14th PMOS MP14, the 6th NMOS tube MN6, the 7th NMOS tube
MN7, the 8th NMOS tube MN8, the 9th NMOS tube MN9,3rd resistor R3, the 3rd electric capacity C3, the second phase inverter INV2, the second computing
Amplifier, the second current source I2 are formed；The first input end of second operational amplifier connects the output end of charge pump, its second output
End is grounded after passing through 3rd resistor R3, and it exports the 6th NMOS tube MN6 of termination grid；6th NMOS tube MN6 drain electrode connects
13 PMOS MP13 drain electrode；13rd PMOS MP13 grid and drain interconnection, its grid connect the 14th PMOS
MP14 grid, its source electrode connect power supply；14th PMOS MP14 source electrode connects power supply, and its drain electrode connects the 7th NMOS tube MN7's
Drain electrode；7th NMOS tube MN7 grid connects the 9th NMOS tube MN9 source electrode, its source ground；7th NMOS tube MN7 grids with
The tie point of 9th NMOS tube MN9 source electrodes after the 3rd electric capacity C3 by being grounded；9th NMOS tube MN9 grid connects the second phase inverter
INV2 output end, it, which drains, connects the 8th NMOS tube MN8 grid；8th NMOS tube MN8 drain electrode connects the second current source I2's
Negative pole, its source ground；14th PMOS MP14 drains turns electric current with the tie point of the 7th NMOS tube MN7 drain electrodes for voltage
The output end of module, the output terminate the input of current control oscillator.
Invention has the beneficial effect that, there is provided is capable of the charge pump phase lock loop of quick lock in.
Brief description of the drawings
Fig. 1 is a kind of typical charge pump phase lock loop schematic diagram；
Fig. 2 is a kind of quick charge charge pump phase lock loop schematic diagram of the present invention；
Fig. 3 is quick charge module circuit diagram；
Fig. 4 is amplifier OP1 circuit diagrams in quick charge module；
Fig. 5 is charge pump circuit figure；
Fig. 6 is that voltage turns current module circuit diagram.
Embodiment
The present invention proposes a kind of quick charge charge pump phase lock loop, and particular circuit configurations specifically connect as shown in Fig. 2-Fig. 6
It is as follows to connect relation：
The phase frequency detector input is clock signal clk and controlled oscillator output signal Fout, is exported as charge pump
Two required charge and discharge control signals up and down.
The substrate of MP1, MP3, MP15, MP16 source electrode and substrate and MP2, MP4, MP5 connects power supply inside the charge pump
Voltage, MN2, MN3, MN10 source electrode and substrate and MN1, MN4 Substrate ground current potential, MP1 drain electrode connect MP2 source electrode,
MP15, which drains, connects MP4 source electrode, and MP16, which drains, connects MP5 source electrode, and MN1 source electrode connects MN2 drain electrode, and MN4 source electrode meets MN10
Drain electrode, MP1 grid meets up, and MP15, MP16 grid meets VSS, MP2 grid and MP3, MP4 drain electrode and MP4, MP5's
Grid, which is connected, is connected to current source input I 1, and MN1 grid is connected with the drain electrode of MN4 grid and MN3, and MN4 drain electrode meets MP5
Drain electrode, MN3 grid is connected EN with phase inverter INV1 inputs, and MP3 grid meets phase inverter INV1 output end, MN2
Grid meet down, MN10 grid meets VCC, and MP2 drain electrode connects MN1 drain electrode and is connected to low-pass filter capacitance C1 upper pole
Plate Vcont.
The low pass filter is made up of two electric capacity C1, C2 and resistance R1, and C1 top crowns Vcont meets R1 one end, C1, C2
Bottom crown earthing potential, another termination C2 of R1 top crown.
The source electrode and substrate and MP11, MP12, MP15 substrate of the quick charge module MP6-MP10 connects power supply electricity
Pressure, MP6 grid and drain electrode, MP7 grid meet I2, MP8 grid, the grid of drain electrode and MP9, MP10 and MN5, MP15
Drain electrode is connected, and MP7 drain electrode is connected with MP11 grid, R2 one end, MP15 drain electrode and MP14 source electrode and OP1 forward direction
Input is connected, and MP9 drain electrode is connected with MP11 source electrode and OP1 negative input, and MP12 grid meets Vcont, R2's
The source ground current potential of lower end and MN11 source electrode, substrate and MP11, MP12, MN5 source electrode meet MN11 drain electrode, MN5, MP15
Grid and OP1 enabled termination EN, MN11 and OP1 biasing termination Vb, OP1 output termination transmission gate input, transmission
The output of door meets Vcont, and the top and bottom of transmission gate connect respectively and EN.
The drain electrode of described OP1 circuits MP17, MP18 source electrode and substrate and MN13, MN14 connect power supply VCC, MN12,
MN13, MN14 substrate and MN15, MN16, MN17 source electrode and Substrate ground current potential, MP17 grid and drain electrode connect MN12's
Drain electrode, MN12 grid be the positive input INp, MN13 of amplifier grid be amplifier positive input INn, MN12,
MN13 source electrode connects MN15 drain electrode, and MN15, MN16, MN17 grid meet Vb, and MP18 source electrode meets MN16 drain electrode and MN14
Grid, the drain electrode that MN14 source electrode meets MN17 is the output OUT of amplifier.
The voltage controlled oscillator turns current module V-i by voltage and current control oscillator module CCO is formed.
The OP2 positive inputs that the voltage turns current module meet Vcont, and negative end is drained with MN6 and R3 upper ends are connected,
Output connects MN6 grids, and has Enable Pin EN to access CP2, and MP13, MP14 source electrode, substrate connect supply voltage, MP13, MP14's
Grid, MP13 drain electrode are connected with MN6 source electrode, under MN6, MN7, MN8, MN9 substrate and MN7, MN8 source electrode and R3
End, C3 bottom crown earthing potential, MP14, MN7 drain electrode meet output I3, and MN7 grid and C3 top crown connect MN9 source
Pole, MN8 grid, drain electrode and MN9 drain electrode meet I2, and EN connects phase inverter INV2 inputs, INV2 output termination MN9 grids.
The input of the current control oscillator module CCO connects voltage and turns current module output, exports and is connect for Fout, Fout
Frequency divider inputs and PFD inputs, and the output of 16 frequency dividers connects the clock input of d type flip flop, and d type flip flop has set end S and reset terminal
R, output EN access quick charge modules turn current module with charge pump and voltage.
The present invention operation principle be：
A kind of fast start circuit applied to charge pump phase lock loop of the present invention, as shown in Fig. 2 the charge pump with routine
Phaselocked loop is compared, embedded quick charge module, and quick charge module is controlled by enable signal EN caused by 16 frequency dividers frequency dividing
Quick charge and charge pump to low pass filter voltage Vcont realize lock to low pass filter voltage Vcont intense adjustment
Quick, accurate lock when phase ring starts.Regulation to VCO input control voltages Vcont can be divided into coarse adjustment and fine setting two parts.
Coarse tuning process：When phaselocked loop starts, peripheral d type flip flop makes EN make quick charge module as shown in Figure 3 for height by reset terminal
Middle MP15 shut-offs, MN5 are opened, quick charge module normal work.Vcont voltages are very low during circuit start, therefore OP1 negative ends
INn is very low, and forward end INp be clamped to it is higher than R2 × I2, as shown in figure 4, amplifier OP1 devises source with output stage, so
MN3 can provide output end larger driving current in circuit start, and the relatively large-drive-current that this strand is flowed out from OP1 is to low pass
Electric capacity C1, C2 quick charges in wave filter, Vcont voltages are started from scratch, and charging is very fast to be risen, now in electric charge as shown in Figure 5
In pump, MN3, MP3 are turned on when EN is high, and MP2 grids, which are driven high MN1 grids and are pulled low, makes electric charge air pump inoperative, now stream control
Oscillator output signal Fout frequency is only centre frequency, the DC current that Idc is an externally input as caused by being controlled Idc.
Frequency divider in the present invention is play a part of to VCO output signal frequencys multiplication in conventional charge pump phaselocked loop, but by VCO
Signal 16 divides, and makes quick charge module have enough time that Vcont is charged to the control voltage needed for phaselocked loop centre frequency
Near, for Fout signals after 16 cycles, frequency divider, which provides edging trigger, makes d type flip flop set to be low, output enable signal EN
Each switching tube is controlled quick charge module is closed and is opened charge pump and voltage turns current module, so far, coarse tuning process terminates,
Trim process starts.Trim process：As shown in figure 4, upper and lower sourcing current source of the outside less mirror images of electric current I 1 to charge pump,
Phase frequency detector PFD compares Fout and CLK frequency and phase, and output control signal up, down controls the switch in charge pump
Pipe MP1, MN2, the discharge and recharge to Vcont is realized, so as to adjust Vcont sizes until Fout and CLK is the same as the same phase of frequency.In addition, this
VCO turns voltage module by electric current in invention and current control oscillator CCO is realized, electric current turns voltage module as shown in fig. 6, fast
After fast charging complete, Enable Pin EN is low, and MP9 conductings and OP2 can be with normal works, and voltage is Vcont on clamper R3, and by
Fig. 3 understands that Vcont is approximately equal to R2 × I2, and R2 is equal in magnitude with R3, therefore electric current is equal to I2 on MN6, through electric current on mirror image MN14 about
For I2, and electric current is also I2 on MN7, the input signals of PFD two not up to frequency with phase when, caused Vcont change can cause
MP14 and MN7 electric current is unequal, and its difference is output current I3, until the input signals of PFD two are the same as the same phase of frequency, I3 zero.
Current control oscillator CCO inputs control electric current turns current module output current I3 and peripheral input current Idc including voltage,
Idc determines phaselocked loop centre frequency, and I3 be cycle of phase-locked loop control electric current, and I3 accurately adjusts output signal frequently in phase locking process
Rate, I3 electric currents are 0 after the completion of frequency locking.
Claims (5)
1. a kind of fast start circuit for charge pump phase lock loop, including phase frequency detector, quick charge module, charge pump,
Low pass filter, voltage controlled oscillator and frequency divider；The phase frequency detector connects external timing signal, and it inputs termination VCO
The output end of device, the first input end of its first output termination charge pump, the second input of the second output termination charge pump；Electricity
The output end of lotus pump is followed by the input of voltage controlled oscillator by low pass filter；The output end of quick charge module passes through switch
Pipe is followed by low pass filter；The input of the output termination frequency divider of voltage controlled oscillator；The output end of frequency divider passes through d type flip flop
After export enable signal, enable signal connects the control terminal of switching tube；
The quick charge module is used to carry out quick charge to the bulky capacitor in low pass filter, realizes to voltage controlled oscillator
Control voltage is adjusted；
The charge pump is by the first PMOS MP1, the second PMOS MP2, the 3rd PMOS MP3, the 4th PMOS MP4, the 5th
PMOS MP5, the 15th PMOS MP15, the 16th PMOS MP16, the first NMOS tube MN1, the second NMOS tube MN2, the 3rd
NMOS tube MN3, the 4th NMOS tube MN4, the tenth NMOS tube MN10, the first phase inverter INV1 and the first current source I1 are formed；First
Phase inverter INV1 input termination enable signal, it exports the 3rd PMOS MP3 of termination grid；3rd PMOS MP3 source
Pole connects power supply, and it, which drains, connects the grid of the 4th PMOS MP4 grid, the 5th PMOS MP5 grid and the second PMOS MP2
Pole；15th PMOS MP15 source electrode connects power supply, its grounded-grid, and it, which drains, connects the 4th PMOS MP4 source electrode；16th
PMOS MP16 source electrode connects power supply, its grounded-grid, and it, which drains, connects the 5th PMOS MP5 source electrode；4th PMOS MP4's
Drain electrode connects the first current source I1 positive pole, the first current source I1 negative pole ground connection；5th PMOS MP5 drain electrode meets the 4th NMOS
Pipe MN4 drain electrode；4th NMOS tube MN4 source electrode connects the tenth NMOS tube MN10 drain electrode, and its grid connects the first NMOS tube MN1's
The drain electrode of grid and the 3rd NMOS tube MN3；3rd NMOS tube MN3 grid connects enable signal, its source ground；Tenth NMOS tube
MN10 grid connects power supply, its source ground；First NMOS tube MN1 drain electrode connects the second PMOS MP2 drain electrode, and its source electrode connects
Second NMOS tube MN2 drain electrode；Second PMOS MP2 source electrode connects the first PMOS MP1 drain electrode；First PMOS MP1's
Grid is the first input end of charge pump；Second NMOS tube MN2 source ground, its grid are the second input of charge pump；
The output end that second PMOS MP2 drains with the tie point of the first NMOS tube MN1 drain electrodes is charge pump.
2. a kind of fast start circuit for charge pump phase lock loop according to claim 1, it is characterised in that described low
Bandpass filter is made up of the first electric capacity C1, the second electric capacity C2 and first resistor R1；After second electric capacity C2 and first resistor R1 series connection
It is in parallel with the first electric capacity C1；First electric capacity C1 and first resistor R1 tie point connects charge pump, voltage controlled oscillator and quick charge
Module；Wherein the first electric capacity C1 is bulky capacitor.
3. a kind of fast start circuit for charge pump phase lock loop according to claim 2, it is characterised in that described fast
Fast charging module is by the 6th PMOS MP6, the 7th PMOS MP7, the 8th PMOS MP8, the 9th PMOS MP9, the tenth PMOS
Pipe MP10, the 11st PMOS MP11, the 12nd PMOS MP12, the 15th PMOS MP15, the 5th NMOS tube MN5, the tenth
One NMOS tube MN11, the second current source I2, second resistance R2, the first operational amplifier and transmission gate are formed；6th PMOS MP6
Source electrode connect power supply, its grid connects the 7th PMOS MP7 grid and the second current source I2 positive pole, and its drain electrode is mutual with grid
Even；7th PMOS MP7 source electrode connects power supply, and it drains by being grounded after second resistance R2；7th PMOS MP7 drains and the
Two resistance R2 tie point connects the 11st PMOS MP11 grid；11st PMOS MP11 source electrode connects the 9th PMOS
MP9 drain electrode, its grounded drain；9th PMOS MP9 source electrode connects power supply, and its grid connects the 8th PMOS MP8 grid,
The drain electrode of ten PMOS MP10 grid and the 15th PMOS MP15；15th PMOS MP15 grid connects enable signal,
Its source electrode connects power supply；8th PMOS MP8 source electrode connects power supply, its grid and drain interconnection, and its drain electrode meets the 5th NMOS tube MN5
Drain electrode；5th NMOS tube MN5 grid connects enable signal, and its source electrode connects the 11st NMOS tube MN11 drain electrode；11st
NMOS tube MN11 grid connects bias voltage, its source ground；Tenth PMOS MP10 source electrode connects power supply, and its drain electrode connects the tenth
Two PMOS MP12 source electrode；12nd PMOS MP12 grid connects the output end of transmission gate, its grounded drain；9th PMOS
Pipe MP9, which drains, meets the first input end of the first operational amplifier, the tenth PMOS with the tie point of the 11st PMOS MP11 source electrodes
Pipe MP10, which drains, connects the second input of the first operational amplifier with the tie point of the 12nd PMOS MP12 source electrodes；Operation amplifier
The biasing termination bias voltage of device, it exports the first input end of termination transmission gate；The second enabled letter of input termination of transmission gate
Number, its reversed enable signal backward of the 3rd input.
4. a kind of fast start circuit for charge pump phase lock loop according to claim 3, it is characterised in that described
One operational amplifier is by the 17th POMS pipes MP17, the 18th PMOS MP18, the 12nd NMOS tube MN12, the 13rd NMOS tube
MN13, the 14th NMOS tube MN14, the 15th NMOS tube MN15, the 16th NMOS tube MN16 and the 17th NMOS tube MN17 structures
Into；17th PMOS MP17 source electrode connects power supply, and its grid and drain interconnection, its grid connect the 18th PMOS MP18 grid
Pole, it, which drains, connects the 12nd NMOS tube MN12 drain electrode；12nd NMOS tube MN12 grid is the of the first operational amplifier
One input, its source electrode connect the 15th NMOS tube MN15 drain electrode and the 13rd NMOS tube MN13 source electrode；15th NMOS tube
MN15 grid connects bias voltage, its source ground；13rd NMOS tube MN13 grid is the second of the first operational amplifier
Input, its drain electrode connect power supply；18th PMOS MP18 source electrode connects power supply, and it, which drains, connects the 14th NMOS tube MN14 grid
Pole and the 16th NMOS tube MN16 drain electrode；16th NMOS tube MN16 grid connects bias voltage, its source ground；14th
NMOS tube MN14 source electrode connects the 17th NMOS tube MN17 drain electrode；17th NMOS tube MN17 grid connects bias voltage, its
Source ground；14th NMOS tube MN14 source electrodes and the tie point of the 17th NMOS tube MN17 drain electrodes are the first operational amplifier
Output end.
A kind of 5. fast start circuit for charge pump phase lock loop according to claim 4, it is characterised in that the pressure
Controlled oscillator turns current module and current control oscillator module composition by voltage；The voltage turns current module by the 13rd
PMOS MP13, the 14th PMOS MP14, the 6th NMOS tube MN6, the 7th NMOS tube MN7, the 8th NMOS tube MN8, the 9th
NMOS tube MN9,3rd resistor R3, the 3rd electric capacity C3, the second phase inverter INV2, the second operational amplifier, the second current source I2 structures
Into；The first input end of second operational amplifier connects the output end of charge pump, and the second input of the second operational amplifier passes through
It is grounded after 3rd resistor R3, the 6th NMOS tube MN6 of output termination of the second operational amplifier grid；6th NMOS tube MN6's
Drain electrode connects the 13rd PMOS MP13 drain electrode；13rd PMOS MP13 grid and drain interconnection, its grid connect the 14th
PMOS MP14 grid, its source electrode connect power supply；14th PMOS MP14 source electrode connects power supply, and its drain electrode connects the 7th NMOS tube
MN7 drain electrode；7th NMOS tube MN7 grid connects the 9th NMOS tube MN9 source electrode, its source ground；7th NMOS tube MN7 grid
The tie point of pole and the 9th NMOS tube MN9 source electrodes after the 3rd electric capacity C3 by being grounded；It is anti-that 9th NMOS tube MN9 grid connects second
Phase device INV2 output end, it, which drains, connects the 8th NMOS tube MN8 grid；8th NMOS tube MN8 drain electrode connects the second current source
I2 negative pole, its source ground；14th PMOS MP14 drains turns electricity with the tie point of the 7th NMOS tube MN7 drain electrodes for voltage
The output end of flow module, the output terminate the input of current control oscillator.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510490675.3A CN104993817B (en) | 2015-08-12 | 2015-08-12 | A kind of fast start circuit for charge pump phase lock loop |
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| CN201510490675.3A CN104993817B (en) | 2015-08-12 | 2015-08-12 | A kind of fast start circuit for charge pump phase lock loop |
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Families Citing this family (17)
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| CN106656170B (en) * | 2016-12-26 | 2020-02-18 | 北京华大九天软件有限公司 | Starting circuit and self-biased phase-locked loop circuit |
| CN108449085B (en) * | 2017-02-16 | 2021-07-13 | 中芯国际集成电路制造(上海)有限公司 | Phase-locked loop and electronic system |
| CN108667456A (en) * | 2017-03-28 | 2018-10-16 | 深圳市中兴微电子技术有限公司 | A kind of charge pump, processing method and phase-locked loop circuit based on charge pump |
| CN108471307B (en) * | 2017-10-30 | 2021-05-28 | 四川和芯微电子股份有限公司 | Charge pump circuit |
| CN107707117B (en) * | 2017-11-20 | 2023-11-14 | 广东工业大学 | Charge pump time sequence control circuit and charge pump circuit |
| CN108718195B (en) * | 2018-04-17 | 2022-05-13 | 北京时代民芯科技有限公司 | Charge pump phase-locked loop adopting configurable starting circuit |
| CN108829168B (en) * | 2018-06-01 | 2020-11-24 | 泉芯电子技术(深圳)有限公司 | Low-frequency signal processing method with quick electric heating engine circuit and circuit thereof |
| CN109245761B (en) * | 2018-09-21 | 2021-07-02 | 电子科技大学 | Method for suspending and recovering phase-locked loop |
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| CN110932721A (en) * | 2019-12-04 | 2020-03-27 | 河北新华北集成电路有限公司 | Phase-locked loop locking indicating circuit and phase-locked loop |
| CN210899136U (en) * | 2019-12-20 | 2020-06-30 | 合肥市芯海电子科技有限公司 | Phase-locked loop circuit, chip, circuit board and electronic equipment |
| CN111510130B (en) * | 2020-05-15 | 2023-03-03 | 电子科技大学 | Phase-locked loop circuit capable of being used for synchronizing switching frequency of COT mode switching power supply |
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| CN113922818B (en) * | 2021-09-23 | 2024-04-12 | 南京美辰微电子有限公司 | Phase-locked loop circuit with self-biasing structure |
| CN114157139B (en) * | 2021-11-29 | 2024-05-24 | 拓尔微电子股份有限公司 | Fixed-frequency hysteresis current control circuit based on phase-locked loop |
| CN114257084B (en) * | 2021-12-24 | 2023-07-18 | 恒烁半导体(合肥)股份有限公司 | Charge pump circuit with quick start function and application thereof |
| CN115021748B (en) * | 2022-06-01 | 2023-10-03 | 北京时代民芯科技有限公司 | Quick-start eight-phase-locked loop |
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| CN104993817A (en) | 2015-10-21 |
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