CN206505295U - A kind of four-way coherent signal generating means - Google Patents

A kind of four-way coherent signal generating means Download PDF

Info

Publication number
CN206505295U
CN206505295U CN201720206549.5U CN201720206549U CN206505295U CN 206505295 U CN206505295 U CN 206505295U CN 201720206549 U CN201720206549 U CN 201720206549U CN 206505295 U CN206505295 U CN 206505295U
Authority
CN
China
Prior art keywords
signal
clock
module
unit
generating means
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201720206549.5U
Other languages
Chinese (zh)
Inventor
高祥
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Chengdu Jiu Jin Technology Co Ltd
Original Assignee
Chengdu Jiu Jin Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chengdu Jiu Jin Technology Co Ltd filed Critical Chengdu Jiu Jin Technology Co Ltd
Priority to CN201720206549.5U priority Critical patent/CN206505295U/en
Application granted granted Critical
Publication of CN206505295U publication Critical patent/CN206505295U/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

The utility model is specifically related to a kind of four-way coherent signal generating means, purpose is to provide a kind of four-way coherent signal generating means of excellent performance, and the four-way coherent signal generating means can be used for test and the fault diagnosis of the equipments such as communication equipment, radar receiver, navigation equipment and data chain device.Synchronization module including the signal generator module for producing signal, for carrying out system synchronization, control module and mainframe box for control system operation;The signal generator module, synchronization module and control module are integrated in mainframe box;The signal generator module signal is connected to synchronization module;The synchronization module signal is connected to control module.

Description

A kind of four-way coherent signal generating means
Technical field
The utility model is related to the communications field, and in particular to a kind of four-way coherent signal generating means.
Background technology
In the test process of the communication equipment and radar equipment of multichannel etc., it is required for using suitable radio-frequency signal source Produce signaling mode identical, phase coherent, the multi-channel radio frequency signal of time delay and amplitude in the range of certain coincident indicator.
One multichannel coherent radiofrequency signal generation system needs to meet same clock, reference and altogether three conditions of triggering altogether. To build four-way coherent signal generation system, conventional method is using four single channel signal generators, using common source External clock and trigger signal realize that signal coherent is exported.
Build such set of system and there are multiple drawbacks.First, between multiple passages phase, amplitude calibration are complicated, need Want signal generator to produce calibration signal, then the time delay and range error between multichannel are measured by external meters, it is calibrated Precision be limited to the precision of measuring instrumentss.Secondly, such set of system is difficult to control to system bulk, and its price is also very high It is expensive.
The content of the invention
The purpose of this utility model is to provide a kind of four-way coherent signal generating means, and it has:Excellent performance, purposes Extensive and low cost and other advantages.
For achieving the above object, the technical scheme that the utility model is used is:Signal for producing signal is produced Raw module, the synchronization module for carrying out system synchronization, the control module run for control system and mainframe box;The signal Generation module, synchronization module and control module are integrated in mainframe box;The signal generator module signal is connected to synchronization module; The synchronization module signal is connected to control module.
It is preferred that, the signal generator module includes four identical signals and produces submodule, is respectively:First signal is produced Raw submodule, secondary signal produce submodule, the 3rd signal and produce submodule and the 4th signal generation submodule.
It is preferred that, four identical signals, which produce submodule, to be included:Input interface, trigger signal input interface, Trigger signal output interface, output interface, clock input interface, clock output interface, local oscillator, pretreatment unit, when Clock unit, memory cell, signal generation unit and D/A conversion unit;The input interface signal is connected to pretreatment unit; The pretreatment unit signal is connected to signal generation unit, the signal generation unit, and signal is connected to digital-to-analogue conversion list respectively Member, clock unit, memory cell and pretreatment unit;The D/A conversion unit signal is connected to output interface;The clock Signal is connected to clock input interface and clock output interface to unit respectively.
It is preferred that, the input interface is the data signal input interface of PCIe bus standards, and the output interface is SMA The analog signal output interface of standard.
It is preferred that, the synchronization module includes:Synchronization unit, clock signal input terminal mouthful, clock signal output terminal mouthful, touch Signalling input port and trigger signal output port;Clock signal output terminal mouthful and clock input interface the signal connection; The trigger signal output port signal is connected to trigger signal input port.
It is preferred that, the mainframe box includes:1 PCIe interface, 4 USB interfaces and 1 LAN mouthfuls.
Compared with prior art, the beneficial effects of the utility model are:
A kind of four-way coherent signal generating means of excellent performance is provided, the four-way coherent signal generating means can use Test and fault diagnosis in equipments such as communication equipment, radar receiver, navigation equipment and data chain devices.Meanwhile, the four-way Road coherent signal generator can be used as baseband signal generating means, can also be used as radio-frequency signal generator, function is more Sample, and reduce cost.
Brief description of the drawings
Fig. 1 is a kind of structural representation of four-way coherent signal generating means of the present utility model;
Fig. 2 is a kind of structural representation of the signal generator module of four-way coherent signal generating means of the present utility model Figure.
Embodiment
In order that those skilled in the art more fully understands the technical solution of the utility model, below in conjunction with the accompanying drawings and tool The utility model is described in further detail for body example.
For achieving the above object, the technical scheme that the utility model is used is:Signal for producing signal is produced Raw module, the synchronization module for carrying out system synchronization, the control module run for control system and mainframe box;The signal Generation module, synchronization module and control module are integrated in mainframe box;The signal generator module signal is connected to synchronization module; The synchronization module signal is connected to control module.
It is preferred that, the signal generator module includes four identical signals and produces submodule, is respectively:First signal is produced Raw submodule, secondary signal produce submodule, the 3rd signal and produce submodule and the 4th signal generation submodule.
It is preferred that, four identical signals, which produce submodule, to be included:Input interface, output interface, trigger signal Input interface, trigger signal output interface, clock input interface, clock output interface, local oscillator, pretreatment unit, when Clock unit, memory cell, signal generation unit and D/A conversion unit;The input interface signal is connected to pretreatment unit; The pretreatment unit signal is connected to signal generation unit, the signal generation unit, and signal is connected to digital-to-analogue conversion list respectively Member, clock unit, memory cell and pretreatment unit;The D/A conversion unit signal is connected to output interface;The clock Signal is connected to clock input interface and clock output interface to unit respectively.
First, control computer or external software produce signal waveform file, and it is single to be input to pretreatment by input interface Member, then, data signal are fed to signal generation unit, signal generation unit can by internal logic by signal storage arrive with Connected memory cell it is standby or output a signal to the D/A conversion unit of next stage, convert digital signals into simulation letter Number, the analog signal after conversion is directly exported by signal output interface.
The work clock of signal generation unit and D/A conversion unit is provided by clock unit, when signal generator module work It may be selected to use internal clocking or external clock in single, when polylith signal generator module cooperating, export many During passage coherent signal, each module uses external clock.After data signal is ready, under trigger signal excitation, System exports radiofrequency signal.
It is preferred that, the input interface is the data signal input interface of PCIe bus standards, and the output interface is SMA The analog signal output interface of standard.It is preferred that, the synchronization module includes:Synchronization unit, clock signal input terminal mouth, clock Signal output port, trigger signal input port and trigger signal output port;The clock signal output terminal mouthful and clock are defeated Inbound port signal is connected;The trigger signal output port signal is connected to trigger signal input port.
Synchronization module includes input end of clock mouthful and four output terminal of clock mouthful, is designated as respectively:1,2,3 and 4;And triggering Input port and four trigger output ends mouthful are designated as respectively:5,6,7 and 8.Synchronization module operationally, will inside synchronization module Homologous clock signal is divided into four tunnel in-phase signals, is exported respectively by output terminal of clock mouthful 1,2,3 and 4, then successively with first Signal generator module, secondary signal generation module, the input end of clock of the 3rd signal generator module and the 4th signal generator module Mouth connection.Homologous trigger signal is divided into four tunnel in-phase signals, is exported respectively by trigger output end mouthful 5,6,7 and 8, then successively With the triggering of the first signal generator module, secondary signal generation module, the 3rd signal generator module and the 4th signal generator module Input port is connected.
It is preferred that, the mainframe box includes:1 PCIe interface, 4 USB interfaces and 1 LAN mouthfuls.
Mainframe box also includes supply unit, and power supply is provided for device;Also include heat abstractor, be device radiation.Control mould Block uses the embedded industrial computer of standard.
It the above is only preferred embodiment of the present utility model, it is noted that above-mentioned preferred embodiment should not be regarded For to limitation of the present utility model, protection domain of the present utility model should be defined by claim limited range.For For those skilled in the art, do not departing from spirit and scope of the present utility model, can also make some Improvements and modifications, these improvements and modifications also should be regarded as protection domain of the present utility model.

Claims (6)

1. a kind of four-way coherent signal generating means, it is characterised in that described device includes:Signal for producing signal is produced Raw module, the synchronization module for carrying out system synchronization, the control module run for control system and mainframe box;The signal Generation module, synchronization module and control module are integrated in mainframe box;The signal generator module signal is connected to synchronization module; The synchronization module signal is connected to control module.
2. four-way coherent signal generating means as claimed in claim 1, it is characterised in that the signal generator module includes Four identical signals produce submodule, are respectively:First signal produces submodule, secondary signal and produces submodule, the 3rd letter Number producing submodule and the 4th signal produces submodule.
3. four-way coherent signal generating means as claimed in claim 2, it is characterised in that four identical signals production Raw submodule includes:Input interface, output interface, trigger signal input interface, trigger signal output interface, clock input connect Mouth, clock output interface, local oscillator, pretreatment unit, clock unit, memory cell, signal generation unit and digital-to-analogue turn Change unit;The input interface signal is connected to pretreatment unit;The pretreatment unit signal be connected to signal generation unit, Signal is connected to D/A conversion unit, clock unit, memory cell and pretreatment unit to the signal generation unit respectively;It is described D/A conversion unit signal is connected to output interface;Signal is connected to clock input interface to the clock unit respectively and clock is defeated Outgoing interface.
4. four-way coherent signal generating means as claimed in claim 3, it is characterised in that the input interface is that PCIe is total The data signal input interface of line standard, the output interface is the analog signal output interface of SMA standards.
5. four-way coherent signal generating means as claimed in claim 2, it is characterised in that the synchronization module includes:Together Walk unit, clock signal input terminal mouth, clock signal output terminal mouthful, trigger signal input port and trigger signal output port; The clock signal output terminal mouthful and the connection of input end of clock message number;The trigger signal output port signal is connected to triggering Signal input port.
6. four-way coherent signal generating means as claimed in claim 5, it is characterised in that the mainframe box includes:1 PCIe interface, 4 USB interfaces and 1 LAN mouthfuls.
CN201720206549.5U 2017-03-03 2017-03-03 A kind of four-way coherent signal generating means Active CN206505295U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201720206549.5U CN206505295U (en) 2017-03-03 2017-03-03 A kind of four-way coherent signal generating means

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201720206549.5U CN206505295U (en) 2017-03-03 2017-03-03 A kind of four-way coherent signal generating means

Publications (1)

Publication Number Publication Date
CN206505295U true CN206505295U (en) 2017-09-19

Family

ID=59842019

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201720206549.5U Active CN206505295U (en) 2017-03-03 2017-03-03 A kind of four-way coherent signal generating means

Country Status (1)

Country Link
CN (1) CN206505295U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109462460A (en) * 2018-11-23 2019-03-12 中国电子科技集团公司第三十八研究所 A kind of multiple channel test method and device of the system of included AD9361 chip
CN114844577A (en) * 2022-05-05 2022-08-02 西安亨孚防务科技有限责任公司 Broadband multi-style signal simulator

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109462460A (en) * 2018-11-23 2019-03-12 中国电子科技集团公司第三十八研究所 A kind of multiple channel test method and device of the system of included AD9361 chip
CN114844577A (en) * 2022-05-05 2022-08-02 西安亨孚防务科技有限责任公司 Broadband multi-style signal simulator
CN114844577B (en) * 2022-05-05 2023-12-22 西安亨孚防务科技有限责任公司 Broadband multi-style signal simulator

Similar Documents

Publication Publication Date Title
CN101701971B (en) High-precision multichannel analog signal source
CN107819456B (en) High-precision delay generator based on FPGA carry chain
CN103197145B (en) Method and system of ultrahigh resolution phase difference measurement
CN206505295U (en) A kind of four-way coherent signal generating means
CN102904550A (en) Multi-channel synchronous waveform generator based on AD9959
CN103675776B (en) Frequency spectrum parameter proving installation and method in digital array module transmission channel arteries and veins
CN103543440B (en) Based on the digital beam froming apparatus and method of FPGA programmable delay circuit
CN103595580A (en) Method and device for testing digital array module receiving delay
CN110658884B (en) FPGA-based multi-channel signal generator waveform synchronization method and system
CN104614659A (en) Automatic test system and automatic test method
CN104569899A (en) High-accuracy high-voltage direct-current transformer calibrator
CN102014310A (en) Airborne selective calling signal generator and implementation method thereof
CN106569033A (en) High-precision fast frequency meter
CN103746736B (en) 14 channel fiber data transmission TR equipment complex test systems
CN103197273A (en) Source tracing device used for electronic mutual inductor output calibration instrument
CN206421377U (en) A kind of multifunctional integrated test card
CN205038478U (en) IP kernel takes place to use for wave form based on UART interface
CN203708224U (en) Multipurpose serial time code decoder
CN203178460U (en) Traceability device used for electronic mutual inductor output calibration instrument
CN103067105A (en) Doppler frequency shift device and Doppler frequency shift testing device and method for communication module
CN205792609U (en) A kind of radio equipment Auto-Test System
CN209198615U (en) A kind of timing and waveform generating
CN103499807A (en) Checking device and method for eliminating truncation errors of digital electric energy meter
CN103457684B (en) Signal generation device for testing Baud rate tolerance of serial communication equipment
CN203630535U (en) USB-based high precision time-to-digital converter

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant