CN206432282U - A kind of PERC batteries plated film mask structure - Google Patents
A kind of PERC batteries plated film mask structure Download PDFInfo
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- CN206432282U CN206432282U CN201720090661.7U CN201720090661U CN206432282U CN 206432282 U CN206432282 U CN 206432282U CN 201720090661 U CN201720090661 U CN 201720090661U CN 206432282 U CN206432282 U CN 206432282U
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- void region
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- plated film
- mask plate
- region
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
The utility model is related to a kind of PERC batteries plated film mask structure, it is characterised in that：Including a graphite frame and a mask plate, wherein：Multiple grids are provided with the graphite frame, one silicon chip of each grid correspondence is set；Be provided with the mask plate with the one-to-one cell of grid on graphite frame, is made up of void region and non-void region in each cell, non-void region corresponds to electrode slurry to be covered and set；In a state of use, silicon chip is placed between graphite frame and mask plate, passes through location structure relative positioning between graphite frame and mask plate.
Description
Technical field
The utility model is related to the preparation of solar battery sheet, more particularly to a kind of PERC batteries plated film mask structure.
Background technology
Conventional fossil fuel is increasingly depleted, and in all sustainable energies, solar energy is undoubtedly a kind of most clear
Clean, most universal and most potential alternative energy source.At present, in all solar cells, crystal-silicon solar cell is to obtain big
One of solar cell that commerce is promoted, this is due to that silicon materials have extremely abundant reserves in the earth's crust, while brilliant
Body silicon solar cell has excellent electric property and mechanical performance, therefore, crystalline silicon compared to other kinds of solar cell
Solar cell is in photovoltaic art in occupation of consequence.
In existing conventional techniques, the preparation technology of crystal silicon solar energy battery mainly includes：Clean, go damage layer, making herbs into wool,
Diffusion, etching, depositing antireflection film, printing, sintering, cell slice test.Currently in order to the competitiveness of lifting photovoltaic industry,
Various efficient battery blade technolgies are developed and realize volume production successively.And PERC techniques have been obtained in the technology of high-efficiency battery piece
It is widely popularized, PERC technologies need three different film layers of deposition to complete the passivation of front and back, i.e. backside oxide
Aluminium, back side silicon nitride silicon, front side silicon nitride silicon, and because the electrode slurry at the back side can not be directed through aluminum oxide and silicon nitride, therefore
Also need to utilize lbg.Therefore the more conventional technique of PERC techniques compare, to increase two procedures, cause cost relatively also compared with
It is high.
The content of the invention
The purpose of this utility model is to provide a kind of PERC batteries plated film mask structure.
To reach above-mentioned purpose, the technical solution adopted in the utility model is：A kind of PERC batteries plated film mask structure,
It is characterized in that：Including a graphite frame and a mask plate, wherein：
Multiple grids are provided with the graphite frame, one silicon chip of each grid correspondence is set；
Be provided with the mask plate with the one-to-one cell of grid on graphite frame, by hollow out in each cell
Region and non-void region composition, non-void region corresponds to electrode slurry to be covered and set；
In a state of use, silicon chip is placed between graphite frame and mask plate, is tied between graphite frame and mask plate by positioning
Structure relative positioning.
In such scheme, on the mask plate, the void region area accounts for the 1 ~ 5% of the mask plate gross area, non-vacancy section
Domain area accounts for the 30 ~ 50% of the mask plate gross area, wherein, void region is to need the region of deposition of aluminium oxide and silicon nitride film,
Non- void region is the region without deposition of aluminium oxide and silicon nitride film.
In such scheme, in a state of use, positioned between the graphite frame and mask plate by screw or fixture.
In such scheme, in each cell, two diagonal of cell are non-void region, and two diagonal will be single
First lattice inner region is divided into four delta-shaped regions, each delta-shaped region, the void region and non-void region interval and
Parallel to the corresponding side arrangement of cell.
Preferably, it is each non-to engrave along the direction that corresponding unit lattice sides is pointed to along cell center in each delta-shaped region
The length of dummy section is incremented by successively, and the length of each void region is also incremented by successively.
Preferably, in each delta-shaped region, on the direction that side edge is pointed to along cell center, adjacent two vacancy sections
In domain, the long edge lengths close to the void region at cell center are the long edge lengths of the void region away from cell center
2/3~3/4。
Preferably, in the cell, the long edge lengths near the void region of cell side are 145 ~ 150 millis
Rice.
In such scheme, four summits of the cell are defined as the first summit, the second top successively along clockwise direction
Point, the 3rd summit and the 4th summit, hollow out parallel to each other is arranged at intervals with along the line direction on the first summit and the second summit
Region and non-void region, and the length of void region successively decreased from center to two ends.
Preferably, along the direction of successively decreasing of void region length, in adjacent two void regions, the length of long void region is
3/2 ~ 4/3 times of short void region length.
Preferably, the length of most short void region is 10 ~ 15 millimeters.
Preferably, in the cell, the width of each non-void region is 5 ~ 10 millimeters.
In such scheme, the figure on the mask plate（That is the layout and structure of void region and non-void region）Can be with
It is adjusted according to actually required.
In such scheme, the mask plate is made up of graphite.
In such scheme, non-void region contacts with each other with silicon chip.
Because above-mentioned technical proposal is used, the utility model has following advantages compared with prior art：
1. the utility model is to utilize graphite frame mask plate, the region by lbg will be needed in the prior art, profit
Covered with the non-void region of graphite frame mask plate, make the region no longer deposition of aluminium oxide and silicon nitride film for needing lbg,
Without being slotted again with laser, so as to reduce the process of PERC batteries, cost is reduced；
It is right during lbg due to without lbg, also avoiding 2. the utility model has used mask plate
The damage that silicon chip is brought, improves efficiency；
3. graphite frame mask plate used in the utility model, can be according to formulation graphite frame mask the need for different graphic
Plate, using flexibly extensive；
4. mask plate of the present utility model uses graphite material, deformation is not susceptible to, pollution-free, resistance to pickling；
5. the utility model is simple in construction, suitable for promoting.
Brief description of the drawings
Fig. 1 is the utility model embodiment graphite frame structural representation.
Fig. 2 is the mask structure being schematic diagram of the utility model embodiment one.
Fig. 3 is the structural representation of one cell of mask plate of the utility model embodiment one.
Fig. 4 is the structural representation of one cell of mask plate of the utility model embodiment two.
Wherein：1st, graphite frame；11st, grid；2nd, mask plate；21st, cell；211st, non-void region；212nd, void region.
Embodiment
Below in conjunction with the accompanying drawings and embodiment is further described to the utility model：
Embodiment one：
Referring to shown in Fig. 1, Fig. 2 and Fig. 3, a kind of PERC batteries plated film mask structure, including a graphite frame 1 and a mask
Plate 2, wherein：
Multiple grids 11 are provided with the graphite frame 1, one silicon chip of each correspondence of grid 11 is set；
It is provided with the mask plate 2 and the one-to-one cell 21 of grid 11 on graphite frame 1, each cell 21
Interior is engraved structure, is made up of void region 212 and non-void region 211, and non-void region 211 corresponds to electrode to be covered
Slurry is set；
In a state of use, silicon chip is placed between graphite frame 1 and mask plate 2, by fixed between graphite frame 1 and mask plate 2
Bit architecture relative positioning.
On the mask plate 2, the area of void region 212 accounts for the 1 ~ 5% of the gross area of mask plate 2, non-void region 211
Area accounts for the 30 ~ 50% of the gross area of mask plate 2.
In a state of use, positioned between the graphite frame 1 and mask plate 2 by screw or fixture.
In each cell 21, two diagonal of cell 21 are non-void region 211, and two diagonal are by cell
21 inner regions are divided into four delta-shaped regions, each delta-shaped region, between the void region 212 and non-void region 211
Every and parallel to the corresponding side of cell 21 arrangement.
In each delta-shaped region, on the direction that the side of corresponding unit lattice 21 is pointed to along the center of cell 21, each non-hollow out
The length in region 211 is incremented by successively, and the length of each void region 212 is also incremented by successively.
In each delta-shaped region, on the direction that side edge is pointed to along the center of cell 21, adjacent two void regions 211
In, the long edge lengths close to the void region 211 at the center of cell 21 are the length of the void region 211 away from the center of cell 21
In the 2/3 ~ 3/4 of edge lengths, i.e. Fig. 3, c=（2/3~3/4）B, b=（2/3~3/4）A, by that analogy.
In the cell 21, the long edge lengths a near the non-void region 211 of the side of cell 21 is 145 ~ 150
Millimeter.
In the cell 21, the width d of each non-void region 211 is 5 ~ 10 millimeters.
Embodiment two：
Shown in Figure 4, the difference of the present embodiment and embodiment one is void region 212 and non-hollow out in cell 21
The layout structure in region 211 is different, and shown in Figure 4, four summits of the cell 21 are defined successively along clockwise direction
For the first summit, the second summit, the 3rd summit and the 4th summit, it is arranged at intervals along the line direction on the first summit and the second summit
There is void region 212 and non-void region 211 parallel to each other, and the length of void region 212 is successively decreased from center to two ends.
Along the direction of successively decreasing of the length of void region 212, in adjacent two void regions 212, the length of long void region is
F in 3/2 ~ 4/3 times of short void region length, i.e. Fig. 4=（3/2~4/3）E, g=（3/2~4/3）F, by that analogy.
In the cell 21, the width h of each non-void region 211 is 5 ~ 10 millimeters.
The size of the grid 2 is more than die size.
Claims (10)
1. a kind of PERC batteries plated film mask structure, it is characterised in that：Including a graphite frame and a mask plate, wherein：
Multiple grids are provided with the graphite frame, one silicon chip of each grid correspondence is set；
Be provided with the mask plate with the one-to-one cell of grid on graphite frame, by void region in each cell
With non-void region composition, non-void region corresponds to electrode slurry to be covered and set；
In a state of use, silicon chip is placed between graphite frame and mask plate, passes through location structure phase between graphite frame and mask plate
To positioning.
2. PERC batteries plated film mask structure according to claim 1, it is characterised in that：It is described on the mask plate
Void region area accounts for the 1 ~ 5% of the mask plate gross area, and non-void region area accounts for the 30 ~ 50% of the mask plate gross area.
3. PERC batteries plated film mask structure according to claim 1, it is characterised in that：In a state of use, it is described
Positioned between graphite frame and mask plate by screw or fixture.
4. PERC batteries plated film mask structure according to claim 1, it is characterised in that：In each cell, unit
Two diagonal of lattice are non-void region, and cell inner region is divided into four delta-shaped regions, Mei Gesan by two diagonal
In angular domain, the void region and non-void region interval and arranged parallel to the corresponding side of cell.
5. PERC batteries plated film mask structure according to claim 4, it is characterised in that：In each delta-shaped region,
On the direction that corresponding unit lattice side is pointed to along cell center, the length of each non-void region is incremented by successively, each void region
Length it is also incremented by successively.
6. PERC batteries plated film mask structure according to claim 5, it is characterised in that：In each delta-shaped region,
On the direction that side edge is pointed to along cell center, in adjacent two void regions, the void region at close cell center
Long edge lengths are the 2/3 ~ 3/4 of the long edge lengths of the void region away from cell center.
7. the PERC battery plated film mask structures according to claim 5 or 6, it is characterised in that：In the cell, most
Long edge lengths close to the void region of cell side are 145 ~ 150 millimeters.
8. PERC batteries plated film mask structure according to claim 1, it is characterised in that：Four tops of the cell
Point is defined as the first summit, the second summit, the 3rd summit and the 4th summit successively along clockwise direction, along the first summit and second
The line direction on summit is arranged at intervals with void region and non-void region parallel to each other, and void region length by center
Successively decrease to two ends.
9. PERC batteries plated film mask structure according to claim 8, it is characterised in that：Along passing for void region length
Subtract in direction, adjacent two void regions, the length of long void region is 3/2 ~ 4/3 times of short void region length.
10. the PERC battery plated film mask structures according to claim 4 or 8, it is characterised in that：In the cell,
The width of each non-void region is 5 ~ 10 millimeters.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720090661.7U CN206432282U (en) | 2017-01-22 | 2017-01-22 | A kind of PERC batteries plated film mask structure |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720090661.7U CN206432282U (en) | 2017-01-22 | 2017-01-22 | A kind of PERC batteries plated film mask structure |
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| Publication Number | Publication Date |
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| CN206432282U true CN206432282U (en) | 2017-08-22 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109378391A (en) * | 2018-11-28 | 2019-02-22 | 中国华能集团有限公司 | A kind of solar battery mask plate for spin coating proceeding |
-
2017
- 2017-01-22 CN CN201720090661.7U patent/CN206432282U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109378391A (en) * | 2018-11-28 | 2019-02-22 | 中国华能集团有限公司 | A kind of solar battery mask plate for spin coating proceeding |
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| CP03 | Change of name, title or address |
Address after: No. 199, deer mountain road, Suzhou high tech Zone, Jiangsu Province Patentee after: CSI Cells Co.,Ltd. Patentee after: Funing atlas sunshine Power Technology Co., Ltd Address before: No. 199, deer mountain road, Suzhou high tech Zone, Jiangsu Province Patentee before: CSI Cells Co.,Ltd. Patentee before: CSI-GCL SOLAR MANUFACTURING (YANCHENG) Co.,Ltd. |