CN206400291U - Multi-channel data sampling apparatus and system - Google Patents
Multi-channel data sampling apparatus and system Download PDFInfo
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- CN206400291U CN206400291U CN201621065936.3U CN201621065936U CN206400291U CN 206400291 U CN206400291 U CN 206400291U CN 201621065936 U CN201621065936 U CN 201621065936U CN 206400291 U CN206400291 U CN 206400291U
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Abstract
The utility model is related to a kind of multi-channel data sampling apparatus and system, and device includes：Switching switch, analog-digital converter, address selector, memory, plus frame head circuit, clock generator, counter and triggers circuit；The switching switch connects each sampling channel, the analog-digital converter and the triggers circuit, the analog-digital converter connection clock generator and address selector, the clock generator connects triggers circuit, the address selector connection triggers circuit and memory, the memory linkage counter and plus frame head circuit, the triggers circuit connects rear class data processing circuit.
Description
Technical field
The utility model is related to digital signal processing technique field, more particularly to a kind of multi-channel data sampling apparatus and
System.
Background technology
With the development of electronic information technology, array acquisition and the processing of extensive signal transacting, especially multichannel
Correlation technique is also flourished, and the quantity of passage is on the increase, and is gathered and is also constantly increased with the data volume handled.Large scale array
Signal acquiring and processing just turns into an emerging research field.
Nowadays the performance of the device such as CPU, internal memory, GPU is constantly lifted, and follow-up data disposal ability is significantly increased, and is promoted
Practical application is also skyrocketed through, thus urgently needed limited to the ampling channel number of front end link, the requirement of sample frequency
The more durations of memory memory storage useful signal, save system resource, control system cost, improve whole system work
Efficiency, application.
Presently used array acquisition system is often divided into following two kinds of mechanism：One is to use " ADC (Analog a to
Digital Converter, analog-digital converter) correspondence passage all the way " mode, it is clear that be not suitable for the feelings of large scale array collection
Condition；Two be to use " an ADC correspondence multiplexer channel, switched by the switching of synchronised clock control passage and memory ".Multichannel battle array
Row acquisition system is needed for ADC sample frequency, the time of various switchings, the specified sequential collaboration for waiting operation of different memory
Strict control is wanted, the consumption of system resource is caused, resource utilization is low.
Utility model content
Based on this, it is necessary to for resource utilization it is low the problem of there is provided a kind of multi-channel data sampling apparatus and system.
A kind of multi-channel data sampling apparatus, including：
Switching switch, analog-digital converter, address selector, memory, plus frame head circuit, clock generator, counter and
Triggers circuit；
The switching switch connects each sampling channel, the analog-digital converter and the triggers circuit, the modulus
Converter connects clock generator and address selector, and the clock generator connects triggers circuit, and the address selector connects
Contact Power Generation Road and memory, the memory linkage counter and plus frame head circuit, DBMS after the triggers circuit connection
Process circuit.
A kind of multi-channel data sampling system, including：
Prime analog processing device；
Multi-channel sampling device；And
Rear class data processing circuit；
The prime analog processing device is connected with the multi-channel sampling device, the multi-channel sampling device and institute
Rear class data processing circuit is stated to be connected.
Compared with prior art, multi-channel data sampling apparatus of the present utility model and system pass through rear class data processing electricity
Road direction triggers circuit sends fragment and finishes receiving mark, and triggers circuit receives the fragment and finished receiving after mark, control clock hair
The sample rate that raw device changes analog-digital converter is sampled, and sampled data deposits into corresponding memory and by adding by switching switch
Frame head circuit supplements frame originating point information, and counter counts are sent when full after meter full scale will, triggers circuit, switching switch, address selector
Carry out asynchronous handshake and switch to next sampling channel and corresponding memory, triggers circuit is adjusted by new tunnel last time polling result
Sample rate, output fragment be filled with mark arrive rear class data processing circuit, and receive rear class data processing circuit return fragment connect
Complement mark is received, and starts poll next time, sampling channel can be expanded in the case where not increasing ADC, do not increasing existing
Sampling duration is expanded in the case of memory space, with efficiency high, stability is strong, the characteristics of memory space utilization rate is high.
Brief description of the drawings
Fig. 1 is the structural representation of the multi-channel data sampling apparatus of one embodiment；
Fig. 2 is the structural representation of the triggers circuit of one embodiment；
Fig. 3 is the structural representation of the multi-channel data sampling system of one embodiment.
Embodiment
The technical solution of the utility model is illustrated below in conjunction with the accompanying drawings.
As shown in figure 1, the utility model provides a kind of multi-channel data sampling apparatus, it may include：
Switching switch 11, analog-digital converter 12, address selector 13, memory 14, plus frame head circuit 15, clock generator
16, counter 17 and triggers circuit 18；
Rear class data processing circuit sends fragment to triggers circuit 18 and finishes receiving mark, and triggers circuit 18 receives the fragment
Finish receiving after mark, the sample rate that control clock generator 16 changes analog-digital converter 12 is sampled, and sampled data passes through
Switching switch 11 deposits into corresponding memory 14 and by adding frame head circuit 15 to supplement frame originating point information, and the meter of counter 17 sends meter when full
Full scale will, triggers circuit 18, switching switch 11, address selector 13 carry out asynchronous handshake switch to next sampling channel with it is corresponding
Memory 14, triggers circuit 18 adjusts sample rate by next sampling channel last time polling result, and output fragment is filled with mark and arrived
Rear class data processing circuit, and receive the fragment of rear class data processing circuit return and finish receiving mark, and start next next round
Ask.
As shown in Fig. 2 the triggers circuit 18 may include the first trigger 181, the second trigger 182, the 3rd trigger
183rd, arithmetic unit 184 and state selecting switch 185；The connection of the first trigger 181 switching switch 11 and counter 17, it is described
Second trigger 182 connection switching switch 11, address selector 13 and arithmetic unit 184, the arithmetic unit 184 connect memory space
14 and state selecting switch 185, the state selecting switch 185 connects the 3rd trigger 183, clock generator 16 and rear series
According to process circuit, the 3rd trigger 183 connects rear class data processing circuit.
As shown in figure 3, it in the structural representation of the multi-channel data sampling system, figure 102 to be by the utility model
A kind of multi-channel data sampling apparatus stated.101 be prime analog processing device in figure, and 103 be rear class data processing electricity in figure
Road.In one embodiment, the rear class data processing circuit can be data waveform recovery device.
In one embodiment, multi-channel data sampling system of the present utility model may also include display device 104, with institute
State rear class data processing circuit 103 to be connected, described multi-channel data sampling apparatus 102 and rear class data processing circuit 103
Asynchronous handshake is carried out, is shown eventually through display device 104 by TF, RF.
Compared with prior art, the utility model provides a kind of multi-channel sampling device and system of high reliability, can be with
Sampling channel is expanded in the case where not increasing ADC, sampling duration is expanded in the case where not increasing existing memory space, is had
Efficiency high, stability is strong, the characteristics of memory space utilization rate is high.
Device and system described in the utility model correspond sampling channel and memory, and passage switching is cut with memory
Change and data storage is carried out by the way of asynchronous handshake.Especially, burst type sampling meanses in adaptive set are employed, as far as possible
Useful data is stored more, also saves overhead.And as a result of the mode of asynchronous handshake, reliability is high.
Each technical characteristic of embodiment described above can be combined arbitrarily, to make description succinct, not to above-mentioned reality
Apply all possible combination of each technical characteristic in example to be all described, as long as however, the combination of these technical characteristics is not deposited
In contradiction, the scope of this specification record is all considered to be.
Embodiment described above only expresses several embodiments of the present utility model, and it describes more specific and detailed,
But therefore it can not be interpreted as the limitation to utility model patent scope.It should be pointed out that for the common skill of this area
For art personnel, without departing from the concept of the premise utility, various modifications and improvements can be made, these are belonged to
Protection domain of the present utility model.Therefore, the protection domain of the utility model patent should be determined by the appended claims.
Claims (4)
1. a kind of multi-channel data sampling apparatus, it is characterised in that including：
Switching switch, analog-digital converter, address selector, memory, plus frame head circuit, clock generator, counter and triggering
Circuit；
The switching switch connects each sampling channel, the analog-digital converter and the triggers circuit, the analog-to-digital conversion
Device connects clock generator and address selector, and the clock generator connects triggers circuit, and the address selector connection is touched
Power Generation Road and memory, the memory linkage counter and plus frame head circuit, the triggers circuit connects rear class data processing
Circuit；
Rear class data processing circuit sends fragment to triggers circuit and finishes receiving mark, and triggers circuit receives the fragment and finished receiving
After mark, the sample rate that control clock generator changes analog-digital converter is sampled, and sampled data is deposited into by switching switch
Corresponding memory and by adding frame head circuit to supplement frame originating point information, counter counts are sent when full after meter full scale will, triggers circuit, are cut
Change switch, address selector progress asynchronous handshake and switch to next sampling channel and corresponding memory, triggers circuit is by newly leading to
Road last time polling result adjustment sample rate, output fragment is filled with mark and arrives rear class data processing circuit, receives rear class data processing
The fragment that circuit is returned finishes receiving mark, and starts poll next time.
2. multi-channel data sampling apparatus according to claim 1, it is characterised in that the triggers circuit includes：
First trigger, the second trigger, the 3rd trigger, arithmetic unit and state selecting switch；
The first trigger connection switching switch and counter, the second trigger connection switching switch, address selector
And arithmetic unit, arithmetic unit connection memory and state selecting switch, the state selecting switch connect the 3rd trigger, when
Clock generator and rear class data processing circuit, the 3rd trigger connect rear class data processing circuit.
3. a kind of multi-channel data sampling system, it is characterised in that including：
Prime analog processing device；
Multi-channel sampling device as described in claim 1 to 2 any one；And
Rear class data processing circuit；
The prime analog processing device is connected with the multi-channel sampling device, the multi-channel sampling device with it is described after
DBMS process circuit is connected.
4. multi-channel data sampling system according to claim 3, it is characterised in that also include：
Display device, is connected with the rear class data processing circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621065936.3U CN206400291U (en) | 2016-09-20 | 2016-09-20 | Multi-channel data sampling apparatus and system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621065936.3U CN206400291U (en) | 2016-09-20 | 2016-09-20 | Multi-channel data sampling apparatus and system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN206400291U true CN206400291U (en) | 2017-08-11 |
Family
ID=59507236
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201621065936.3U Expired - Fee Related CN206400291U (en) | 2016-09-20 | 2016-09-20 | Multi-channel data sampling apparatus and system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN206400291U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116048426A (en) * | 2023-03-27 | 2023-05-02 | 南京芯驰半导体科技有限公司 | Signal processing method, device, electronic equipment and storage medium |
-
2016
- 2016-09-20 CN CN201621065936.3U patent/CN206400291U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116048426A (en) * | 2023-03-27 | 2023-05-02 | 南京芯驰半导体科技有限公司 | Signal processing method, device, electronic equipment and storage medium |
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| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20170811 Termination date: 20190920 |
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| CF01 | Termination of patent right due to non-payment of annual fee |