CN206194740U - Direct current direct current converting circuit's packaging structure - Google Patents

Direct current direct current converting circuit's packaging structure Download PDF

Info

Publication number
CN206194740U
CN206194740U CN201621305597.1U CN201621305597U CN206194740U CN 206194740 U CN206194740 U CN 206194740U CN 201621305597 U CN201621305597 U CN 201621305597U CN 206194740 U CN206194740 U CN 206194740U
Authority
CN
China
Prior art keywords
oxide
metal
semiconductor
dao
change
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201621305597.1U
Other languages
Chinese (zh)
Inventor
陈继辉
周景晖
王大选
刘冰
孔美萍
石心
石一心
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CRM ICBG Wuxi Co Ltd
Original Assignee
Wuxi China Resources Semico Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wuxi China Resources Semico Co Ltd filed Critical Wuxi China Resources Semico Co Ltd
Priority to CN201621305597.1U priority Critical patent/CN206194740U/en
Application granted granted Critical
Publication of CN206194740U publication Critical patent/CN206194740U/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

The utility model provides a direct current direct current converting circuit's packaging structure, does it include lead frame, direct current direct current converting circuit and cladding lead frame and direct current direct current converting circuit's packaging body. The lead frame, it includes first ji dao, second jidao and sets up the pin around first jidao and second jidao, the direct current does direct current converting circuit include the direct current direct current control circuit chip, two at least MOS pipes. Wherein, MOS pipe and the 2nd MOS pipe all lie in first ji dao's front, and the drain electrode of MOS pipe and the 2nd MOS pipe all is connected with first basic island electricity, the source electrode of MOS pipe and the 2nd MOS pipe is connected with the pin electricity that corresponds of lead frame respectively, the direct current direct current control circuit chip, its front that lies in second ji dao, direct current direct current control circuit chip is connected with the pin electricity that corresponds of a MOS pipe, the 2nd MOS pipe and lead frame. Compared with the prior art, therefore,

Description

The encapsulating structure of DC-to-dc change-over circuit
【Technical field】
The utility model is related to technical field of semiconductor encapsulation, more particularly to a kind of encapsulation of DC-to-dc change-over circuit Structure.
【Background technology】
The envelope of existing common DC-DC (direct current-direct current, DC-to-dc) change-over circuit Assembling structure mainly has two kinds of packing forms:Single-chip package or polylith integrated circuit.
For single-chip package, its high cost that there is chip, and power output is dumb, and light shield input is big etc. Shortcoming.
It is well known that generally including control circuit and power device two using the DC-DC change-over circuits of single-chip package Point, power device is metal-oxide-semiconductor (Metal-Oxide-Semiconductor), and using BCD technique flows, usual light shield quantity is about There are 20 layers.Integrated circuit wafer cost is generally related to light shield quantity direct proportion.And in the circuit, usual power device (output Pipe) area account for whole chip area more than 50% if by the power device in said chip with control circuit separate (i.e. multicore sheet mode), then power device can be using DMOS (Discrete Metal-Oxide-Silicon, discrete type gold Category-oxide-silicon) technique flow.And generally only 7 layers of the light shield quantity of DMOS techniques, and using DMOS technique flows Device is more preferable than the device performance using BCD technique flows.It is general to estimate, the chip of the DC-DC change-over circuits of single-chip package Cost is 2 times or so of multi-chip package.It follows that there is the high cost of chip in single-chip package.
Fixed due to cost area using the DC-DC change-over circuits of single-chip package, its maximum power output is also fixed. If in the market has the requirement of different power outputs, it is necessary to design different circuits, the investment of light shield is increased.If using The mode of multi-chip package, for different power output demands, control chip is the same, as long as from different metal-oxide-semiconductors Just can be with, and metal-oxide-semiconductor is normal component, and in the market has multiple specification to supply.Light shield investment can so be saved.Thus may be used Know, single-chip package also has that power output is dumb, light shield puts into big problem.
For polylith integrated antenna package, the shortcomings of there is packaging cost high, poor reliability and welding cost high in it.
Also have on the market and DC-DC control chips are made into standard component, metal-oxide-semiconductor is also made into standard component, be packaged into respectively The way (i.e. polylith integrated antenna package) of product circuit.This method generally has as a drawback that:Due to DC-DC control chips and Metal-oxide-semiconductor needs individually encapsulation, so that packaging cost is higher;The quantity of part increases.For a system, number of components The increase of amount necessarily corresponds to the increase of chance of failure;With the increase of number of parts, welding quantity accordingly increases, so as to increased The complexity and volume of system.
Therefore, it is necessary to provide a kind of new encapsulating structure to solve the above problems.
【Utility model content】
The purpose of this utility model is to provide a kind of encapsulating structure of DC-to-dc change-over circuit, and it can not only be carried The circuit design and peripheral solder of packaging efficiency high, simplified pcb board, but also the reliability of circuit can be improved, reduce system Cost.
In order to solve the above problems, the utility model provides a kind of encapsulating structure of DC-to-dc change-over circuit, and it includes The packaging body of lead frame, DC-to-dc change-over circuit and the cladding lead frame and DC-to-dc change-over circuit.Lead frame, Its pin for including the first Ji Dao, the second Ji Dao and being arranged at around the first Ji Dao and the second Ji Dao;The DC-to-dc turns Changing circuit includes DC-to-dc control circuit chip, and at least two metal-oxide-semiconductors, wherein, at least two metal-oxide-semiconductor includes First metal-oxide-semiconductor and the second metal-oxide-semiconductor, first metal-oxide-semiconductor and the second metal-oxide-semiconductor are respectively positioned on the front of first Ji Dao, and described The drain electrode of the first metal-oxide-semiconductor and the drain electrode of the second metal-oxide-semiconductor are electrically connected with first Ji Dao;The source electrode of first metal-oxide-semiconductor and Corresponding pin of the source electrode of second metal-oxide-semiconductor respectively with the lead frame is electrically connected;DC-to-dc control circuit chip, its Positioned at the front of second Ji Dao, the DC-to-dc control circuit chip and the first metal-oxide-semiconductor, the second metal-oxide-semiconductor and lead The corresponding pin electrical connection of frame.
Further, the lead frame also includes the 3rd Ji Dao, and the DC-to-dc change-over circuit also includes the 3rd MOS Pipe and the 4th metal-oxide-semiconductor, the 3rd metal-oxide-semiconductor and the 4th metal-oxide-semiconductor are respectively positioned on the front of the 3rd Ji Dao, the 3rd metal-oxide-semiconductor Drain electrode and the drain electrode of the 4th metal-oxide-semiconductor electrically connected with the 3rd Ji Dao, the source electrode and the described 4th of the 3rd metal-oxide-semiconductor The source electrode of metal-oxide-semiconductor is connected respectively at the corresponding pin of the lead frame, the relevant pad of the DC-to-dc control circuit chip Also electrically connected with the 3rd metal-oxide-semiconductor and the 4th metal-oxide-semiconductor.
Further, the source electrode of each metal-oxide-semiconductor is electrically connected with multiple corresponding pins of lead frame, and the plurality of corresponding pin It is linked to be an overall source terminal as correspondence metal-oxide-semiconductor.
Further, the multiple corresponding pin is linked to be an entirety by routing or aluminium strip.
Further, the metal-oxide-semiconductor is obtained by DMOS techniques, and each metal-oxide-semiconductor is a chip.
Further, the drain electrode of first metal-oxide-semiconductor and the drain electrode of the second metal-oxide-semiconductor is electrically connected by conducting resinl with the first Ji Dao Connect;The drain electrode of the 3rd metal-oxide-semiconductor and the drain electrode of the 4th metal-oxide-semiconductor are electrically connected by conducting resinl with the 3rd Ji Dao.
Further, first metal-oxide-semiconductor and the 3rd metal-oxide-semiconductor are PMOS transistor;Second metal-oxide-semiconductor and the 4th MOS It is nmos pass transistor to manage.
Further, the first Ji Dao and the 3rd Ji Dao are symmetrically distributed in the both sides of the second Ji Dao.
Further, the back side of the Ji Dao exposes to the packaging body.
Further, the height of the encapsulating structure of the DC-to-dc change-over circuit is 0.75mm~0.85mm.
Compared with prior art, the utility model is by the DC-DC control circuit chips and power device in DC-DC change-over circuits Part integration packaging is in an integrated package, so as to can not only improve packaging efficiency, the circuit design of simplified pcb board and outer weld all around Connect, but also the reliability of circuit can be improved, reduce system cost.
【Brief description of the drawings】
In order to illustrate more clearly of the technical scheme of the utility model embodiment, below will be to being wanted needed for embodiment description The accompanying drawing for using is briefly described, it should be apparent that, drawings in the following description are only some implementations of the present utility model Example, for those of ordinary skill in the art, without having to pay creative labor, can also be according to these accompanying drawings Obtain other accompanying drawings.Wherein:
Fig. 1 is the encapsulating structure internal junction in one embodiment of the DC-to-dc change-over circuit in the utility model Structure schematic diagram.
【Specific embodiment】
To enable above-mentioned purpose of the present utility model, feature and advantage more obvious understandable, below in conjunction with the accompanying drawings and tool Body implementation method is described in further detail to the utility model.
" one embodiment " or " embodiment " referred to herein refers to that may be included in the side of realization of the utility model at least one Special characteristic, structure or characteristic in formula." in one embodiment " that different places occur in this manual not refers both to Same embodiment, nor the single or selective embodiment mutually exclusive with other embodiment.Unless stated otherwise, The word that connection herein, the expression for being connected, connecting are electrically connected with is represented and is directly or indirectly electrical connected.
The utility model is that (Quad Flat No-leadPackage, quad flat is without drawing for a kind of QFN encapsulation on Duo Ji islands Pin encapsulate) DC-DC change-over circuits, using special designs lead frame be laid out.
Refer to shown in Fig. 1, it is the encapsulating structure of the DC-to-dc change-over circuit in the utility model in an implementation Internal structure schematic diagram in example.The encapsulating structure of the DC-to-dc change-over circuit shown in Fig. 1 includes lead frame 100, DC-DC The packaging body (not shown) of change-over circuit (mark) and the cladding lead frame 100 and DC-DC change-over circuits.
The lead frame 100 includes the first base island 110, the second base island 120, the 3rd base island 130 and is arranged in Ji Dao 110th, the PIN pins (for example, PIN1-48) around 120 and 130.In the embodiment shown in fig. 1, the first base island 110 and the 3rd Base island 130 is symmetrically distributed in the both sides on the second base island 120.
The DC-DC change-over circuits include DC-DC control circuit chips 210, the first metal-oxide-semiconductor MP1, the second metal-oxide-semiconductor MN1, 3rd metal-oxide-semiconductor MP2 and the 4th metal-oxide-semiconductor MN2.
Wherein, the first metal-oxide-semiconductor MP1 and the second metal-oxide-semiconductor MN1 is located at the front on the first base island 110;The first metal-oxide-semiconductor MP1 Drain electrode and the drain electrode of the second metal-oxide-semiconductor MN1 are electrically connected with the first base island 110.3rd metal-oxide-semiconductor MP2 and the 4th metal-oxide-semiconductor MN2 Positioned at the front on the 3rd base island 130;The 3rd metal-oxide-semiconductor MP2 drain electrode and the 4th metal-oxide-semiconductor MN2 drain electrode with the 3rd Ji Dao 130 electrical connections.The PIN pins electrical connection corresponding with lead frame 100 respectively of the source electrode of metal-oxide-semiconductor MP1, MN1, MP2 and MN2.
In the embodiment shown in fig. 1, the source electrode of the first metal-oxide-semiconductor MP1 is electric with the PIN pins PIN1-PIN5 of lead frame 100 Connection, the PIN pins PIN1-PIN5 is connected to become an entirety, as the source terminal of the first metal-oxide-semiconductor MP1;It is described The source electrode of the second metal-oxide-semiconductor MN1 is electrically connected with the PIN pins PIN7-PIN11 of lead frame 100, the PIN pins PIN7-PIN11 An entirety is connected to become, as the source exit of the second metal-oxide-semiconductor MP1;The source electrode and lead frame of the 3rd metal-oxide-semiconductor MP2 100 PIN pins PIN32-PIN36 electrical connections, the PIN pins PIN32-PIN36 is connected to become an entirety, as the The source exit of three metal-oxide-semiconductor MP2;The source electrode of the 4th metal-oxide-semiconductor MN2 is electric with the PIN pins PIN25-PIN29 of lead frame 100 Connection, the PIN pins PIN25-PIN29 is connected to become an entirety, as the source terminal of the 4th metal-oxide-semiconductor MN2.
In one embodiment, PIN pins PIN1-PIN5 can be linked together by routing or aluminium strip;PIN pins PIN7-PIN11 can be linked together by routing or aluminium strip;PIN pins PIN7-PIN11 can be connected by routing or aluminium strip It is connected together;PIN pins PIN32-PIN36 can be linked together by routing or aluminium strip.
The control circuit chip 210 is located at the front on the second base island 120, and the control circuit chip 210 has PAD pads are closed to be connected with the corresponding pin of corresponding metal-oxide-semiconductor MP1, MN1, MP2, MN2 and lead frame 100 by routing.
In one embodiment, the first metal-oxide-semiconductor MP1, the second metal-oxide-semiconductor MN1, the 3rd metal-oxide-semiconductor MP2 and the 4th metal-oxide-semiconductor MN2 is obtained by DMOS techniques.Each metal-oxide-semiconductor is an independent chip.The drain electrode of the first metal-oxide-semiconductor MP1 and the 2nd MOS The drain electrode of pipe MN1 is electrically connected by conducting resinl with the first base island 110;The drain electrode of the 3rd metal-oxide-semiconductor MP2 and the 4th metal-oxide-semiconductor MN2 Drain electrode electrically connected with the 3rd base island 130 by conducting resinl.
In the embodiment shown in fig. 1, the first metal-oxide-semiconductor MP1 and the 3rd metal-oxide-semiconductor MP2 are PMOS transistor, the 2nd MOS Pipe MN1 and the 4th metal-oxide-semiconductor MN2 are nmos pass transistor.Wherein, the first metal-oxide-semiconductor MP1, the second metal-oxide-semiconductor MN1 and control electricity Road chip 210 constitutes the DC-DC change-over circuits of the first power output;3rd metal-oxide-semiconductor MP2, the 4th metal-oxide-semiconductor MN2 and the control Circuit chip 210 constitutes the DC-DC change-over circuits of the second power output.So, can to form two-way independently defeated for the utility model The DC-DC change-over circuits for going out.
Due to the metal-oxide-semiconductor in DC-DC change-over circuits and control circuit being separated in the utility model, therefore, this practicality is new First to fourth metal-oxide-semiconductor in type can be obtained using DMOS techniques.Generally only 7 layers of the light shield quantity of DMOS techniques, uses The device of DMOS technique flows is more preferable than the device performance using BCD technique flows;And metal-oxide-semiconductor is normal component, in the market There is multiple specification to supply.Light shield investment can so be saved.
Additionally, the back side on the first base island 110, the second base island 120 and the 3rd base island 130 in the utility model is exposed In the packaging body, to there is radiating.
The encapsulating structure of DC-to-dc change-over circuit as shown in Figure 1 in the utility model, by one block of DC-DC control electricity Road chip 210 and four metal-oxide-semiconductor chipsets are mounted in an integrated package, using the packing forms of QFN48.The DC- of QFN encapsulation DC change-over circuits, its profile length and width size is 7mm*7mm*0.85mm.Different according to packaging technology, packaging body height can also be 0.75mm or other.In one embodiment, the height of the encapsulating structure of the DC-to-dc change-over circuit in the utility model can Think 0.75mm~0.85mm.
It should be strongly noted that in one embodiment, can be by the 3rd base island 130 in Fig. 1 and positioned at the 3rd base The 3rd metal-oxide-semiconductor MP2 and the 4th metal-oxide-semiconductor MN2 on island 130 are omitted, so as to obtain the only DC-to-dc with the first power output The encapsulating structure of change-over circuit;In another embodiment, it is also possible on the basis of the embodiment shown in Fig. 1, it is further added by Four Ji Dao and the 5th metal-oxide-semiconductor and the 6th metal-oxide-semiconductor on the 4th Ji Dao, by the 5th metal-oxide-semiconductor, the 6th metal-oxide-semiconductor and the control Circuit chip processed 210 constitutes the DC-DC change-over circuits of the 3rd power output.So, the utility model can form three tunnels or more The DC-DC change-over circuits that multichannel is independently exported.
In sum, the DC-to-dc change-over circuit in the utility model by one piece of DC-DC control circuit chip with it is multiple Metal-oxide-semiconductor chipset is mounted in an integrated package, using the packing forms of QFN.Compared to prior art on the market, it has as follows Advantage:
1st, as a result of the encapsulation of QFN, small volume.
2nd, the connection between control circuit and metal-oxide-semiconductor becomes internal routing, and peripheral exit is few, simplifies PCB design.
3rd, peripheral exit is few, and antistatic effect is strong, and reliability is high;
4th, Ji Dao exposes, perfect heat-dissipating;
5th, compared to single chip solution, cost reduction.
In the utility model, " connection ", connected, " company ", " connecing " etc. represent the word being electrical connected, and such as nothing is especially said It is bright, then it represents that direct or indirect electric connection.
It is pointed out that one skilled in the art specific embodiment of the present utility model is done it is any Change the scope all without departing from claims of the present utility model.Correspondingly, the scope of claim of the present utility model It is not limited only to previous embodiment.

Claims (10)

1. a kind of encapsulating structure of DC-to-dc change-over circuit, it is characterised in that it includes lead frame, DC-to-dc conversion electricity Road and the packaging body of the cladding lead frame and DC-to-dc change-over circuit,
Lead frame, its pin for including the first Ji Dao, the second Ji Dao and being arranged at around the first Ji Dao and the second Ji Dao;
The DC-to-dc change-over circuit includes DC-to-dc control circuit chip, and at least two metal-oxide-semiconductors, wherein, institute At least two metal-oxide-semiconductors are stated including the first metal-oxide-semiconductor and the second metal-oxide-semiconductor, first metal-oxide-semiconductor and the second metal-oxide-semiconductor are respectively positioned on described the The front of one Ji Dao, and the drain electrode and the drain electrode of the second metal-oxide-semiconductor of first metal-oxide-semiconductor electrically connect with first Ji Dao;Institute The corresponding pin of the source electrode respectively with the lead frame of the source electrode and second metal-oxide-semiconductor of stating the first metal-oxide-semiconductor is electrically connected;
DC-to-dc control circuit chip, its front for being located at second Ji Dao, the DC-to-dc control circuit chip Corresponding pin with the first metal-oxide-semiconductor, the second metal-oxide-semiconductor and lead frame is electrically connected.
2. the encapsulating structure of DC-to-dc change-over circuit according to claim 1, it is characterised in that the lead frame is also Including the 3rd Ji Dao, the DC-to-dc change-over circuit also includes the 3rd metal-oxide-semiconductor and the 4th metal-oxide-semiconductor,
3rd metal-oxide-semiconductor and the 4th metal-oxide-semiconductor are respectively positioned on the front of the 3rd Ji Dao, the drain electrode of the 3rd metal-oxide-semiconductor and The drain electrode of four metal-oxide-semiconductors is electrically connected with the 3rd Ji Dao, the source electrode of the 3rd metal-oxide-semiconductor and the source electrode of the 4th metal-oxide-semiconductor It is connected respectively at the corresponding pin of the lead frame,
The relevant pad of the DC-to-dc control circuit chip is also electrically connected with the 3rd metal-oxide-semiconductor and the 4th metal-oxide-semiconductor.
3. the encapsulating structure of DC-to-dc change-over circuit according to claim 2, it is characterised in that
The source electrode of each metal-oxide-semiconductor is electrically connected with multiple corresponding pins of lead frame, and the plurality of corresponding pin is linked to be an entirety As the source terminal of correspondence metal-oxide-semiconductor.
4. the encapsulating structure of DC-to-dc change-over circuit according to claim 3, it is characterised in that the multiple correspondence Pin is linked to be an entirety by routing or aluminium strip.
5. the encapsulating structure of DC-to-dc change-over circuit according to claim 2, it is characterised in that
The metal-oxide-semiconductor is obtained by DMOS techniques, and each metal-oxide-semiconductor is a chip.
6. the encapsulating structure of DC-to-dc change-over circuit according to claim 5, it is characterised in that
The drain electrode of first metal-oxide-semiconductor and the drain electrode of the second metal-oxide-semiconductor are electrically connected by conducting resinl with the first Ji Dao;
The drain electrode of the 3rd metal-oxide-semiconductor and the drain electrode of the 4th metal-oxide-semiconductor are electrically connected by conducting resinl with the 3rd Ji Dao.
7. the encapsulating structure of DC-to-dc change-over circuit according to claim 2, it is characterised in that
First metal-oxide-semiconductor and the 3rd metal-oxide-semiconductor are PMOS transistor;
Second metal-oxide-semiconductor and the 4th metal-oxide-semiconductor are nmos pass transistor.
8. the encapsulating structure of DC-to-dc change-over circuit according to claim 2, it is characterised in that
First Ji Dao and the 3rd Ji Dao are symmetrically distributed in the both sides of the second Ji Dao.
9. the encapsulating structure of DC-to-dc change-over circuit according to claim 2, it is characterised in that
The back side of the Ji Dao exposes to the packaging body.
10. the encapsulating structure of DC-to-dc change-over circuit according to claim 2, it is characterised in that
The height of the encapsulating structure of the DC-to-dc change-over circuit is 0.75mm~0.85mm.
CN201621305597.1U 2016-11-30 2016-11-30 Direct current direct current converting circuit's packaging structure Active CN206194740U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201621305597.1U CN206194740U (en) 2016-11-30 2016-11-30 Direct current direct current converting circuit's packaging structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201621305597.1U CN206194740U (en) 2016-11-30 2016-11-30 Direct current direct current converting circuit's packaging structure

Publications (1)

Publication Number Publication Date
CN206194740U true CN206194740U (en) 2017-05-24

Family

ID=58723106

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201621305597.1U Active CN206194740U (en) 2016-11-30 2016-11-30 Direct current direct current converting circuit's packaging structure

Country Status (1)

Country Link
CN (1) CN206194740U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108122900A (en) * 2016-11-30 2018-06-05 无锡华润矽科微电子有限公司 The encapsulating structure of DC-DC conversion circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108122900A (en) * 2016-11-30 2018-06-05 无锡华润矽科微电子有限公司 The encapsulating structure of DC-DC conversion circuit

Similar Documents

Publication Publication Date Title
US8294256B2 (en) Chip package structure and method of making the same
US7999364B2 (en) Method and flip chip structure for power devices
CN101512759B (en) Dfn semiconductor package structure having reduced electrical resistance
US9129947B2 (en) Multi-chip packaging structure and method
CN103824853B (en) Integrated circuit module applied to switch type regulator
CN102047419A (en) Four MOSFET full bridge module
CN102856309A (en) Semiconductor device
CN105470245B (en) Semiconductor devices
TW201642438A (en) Semiconductor device
CN103107171B (en) Semiconductor device of flip chip
CN102983114B (en) High performance power transistor with Ultrathin packaging
CN102263094A (en) Non-interconnected multi-chip package diode
CN104733413A (en) MOSFET packaging structure
CN110600450A (en) Lead frame for arranging chip, packaging body and power supply module
CN206194740U (en) Direct current direct current converting circuit's packaging structure
CN106024766A (en) High-stack wafer system level packaging structure and preparation method
CN108122900A (en) The encapsulating structure of DC-DC conversion circuit
CN102222660B (en) Double-lead-frame multi-chip common package body and manufacturing method thereof
TW201511215A (en) Stacked package of voltage regulator and method for fabricating the same
CN104167403B (en) Lead frame for multi-pin encapsulation
US10230365B2 (en) Bridge leg circuit assembly and full-bridge circuit assembly
CN113066779B (en) Double-power-supply power supply module of packaged chip and packaged chip
CN205723522U (en) A kind of lead frame
CN220106521U (en) Integrated package IPM (intelligent power module) packaging structure for driving multiple MOS (metal oxide semiconductor) chips by IC (integrated circuit) chips
US20110182095A1 (en) Package for synchronous rectifier module

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant
CP03 Change of name, title or address

Address after: 214135 -6, Linghu Avenue, Wuxi Taihu international science and Technology Park, Wuxi, Jiangsu, China, 180

Patentee after: China Resources micro integrated circuit (Wuxi) Co., Ltd

Address before: No. 180-22, Linghu Avenue, Taihu International Science and Technology Park, New District, Wuxi City, Jiangsu Province, 214135

Patentee before: WUXI CHINA RESOURCES SEMICO Co.,Ltd.

CP03 Change of name, title or address