CN205723522U - A kind of lead frame - Google Patents
A kind of lead frame Download PDFInfo
- Publication number
- CN205723522U CN205723522U CN201620362187.4U CN201620362187U CN205723522U CN 205723522 U CN205723522 U CN 205723522U CN 201620362187 U CN201620362187 U CN 201620362187U CN 205723522 U CN205723522 U CN 205723522U
- Authority
- CN
- China
- Prior art keywords
- dao
- pin
- lead
- lead frame
- wire
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49113—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
This utility model relates to the encapsulating structure of integrated circuit, it is specifically related to a kind of lead frame, including Ji Dao, tube core, lead-in wire and multiple pin, described tube core is positioned on described Ji Dao, being provided with pad on described tube core, one end of described lead-in wire is connected with described pad, and the other end of described lead-in wire is connected with described pin and/or Ji Dao, described lead frame also includes that grounding pin I, described grounding pin I are connected with described Ji Dao.This utility model is joined directly together Ji Dao and grounding pin, Ji Dao is formed an entirety with grounding pin, on tube core, all of demand for grounding is all realized by Ji Dao, its integral structure layout is reasonable, do not retrained by routing process rule, it is to avoid produce the problem such as cross-line and angle, greatly reduce the cost of making, and improve the electric property of integrated circuit, the lead frame that this utility model provides is suitable for batch production and uses.
Description
Technical field
This utility model relates to the encapsulating structure of integrated circuit, is specifically related to a kind of lead frame.
Background technology
Lead frame, as the chip carrier of integrated circuit, is a kind of to realize chip internal circuits by means of bonding material and draw
Going out end and extraneous electrical connection, form the key structure part of electric loop, it serves the bridge connected with outer lead and makees
With, the semiconductor integrated circuit product of the overwhelming majority is required for use lead frame, is base important in electronics and information industry
Plinth material.Lead frame is mainly made up of two parts, and including Ji Dao and pin, wherein Ji Dao provides for chip in encapsulation process
Mechanical support, pin then be connect chip to encapsulate outside electric path, for pin, each pin end and core
A pad on sheet is connected by lead-in wire, this end be referred to as in pin, the other end of pin be exactly so-called pin, it provide and
The mechanically and electrically connection of printed circuit board (PCB).
In existing technical scheme, on lead frame, all of pin is independent with the Ji Dao of tube core, and tube core is in design
When, carry out the allocation plan of lead pad according to the demand of encapsulation, allow it to meeting packaging technology design rule
Under conditions of be connected with the pin of lead frame, to reach the function electrically transmitted.
In integrated circuit, the circuit module of difference in functionality is integrated designing on same tube core, the most existing lead frame
Setting up meter can allow Railway Project become prominent: 1. because each separate functional blocks is all it may happen that the demand of ground connection on tube core, and
Therefore leaded frame pin often all may be grounded and takies on any one side of tube core, reduce and draw by ground pad
Wire frame pin is as the utilization rate of the outfan of the signal transmission port on tube core；2. the connecting length of tube core each limit earth lead
To directly increase the cost of chip；3. in order to allow chip substrate can preferably ground connection, need to utilize lead-in wire by Ji Dao and pipe
Ground pad on core or the grounding pin on lead frame are connected, thus add the quantity of bonding wire, cause cost to increase
Add.
As can be seen here, can be for deficiency of the prior art, it is provided that the lead frame that a kind of structure is improved so that it is can
Solve above-mentioned technical problem, there is low cost, that advantage that electrical resistance is good becomes those skilled in the art's technology urgently to be resolved hurrily is difficult
Topic.
Utility model content
This utility model is in order to solve above-mentioned technical problem, it is provided that a kind of lead frame, has topology layout reasonable, uses
Convenient, the advantage that cost of manufacture is low.
In order to reach above-mentioned technique effect, this utility model includes techniques below scheme:
A kind of lead frame, including Ji Dao, tube core, lead-in wire and multiple pin, described tube core is positioned on described Ji Dao, described
Being provided with pad on tube core, one end of described lead-in wire is connected with described pad, and the other end is connected with described pin and/or Ji Dao,
It is provided with grounding pin I, described Ji Dao on described Ji Dao to be in one-piece connection with grounding pin I.
The lead frame of this utility model structure, is to use copper ground die-cut by grinding tool or make by the way of etching,
When designing some pin, the when of or etching die-cut at grinding tool, grounding leg, grounding pin I separately, fixing are in Bu Yuji island
It is an entirety with Ji Dao, by sacrificing some versatilities to improve the performance of this utility model lead frame and to reduce integrated electricity
Road packaging cost.Additionally this utility model only takes up a frame pin as grounding leg, can maximally utilise framework
Pin number to meet the requirement of signal transmission port (I/O) quantity；Ground lead direct Da Ji shortens ground connection on island
The distance of line routing, the most cost-effective；Cross-line problem is not produced on ground lead direct Da Ji island, angle problem etc., no
Retrained by routing process rule, beneficially tube core integral layout planning on Ji Dao；Tube core substrate is directly connect by Ji Dao
Ground, is conducive to improving the electric property performance of integrated circuit.
Further, one end of described lead-in wire is connected with described pad, and the other end is connected with described pin and Ji Dao.
Above-mentioned numerical value is preferred technical scheme, it is possible to makes tube core be directly directly grounded by Ji Dao, and saves lead-in wire
Length, reduce use cost.
Further, described pin includes that grounding pin II, described grounding pin II are connected with described pad.
Further, described grounding pin II is connected with described pad by lead-in wire.
Further, described grounding pin II is connected with described pad by one or two lead-in wire.
Above-mentioned numerical value is preferred technical scheme, by using said structure layout, uses one or two lead-in wires even
Connect pad and pin, just can meet client for increasing the demand of grounding pin.
Further, any one the encapsulated type framework during described lead frame is QFP, DIP, SOP, SSOP and TSSOP.
Wherein, for well known to a person skilled in the art, described QFP is the encapsulation of quad flat type, and DIP is dual-in-line
Formula type encapsulates, and SOP is little outline packages, and SSOP is the little outline packages of scaled-down version, the little outline packages of scaled-down version that TSSOP is thin.
Further, described tube core is positioned at the center of described Ji Dao, and multiple pins are around being arranged on around described Ji Dao.
Use technique scheme, including following beneficial effect: this utility model will be wholely set grounding lead on Ji Dao
Foot, Shi Ji island forms an entirety with grounding pin, and on tube core, all of demand for grounding is all realized by Ji Dao, its overall structure
Rationally distributed, do not retrained by routing process rule, it is to avoid produce the problem such as cross-line and angle, reduced the radical of routing, reduced
The length of routing, is substantially reduced production cost, and adds signal input output end mouth number, improve the utilization encapsulating outer pin
Rate and the electric property of integrated circuit, it is suitable for batch production and uses.
Accompanying drawing explanation
Fig. 1 is this utility model lead frame structure schematic diagram；
In figure,
1, Ji Dao；2, tube core；3, lead-in wire；4, pin；5, pad；6, grounding pin I；7, grounding pin II.
Detailed description of the invention
Below by specific embodiment and combine accompanying drawing this utility model is described in further detail.
This utility model provides a kind of lead frame, as it is shown in figure 1, include base island 1, tube core 2, lead-in wire 3 and multiple pin
4, described tube core is positioned on described Ji Dao, and described tube core is provided with pad 5, and one end of described lead-in wire is connected with described pad,
The other end is connected with described pin and/or Ji Dao, and described Ji Dao is provided with grounding pin I6, described Ji Dao and grounding pin I
It is in one-piece connection.Directly being connected with ground wire pin on framework Shang Ji island, this special pin draws grounding leg outside unique.
In the present embodiment, further, one end of described lead-in wire is connected with described pad, the other end and described pin and
Ji Dao connects.And the grounding ports on tube core is directly by being grounded requirement with the connection of Ji Dao, decrease the quantity of lead-in wire.
In the present embodiment, further, described pin includes grounding pin II7, described grounding pin II and described weldering
Dish connects.
In the present embodiment, further, described grounding pin II is connected with described pad by lead-in wire.
In the present embodiment, further, described grounding pin II is connected with described pad by one or two lead-in wire.
In order to utilize the pin number of framework to greatest extent, and reduce lead-in wire usage quantity as far as possible, it is to avoid across
Line problem and angle problem, be connected grounding pin I with Ji Dao by one or two lead-in wire respectively, passed through by grounding pin II
One or two lead-in wire is connected with pad, makes this utility model device not retrained by routing technique, shortens the length of lead-in wire, subtracts
The quantity of few lead-in wire.
In the present embodiment, further, described lead frame is QFP, DIP, SOP, SSOP and TSSOP encapsulated type frame
Any one in frame.
In the present embodiment, further, described tube core is positioned at the center of described Ji Dao, and multiple pins are around being arranged on
Around described Ji Dao.
The foregoing is only preferred embodiment of the present utility model, be not limited to this utility model, for this
For the technical staff in field, this utility model can have various modifications and variations.All in spirit of the present utility model and principle
Within, any modification, equivalent substitution and improvement etc. made, within should be included in protection domain of the present utility model.
Claims (7)
1. a lead frame, including Ji Dao (1), tube core (2), lead-in wire (3) and multiple pin (4), described tube core is positioned at described
On Ji Dao, described tube core being provided with pad (5), one end of described lead-in wire is connected with described pad, the other end and described pin
And/or Ji Dao connects, it is characterised in that being provided with grounding pin I (6), described Ji Dao and grounding pin I on described Ji Dao is one
Body formula connects.
A kind of lead frame the most according to claim 1, it is characterised in that one end of described lead-in wire is with described pad even
Connecing, the other end is connected with described pin and Ji Dao.
A kind of lead frame the most according to claim 1, it is characterised in that described pin includes grounding pin II (7), institute
State grounding pin II to be connected with described pad.
A kind of lead frame the most according to claim 3, it is characterised in that described grounding pin II is by lead-in wire and institute
State pad to connect.
A kind of lead frame the most according to claim 4, it is characterised in that described grounding pin II passes through one or two
Individual lead-in wire is connected with described pad.
A kind of lead frame the most according to claim 1, it is characterised in that described lead frame is QFP, DIP, SOP,
Any one encapsulated type framework in SSOP and TSSOP.
A kind of lead frame the most according to claim 1, it is characterised in that described tube core is positioned at the center of described Ji Dao
Place, multiple pins are around being arranged on around described Ji Dao.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620362187.4U CN205723522U (en) | 2016-04-26 | 2016-04-26 | A kind of lead frame |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620362187.4U CN205723522U (en) | 2016-04-26 | 2016-04-26 | A kind of lead frame |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN205723522U true CN205723522U (en) | 2016-11-23 |
Family
ID=57294706
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201620362187.4U Ceased CN205723522U (en) | 2016-04-26 | 2016-04-26 | A kind of lead frame |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN205723522U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109449090A (en) * | 2018-09-28 | 2019-03-08 | 深圳赛意法微电子有限公司 | A kind of packaging method of microminiature microprocessor |
| CN112563233A (en) * | 2020-12-09 | 2021-03-26 | 天水七四九电子有限公司 | Planar packaging part and production method thereof |
-
2016
- 2016-04-26 CN CN201620362187.4U patent/CN205723522U/en not_active Ceased
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109449090A (en) * | 2018-09-28 | 2019-03-08 | 深圳赛意法微电子有限公司 | A kind of packaging method of microminiature microprocessor |
| CN109449090B (en) * | 2018-09-28 | 2020-10-16 | 深圳赛意法微电子有限公司 | Method for packaging subminiature microprocessor |
| CN112563233A (en) * | 2020-12-09 | 2021-03-26 | 天水七四九电子有限公司 | Planar packaging part and production method thereof |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| IW01 | Full invalidation of patent right |
Decision date of declaring invalidation: 20171128 Decision number of declaring invalidation: 33972 Granted publication date: 20161123 |
|
| IW01 | Full invalidation of patent right |