CN206147011U - Thin layer silicon chip resistivity detecting system based on pseudo - measured value method - Google Patents
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Abstract
The utility model relates to a thin layer silicon chip resistivity detecting system based on pseudo - measured value method, this system include driving source module, multichannel analogue switch module, signal amplification module, signal processing module and computer, driving source module, multichannel analogue switch module, signal amplification module, signal processing module and computer connect gradually, and wherein signal processing module's an output still is connected with multichannel analogue switch module's an input, and multichannel analogue switch module connects the both ends at the sample wafer simultaneously, the driving source module chooses for use the constant current source to be connected with multichannel analogue switch module as driving source, driving source module, and for the silicon chip electrode provides drive signal, concrete circuit constitution is: power E's positive pole passes through switch connecting resistance R1's the one end and the one end of load, and power E's negative pole is connected with resistance R2's one end, diode D1's negative pole, two slide rheostat of other end series connection of resistance R2.
Description
Technical field
This utility model is related to the noncontacting measurement technology of thin layer silicon chip resistivity, and in particular to one kind is based on pseudo-measurement value
The thin layer silicon chip resistivity detection method of method and system, the method can detect to silicon chip full wafer resistivity evenness, can
The scattergram of silicon chip resistivity is drawn, monocrystal silicon field of industrial production is applied to.
Background technology
Resistivity is an important parameter of silicon chip, and its size directly reflects the conductive capability of silicon chip.Silicon chip presses crystal
Structure is divided into monocrystal silicon and polysilicon, and its resisitivity of the silicon chip of different structure is very big.The wherein resistivity of monocrystal silicon pure silicon
For 2.5*105Ω cm, and per 1,000,000 silicon atoms in have one to be substituted by other atoms, then resistivity reduce by 0.2 Ω
cm.During production silicon chip, the electric conductivity of pure silicon can be changed by the concentration of control foreign atom.
For the test of this kind of semiconductor resistor rate of silicon chip, conventional method is broadly divided into contact type measurement and non-contact type
Measurement.Contact type measurement technology has two sonde methods, the four probes in a line skill of handling needles, three probe method, spreading resistance method etc., and detailed content is shown in text
Offer《Semiconductor test know-why and application》(Liu Xin Fudu accounts for flat Li Weimin. semiconductor test know-why and application [J]
.2007.) the four probes in a line skill of handling needles is most commonly used that at present.The operation principle of the four probes in a line skill of handling needles is equidistantly linear by four probes
Formula is placed on a certain region of silicon chip, the injection current I on the probe of both sides, then with the measurement of high-precision voltmeter
Between voltage V between two probes, can average resistivity in the region using Ohm's law.The advantage of the four probes in a line skill of handling needles is
Principle is simple, convenience of calculation, is easy to application.But with the development of science and technology, the four probes in a line skill of handling needles is gradually difficult to meet industrial system
The demand made.Operation principle is limited to, the four probes in a line skill of handling needles must contact silicon chip surface with four probes, and silicon chip can be made to be subject to dirt
Damage；Measurement range is also limited by the spacing of probe, and measured zone is larger, it is difficult to check whether silicon chip resistivity is uniform, can only survey
The average resistivity of amount silicon chip full wafer.Due to needing point-to-point measurement during measurement, therefore the substantial amounts of time can be consumed.
Heed contacted measure mainly has alternating-current measurement method, capacitive couplings, inductively coupled method, eddy-current method, ion resonance red
Outer collimation method and scanning microwave microscope probe method of testing.Detailed content is shown in document《Semi-conducting material is tested and analysis》(Yang De
Core. semi-conducting material is tested and analysis [M]. and Science Press, 2010.) conventional at present is eddy-current method.Its operation principle be
One probe with coil of silicon chip top suspension, when forming vortex after coil injection current magnetic field, silicon chip resistivity are produced
When different, the magnetic field through silicon chip also can be different, by detecting that the magnetic flux below silicon chip is just obtained the resistivity of silicon chip.So
And coil can produce heat when forming vortex, the resistivity for making silicon chip is affected, therefore measured data are inaccurate.
Existing thin layer silicon chip resistivity e measurement technology either the four probes in a line skill of handling needles or eddy-current method, are all present certain
Deficiency, allows in the industrial production the measurement that cannot accomplish large-tonnage product.
Utility model content
For the deficiencies in the prior art, the technical problem that this utility model is intended to solve is to provide a kind of based on pseudo-measurement value
The thin layer silicon chip resistivity detection method of method and system, the method can solve the requirement that prior art cannot meet, Neng Goushi
When be quickly detected from the resistivity of thin layer silicon chip, obtain the overall distribution figure of silicon chip resistivity, so as to screen commercial production in
The defect ware of appearance.
This utility model solves the technical scheme of the technical problem employing：
The step of a kind of thin layer silicon chip resistivity detection method based on pseudo-measurement value method, the method is：
1) basic parameter of standard silicon chip, including diameter, P/N types, thickness, crystal orientation, test sample and standard silicon chip are determined
Diameter, P/N types, thickness it is identical with crystal orientation parameter；
2) according to the basic parameter founding mathematical models of standard silicon chip；
3) energisation mode and number of electrodes, each microcell node coordinate in setting silicon chip are selected according to mathematical model；
4) using pseudo-measurement value method measured resistivity：
A. in standard silicon chip, i.e., resistivity is known and the silicon chip that is evenly distributed, and marginal position equidistantly places electrode, and selects
Two electrodes apply excitation, measure the current potential of each node location of standard silicon chip and edge electrodes position；
The current potential of the edge electrodes position that b. step a) is measured carries out numerical computations, the method fitting of applied regression analysiies
Bid eka-silicon sheet border Potential distribution functional equation；
C. the standard silicon chip boundary potential distribution function equation for being obtained according to step b) and the standard silicon obtained in step a)
The current potential of each node location in piece, each node is calculated in the potential map position of boundary according to equipotential corresponding relation；
D. in test sample, i.e., resistivity is unknown and silicon chip pockety, and marginal position equidistantly places electrode, electrode
Number is consistent with standard silicon chip Top electrode number, and applies identical excitation, measures the current potential of test sample edge electrodes position；
The current potential of the edge electrodes position that e. step d) is measured carries out numerical computations, the method fitting of applied regression analysiies
Go out test sample boundary potential distribution function equation；
F. each node for step c) being obtained brings the test sample that step e) is obtained in the potential map position of boundary
Boundary potential distribution function Equation for Calculating goes out the current potential of each node location of test sample；
The each node position of standard silicon chip in the current potential and step a) of each node location of test sample that g. step f) is obtained
The current potential put is compared, and according to the potential changing value of each node of standard silicon chip and each node of test sample each node is calculated
The impedance variation value of position；
H. test sample resistivity scattergram is reconstructed according to the impedance variation value of each node location, and detects test sample electricity
Resistance rate uniformity, so far completes using the purpose of pseudo-measurement value method measured resistivity.
A kind of thin layer silicon chip resistivity detecting system based on pseudo-measurement value method, the system uses above-mentioned detection method,
Including excitation source module, multiway analog switch module, signal amplification module, signal processing module and computer；Excitation source module,
Multiway analog switch module, signal amplification module, signal processing module and computer be sequentially connected, wherein signal processing module
One outfan is also connected with an input of multiway analog switch module, and multiway analog switch module is connected on print simultaneously
Two ends；
From constant-current source as driving source, excitation source module is connected the excitation source module with multiway analog switch module,
Pumping signal is provided for silicon chip electrode, physical circuit is constituted is：The positive pole of power supply E connects one end of resistance R1 and bears by switch
One end of load, the negative pole of power supply E is connected with the negative pole of one end of resistance R2, diode D1；The other end of resistance R2 is connected two
Slide rheostat (R3 and R4), one end connecting triode of slide rheostat R4 emitter stage connection, the positive pole of diode D1 with
The negative pole connection of diode D2；The other end of resistance R1 is connected with the positive pole of diode D2, the base stage of audion Q；Audion Q's
The other end of colelctor electrode connection load；
The signal amplification module adopts balanced type differential amplifier circuit, the input and multi-channel analog of signal amplification module
The outfan connection of switch module, the outfan of signal amplification module is connected with signal processing module；Physical circuit is constituted：Bag
Include fixed resistance R5～R12 and operational amplifier, the positive pole of the operational amplifier and one end of fixed resistance R5, fixed electricity
One end connection of resistance R11, one end of the other end, the other end of fixed resistance R11 and fixed resistance R7 of fixed resistance R5 connects
Ground；Fixed resistance R9 and fixed resistance R8 is connected in parallel on the wire between fixed resistance R7 and fixed resistance R11 simultaneously；The fortune
Calculate amplifier negative pole be connected with one end of fixed resistance R12, one end of fixed resistance R10, the other end of fixed resistance R10 and
One end connection of fixed resistance R6；The other end of fixed resistance R12 is connected with the outfan of operational amplifier, and output voltage is
The other end of U0, fixed resistance R6 and the other end of fixed resistance R7 are connected with the outfan of multiway analog switch module, input
Voltage is Ui.
Compare with prior art, the beneficial effects of the utility model are：
Four probe method and eddy-current method are respectively the contact type measurement methods and heed contacted measure method being most widely used at present.
This utility model is compared with both approaches with following features：
1) four probe method is contacted by four probes with silicon chip, after applying excitation, using certain algorithm probe area is drawn
Interior resistivity.To ensure that probe is Ohmic contact with silicon chip, probe need to be placed on silicon chip with certain pressure, so can be right
Silicon chip causes certain damage.This utility model is the marginal position for being placed on silicon chip with electrode, is not being contacted inside silicon chip
In the case of measure the resistivity scattergram of silicon chip full wafer, can effectively avoid silicon chip due to measuring surface damage for causing etc.
Defect.
2) eddy-current method be by probe at the magnetic field that produces after powered up of coil the resistivity of silicon chip is measured.By
Closer to the distance from silicon chip in probe positions, the heat that coil is produced after powered up can produce considerable influence to silicon chip surface temperature,
So as to affect the actual resistivity of silicon chip.This utility model be then marginal position apply encourage, may be to edge electrodes at
Silicon chip resistivity produce certain impact (but can reduce affecting by weakening pumping signal), but for inside silicon chip not
Impact can be produced, there is higher certainty of measurement relative to eddy-current method.
3) four probe method is divided into the four probes in a line skill of handling needles and square four probes method.In measurement, probe needs to be placed into silicon chip
On.The area size of measurement is determined by probe diameter and probe spacing.This just makes current tester big in production technique
The big size for limiting measurement microcell.This utility model can measure minimum with node as basic calculating unit, in theory
Resistivity at point, greatly improves the resolution of silicon chip overall resistivity scattergram.
4) in application process, to guarantee to obtain higher resolution, the diameter of probe needs to set four probe method
That what is counted is minimum.This can cause great difficulty when tester is manufactured.What this utility model was used is then electrode, is guarantee
Measurement effect can there are certain requirements to electrode material, need electrode to have good Ohmic contact with silicon chip, but to electrode
Size shape without particular requirement, the manufacturing cost of this is significantly relatively low tester.
5), in measurement, the resistivity for wanting to obtain silicon chip microcell can only point-to-point measurement for four probe method and eddy-current method.Often
Distribution of resistance figure to obtain high-resolution needs to carry out hundreds and thousands of measurements on a silicon chip, and this causes to measure needs
The substantial amounts of time, each product cannot be detected in the industrial production.This utility model method is with pseudo-measurement value method as core
The heart, during Review of Electrical Impedance Tomography (EIT algorithms) is applied to into the detection of silicon chip resistivity, without the need for point-to-point measurement silicon chip is just obtained
Current potential and impedance at interior each node, can quick detection go out the uniformity of silicon chip resistivity, and can well be applied to industry
In the detection of a large amount of production silicon chips.
Description of the drawings
A kind of silicon chip sheet resistance rate detection test system structure of embodiment of Fig. 1 this utility model based on pseudo-measurement value method
Block diagram；
A kind of silicon chip sheet resistance rate detecting system driving source of embodiment of Fig. 2 this utility model based on pseudo-measurement value method
The circuit connection diagram of module 1；
Fig. 3 this utility model is put based on a kind of signal of embodiment of silicon chip sheet resistance rate detecting system of pseudo-measurement value method
The circuit connection diagram of big module 3；
Fig. 4 standard silicon chip potential line distribution figures；
Fig. 5 standard silicon chip potential two dimensional model isoboleses；
Tetra- cun of standard silicon chip resistivity scattergram (units of Fig. 6：Ω·cm)
Fig. 7 tests print analogous diagram：Fig. 7 (a) drops in the analogous diagram of standard silicon chip position to the left, Fig. 7 (b) for normal saline
For the analogous diagram that normal saline drops in standard silicon chip position on the upper side, Fig. 7 (c) drops in standard silicon chip position on the lower side for normal saline
Analogous diagram；
In figure, 1 excitation source module, 2 multiway analog switch modules, 3 signal amplification modules, 4 signal processing modules, 5 calculate
Machine, 6 prints.
Specific embodiment
This utility model is described in further detail with reference to embodiment and accompanying drawing, but not in this, as weighing to the application
The further restriction of the claimed scope of profit.
Thin layer silicon chip resistivity detection method of this utility model based on pseudo-measurement value method, be the step of the method：
1) basic parameter of standard silicon chip, including diameter, P/N types, thickness, crystal orientation, test sample and standard silicon chip are determined
Diameter, P/N types, thickness it is identical with crystal orientation parameter；
2) according to the basic parameter founding mathematical models of standard silicon chip；
3) energisation mode and number of electrodes, each microcell node coordinate in setting silicon chip are selected according to mathematical model；
4) using pseudo-measurement value method measured resistivity：
A. in standard silicon chip, i.e., resistivity is known and the silicon chip that is evenly distributed, and marginal position equidistantly places electrode, and selects
Two electrodes apply excitation, measure the current potential of each node location of standard silicon chip and edge electrodes position；
The current potential of the edge electrodes position that b. step a) is measured carries out numerical computations, the method fitting of applied regression analysiies
Bid eka-silicon sheet border Potential distribution functional equation；
C. the standard silicon chip boundary potential distribution function equation for being obtained according to step b) and the standard silicon obtained in step a)
The current potential of each node location in piece, each node is calculated in the potential map position of boundary according to equipotential corresponding relation；
D. in test sample, i.e., resistivity is unknown and silicon chip pockety, and marginal position equidistantly places electrode, electrode
Number is consistent with standard silicon chip Top electrode number, and applies identical excitation, measures the current potential of test sample edge electrodes position；
The current potential of the edge electrodes position that e. step d) is measured carries out numerical computations, the method fitting of applied regression analysiies
Go out test sample boundary potential distribution function equation；
F. each node for step c) being obtained brings the test sample that step e) is obtained in the potential map position of boundary
Boundary potential distribution function Equation for Calculating goes out the current potential of each node location of test sample；
The each node position of standard silicon chip in the current potential and step a) of each node location of test sample that g. step f) is obtained
The current potential put is compared, and according to the potential changing value of each node of standard silicon chip and each node of test sample each node is calculated
The impedance variation value of position；
H. test sample resistivity scattergram is reconstructed according to the impedance variation value of each node location, and detects test sample electricity
Resistance rate uniformity, so far completes using the purpose of pseudo-measurement value method measured resistivity.
The mathematical model is two-dimensional circular field domain, and field domain cell attribute is determined by silicon chip actual parameter.
The applying is actuated to constant current source forcing, is ensure in measurement process, and the suffered excitation of silicon chip is identical all the time,
Need the energisation mode for selecting relative constancy.Conventional constant excitation mode is by constant pressure source forcing and constant current source forcing, this practicality
Novel method selects constant-current source mode can effectively reduce what electrode was produced after contact silicon chip due to applying excitation to encourage
Joule heat, so as to reduce impact of the temperature for silicon chip resistivity.
The standard silicon chip boundary potential distribution function equation that the step b) is obtained is
Note：Potential distribution functional equation is not limited only to power function, and actual function form can be adjusted according to experimental data.
Thin layer silicon chip resistivity detecting system (abbreviation system, referring to Fig. 1-3) of this utility model based on pseudo-measurement value method
Including excitation source module 1, multiway analog switch module 2, signal amplification module 3, signal processing module 4 and computer 5；Driving source
Module 1, multiway analog switch module 2, signal amplification module 3, signal processing module 4 and computer 5 are sequentially connected, wherein signal
One outfan of processing module is also connected with an input of multiway analog switch module, and multiway analog switch module is simultaneously
It is connected on the two ends of print 6 (test sample or standard silicon chip)；The excitation source module is responsible for the applying of pumping signal；Multi-channel analog
Switch module is responsible for electrode and voltage measurement electrodes to applying excitation and is switched over；Signal amplification module is responsible for faint electricity
Pressure signal is amplified；Signal processing module is responsible for carrying out data simple process, and controls multiway analog switch module；Calculate
Machine is responsible for data processing and resistivity is calculated；
The excitation source module 1, as driving source, can be reduced the thermogenetic impact of joule and ensure to swash from constant-current source
The stability of signal is encouraged, excitation source module 1 is connected with multiway analog switch module 2, provides pumping signal for silicon chip electrode, specifically
Circuit is constituted：The positive pole of power supply E is by one end of switch connection resistance R1 and one end of load, and power supply E's is negative
Pole is connected with one end of resistance R2, the negative pole of diode D1；The other end series connection two the slide rheostats R3 and R4 of resistance R2 are sliding
The emitter stage connection of one end connecting triode of dynamic rheostat R4, the positive pole of diode D1 is connected with the negative pole of diode D2；Electricity
The other end of resistance R1 is connected with the positive pole of diode D2, the base stage of audion Q；It is another that the colelctor electrode connection of audion Q is loaded
End.Using the characteristic of audion --- base current IbWith collector current IcRatio beta be generally constant.When selected base stage electricity
Stream IbAfterwards, no matter how the load of colelctor electrode changes, and the collector current Ic of its output is all without changing.Recycle two
Diode pair electric current is adjusted, it is ensured that outputting current steadily is constant.Because pumping signal is less needed for system, can choose
The resistance of resistance R1 is 2K Ω, resistance R2 resistances are 50 Ω, and the resistance for choosing slide rheostat R3 is 51K Ω, slide rheostat
The resistance of R4 is 500 Ω, and the voltage of power supply E is 5v, and the electric current of final constant-current source output is between more than ten μ A to several mA.Concrete electricity
Flow big I and selected by adjusting the resistance of two slide rheostats.
The signal amplification module 3 adopts balanced type differential amplifier circuit, the circuit to can be good at being produced in suppression circuit
Raw noise, can play positive effect in the measurement of weak voltage signals；The input and multichannel of signal amplification module
The outfan connection of analog switch module, measured electrode signal is amplified；The outfan of signal amplification module and letter
The connection of number processing module；Physical circuit is constituted：Including fixed resistance R5～R12 and operational amplifier, the fortune
Calculate amplifier positive pole be connected with one end of fixed resistance R5, one end of fixed resistance R11, the other end of fixed resistance R5, consolidate
One end of the other end and fixed resistance R7 of determining resistance R11 is grounded；Fixed resistance R9 and fixed resistance R8 is connected in parallel on solid simultaneously
Determine on the wire between resistance R7 and fixed resistance R11；It is the negative pole of the operational amplifier and one end of fixed resistance R12, solid
Determine one end connection of resistance R10, the other end of fixed resistance R10 is connected with one end of fixed resistance R6；Fixed resistance R12's is another
One end is connected with the outfan of operational amplifier, and output voltage is U0, and the other end of fixed resistance R6 and fixed resistance R7's is another
One end is connected with the outfan of multiway analog switch module, and input voltage is Ui.
Pseudo-measurement value method described in the utility model is referred to is closed using the mutual position of the finite discrete data of EIT measurements
Connection information, the computational methods such as application data interpolation or curve matching try to achieve the solution of the more multipoint data in border or continuous distribution
Analysis formula.This utility model method and system can be also used for the detection of other sheet semiconductor resistor rates.
Embodiment 1
To guarantee that test data has observability, test selection standard silicon chip to carry out.Experimental physics model is one
16 electrodes, 4 cun of diameter, the circular silicon chip of 525 ± 25 μm of thickness, the electrode that marginal position is equidistantly placed is rectangle, using adjacent
Motivation model.
Thin layer silicon chip resistivity detection method of the present embodiment based on pseudo-measurement value method, concrete steps are described as follows：
Physical model is set up using ANSYS softwares according to standard silicon chip parameter, constant-current source energisation mode is selected, silicon chip is set
Interior each microcell node coordinate.16 electrodes are equidistantly placed at silicon chip edge, electrode A, electrode B, electrode are labeled as successively
C ..., electrode P, the Potential Distributing of the standard silicon chip is as shown in figure 4, wherein exciting electrode must occur in pairs, it is ensured that electric current
By one of injection, from another outflow.Apply excitation, and measuring electrode A, electrode in turn first at electrode P and motor A
B, electrode C ..., the voltage at electrode P.Now two dimensional model can be equivalent to it is one-dimensional being calculated, will circular boundary
Launch, establish with electrode A as zero, the distance between electrode A and electrode B set up one-dimensional coordinate system (such as unit distance
Shown in Fig. 5).Using measurement the data obtained, by numerical analysis, the boundary potential distribution function equation of fit standard silicon chip：
X is each electrode coordinate in one-dimensional isoboles in formula, and φ is potential value at x.
Mapping position of each node in boundary is worth to by measuring the current potential of each node, according to equipotential corresponding relation meter
Each node is calculated in the potential map position of boundary.
Then normal saline is instilled on standard silicon chip so as to change wafer sections zone resistance rate so as to become test specimens
Piece.Equidistantly place 16 electrodes in test sample edge, according to above-mentioned processing mode, be also labeled as successively electrode A, electrode B,
Electrode C ..., electrode P, apply first at electrode P and electrode A and the excitation of standard silicon chip identical, and measuring electrode in turn
A, electrode B, electrode C ... ..., the voltage at electrode P, using data measured, obtains test sample boundary potential distribution function side
Journey：
Two boundary potential distribution functions of contrast can obtain impedance variation function：
The potential value of each node location inside test sample is tried to achieve in the potential map relation of boundary using each node.By
Each node all can find the border of iso-electric mapping position, standard of comparison silicon chip and test sample on its border in silicon chip
Potential distribution function is that the current potential of each node location of available test sample compares with the current potential of each node location of standard silicon chip
Situation, becomes according to the impedance that the potential changing value of each node of standard silicon chip and each node of test sample calculates each node location
Change value, according to the impedance variation value of each node location test sample resistivity scattergram is reconstructed.
Thus the resistivity at each node of test sample can be obtained.
Fig. 6 is the actual measured resistivity overall distribution situation of standard silicon chip.When being tested using ANSYS software emulations, such as Fig. 7
Shown in analogous diagram, Fig. 7 (a) drops in the analogous diagram of standard silicon chip position to the left for normal saline, and Fig. 7 (b) is dropped in for normal saline
The analogous diagram of standard silicon chip position on the upper side, Fig. 7 (c) drops in the analogous diagram of standard silicon chip position on the lower side for normal saline.From figure
It is evident that dripping resistivity at the silicon chip of normal saline generates significant change, it is consistent with practical situation.
Experiment simulation demonstrates the method and effectively can intuitively detect when silicon chip resistivity uniformity exists and changes
Out.Can be used for quickly screening the underproof silicon chip of resistivity in production process, be worth with larger industrial application.
This utility model is a kind of silicon chip resistivity uniformity detecting method, and silicon chip design parameter is had no special requirements, can
Set with the concrete condition in practical application.
This utility model does not address part and is applied to prior art.
Claims (1)
1. a kind of thin layer silicon chip resistivity detecting system based on pseudo-measurement value method, it is characterised in that the system includes driving source mould
Block, multiway analog switch module, signal amplification module, signal processing module and computer；Excitation source module, multiway analog switch
Module, signal amplification module, signal processing module and computer are sequentially connected, and wherein signal processing module a outfan is also
It is connected with an input of multiway analog switch module, multiway analog switch module is connected on the two ends of print simultaneously；
From constant-current source as driving source, excitation source module is connected the excitation source module with multiway analog switch module, is silicon
Plate electrode provides pumping signal, and physical circuit is constituted is：The one end and load of the positive pole of power supply E by switch connection resistance R1
One end, the negative pole of power supply E is connected with the negative pole of one end of resistance R2, diode D1；The other end of resistance R2 is connected two and is slided
Rheostat R3 and R4, the emitter stage connection of one end connecting triode of slide rheostat R4, the positive pole and diode of diode D1
The negative pole connection of D2；The other end of resistance R1 is connected with the positive pole of diode D2, the base stage of audion Q；The colelctor electrode of audion Q
The other end of connection load；
The signal amplification module adopts balanced type differential amplifier circuit, the input and multiway analog switch of signal amplification module
The outfan connection of module, the outfan of signal amplification module is connected with signal processing module；Physical circuit is constituted：Including solid
Determine resistance R5 ~ R12 and operational amplifier, the positive pole of the operational amplifier and one end of fixed resistance R5, fixed resistance R11
One end connects, and one end of the other end, the other end of fixed resistance R11 and fixed resistance R7 of fixed resistance R5 is grounded；It is fixed
Resistance R9 and fixed resistance R8 is connected in parallel on the wire between fixed resistance R7 and fixed resistance R11 simultaneously；The operation amplifier
The negative pole of device is connected with one end of fixed resistance R12, one end of fixed resistance R10, and the other end of fixed resistance R10 is electric with fixed
One end connection of resistance R6；The other end of fixed resistance R12 is connected with the outfan of operational amplifier, and output voltage is U0, fixed
The other end of resistance R6 and the other end of fixed resistance R7 are connected with the outfan of multiway analog switch module, and input voltage is
Ui。
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