CN206042520U - Pressfitting circuit board - Google Patents
Pressfitting circuit board Download PDFInfo
- Publication number
- CN206042520U CN206042520U CN201621066376.3U CN201621066376U CN206042520U CN 206042520 U CN206042520 U CN 206042520U CN 201621066376 U CN201621066376 U CN 201621066376U CN 206042520 U CN206042520 U CN 206042520U
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- CN
- China
- Prior art keywords
- layer
- base plate
- blind hole
- circuit board
- plate layer
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- Expired - Fee Related
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- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The utility model provides a pressfitting circuit board, the layer is pressed including closing to the circuit board, close and press the layer from top to bottom in proper order including fourth base plate layer, third base plate layer, the 2nd core board layer, first base plate layer, the 2nd core board layer, third base plate layer, fourth base plate layer, first base plate layer is provided with a plurality of buried via holes, a plurality of first blind holes that are provided with of the 2nd core board layer communicate with each other with the buried via hole, the second blind hole that third base plate layer was provided with a plurality of third blind holes and the 2nd core board layer communicates with each other, the fourth blind hole that fourth base plate layer was provided with a plurality of the 5th blind holes and third base plate layer communicates with each other. The beneficial effect of the utility model: through having offered two buried via holes in first base plate layer, offered a plurality of blind hole at the 2nd core board layer, third base plate layer, fourth base plate in situ, it is fashionable with the base plate lamination with core board layer pressfitting or base plate layer on the base plate layer, dwindled between core board layer and each the base plate layer or the thermal stress difference between base plate layer and the base plate layer, avoid the base plate layer to squint and perhaps produced high frequency noise.
Description
Technical field
This utility model is related to circuit board technology field, is specifically related to a kind of pressing circuit board.
Background technology
Circuit board is the supplier of electronic devices and components electrical connection, and circuit board is mainly by circuit printing by way of printing
System is on sheet material, and then can greatly reduce wiring and the mistake assembled, and then improves the gentle productive labor of Automated water
Rate.The hardened structure of available circuit is fixed, single function, in the bonding processes for carrying out heating bonding, because each flaggy is heated being produced
Raw thermal stress difference is larger so that after hot pressing, thermal stress cannot discharge completely, so high-frequency noise is also easy to produce, and it is existing
The number of plies of circuit board is not high, thickness is thicker, it is impossible to meet the requirement of Ultrathin high density, in sum, how to provide one kind can
Avoid each flaggy from high-frequency noise being produced in the bonding processes of heating bonding, and meet the circuit board of the requirement of Ultrathin high density
It is current those skilled in the art's urgent problem.
The content of the invention
In view of the shortcomings of the prior art, the purpose of this utility model is to provide a kind of pressing circuit board, and it can keep away
High-frequency noise is produced in exempting from the bonding processes for heat bonding, and meets number of plies height, the requirement of thinner thickness.
The technical solution adopted in the utility model is：
A kind of pressing circuit board, circuit board include combined pressure layer, and combined pressure layer lower surface is provided with organic mold layer, and combined pressure layer is by upper
Include tetrabasal layer, the 3rd substrate layer, the second core layer, first substrate layer, the second core layer, the 3rd substrate under successively
Layer, tetrabasal layer, are provided with adhesive layer between tetrabasal layer and the 3rd substrate layer, the 3rd substrate layer and the second core layer it
Between be provided with adhesive layer, be provided with adhesive layer between the second core layer and first substrate layer, first substrate layer is provided with some burying
Hole, the second core layer are provided with some first blind holes, some second blind holes, and the first blind hole is communicated with buried via hole, the 3rd substrate layer
Some 3rd blind holes, some 4th blind holes is provided with, the 3rd blind hole is communicated with the second blind hole, tetrabasal layer is provided with some
Five blind holes, the 5th blind hole are communicated with the 4th blind hole.
Preferably, buried via hole is set to two, and the buried via hole is arranged in the middle part of first substrate layer, corresponding first blind hole
Two are set to, the second blind hole is set to two, second blind hole is arranged at the first blind hole both sides, corresponding 3rd blind hole is arranged
For two, the 4th blind hole is set to two, and the 4th blind hole is arranged at the 3rd blind hole both sides, and corresponding 5th blind hole is set to two
It is individual.
Preferably, the thickness of the second core layer is set to 50um.
Preferably, the thickness of combined pressure layer is set to 390～410um.
Preferably, circuit board is provided with the first fool proof group and the second fool proof group, and the first fool proof group is arranged at electricity
Road plate left side edge, the second fool proof group are arranged at circuit board right side edge.
Preferably, the first fool proof group is set to two fool proof holes, and the second fool proof group is set to three fool proof holes.
The beneficial effects of the utility model are：
Firstth, by offering two buried via holes in first substrate layer, in the second core layer, the 3rd substrate layer, the 4th base
Several blind holes are offered in flaggy, when substrate layer is pressed with core layer or substrate layer is pressed with substrate layer, reduce central layer
Between layer and each substrate layer or thermal stress difference between substrate layer and substrate layer, it is to avoid during pressing because thermal stress difference and
Cause substrate layer skew or produce high frequency noise；
Secondth, by by combined pressure layer from top to bottom set gradually for tetrabasal layer, the 3rd substrate layer, the second core layer,
First substrate layer, the second core layer, the 3rd substrate layer, tetrabasal layer, are provided with adhesive layer between individual substrate layer, using multiple
Pressing, first presses first substrate layer and the second core layer, then presses the 3rd substrate layer, tetrabasal layer, and the second core successively
The thickness of flaggy is set to 50um, and the thickness of combined pressure layer is set to 390～410um, realizes number of plies height, the requirement of thickness of thin；
3rd, by circuit board is provided with the first fool proof group and the second fool proof group, the first fool proof group is set to two
Fool proof hole, the second fool proof group are set to three fool proof holes, the phenomenon that circuit board can be avoided to misplace in installation or the course of processing.
Description of the drawings
Fig. 1 is cross section structure diagram of the present utility model；
Fig. 2 is the top view of Fig. 1 of the present utility model；
In figure：Combined pressure layer 1, adhesive layer 11, first substrate layer 2, buried via hole 21, the second core layer 3, the first blind hole 31, second
Blind hole 32, the 3rd substrate layer 4, the 3rd blind hole 41, the 4th blind hole 42, tetrabasal layer 5, five blind holes 51, organic mold layer 6, first
Fool proof group 7, the second fool proof group 8, fool proof hole 9.
Specific embodiment
The technical solution of the utility model is illustrated with embodiment below in conjunction with the accompanying drawings.
Embodiment one, with reference to shown in Fig. 1：
A kind of pressing circuit board, circuit board include combined pressure layer 1, and 1 lower surface of combined pressure layer is provided with organic mold layer 6, combined pressure layer 1
Tetrabasal layer 5, threeth substrate layer 4, second core layer 3, first substrate layer 2, second core layer are included successively from top to bottom
3rd, the 3rd substrate layer 4, tetrabasal layer 5, is provided with adhesive layer 11, the 3rd substrate between tetrabasal layer 5 and the 3rd substrate layer 4
Adhesive layer 11 is provided between layer 4 and the second core layer 3, between the second core layer 3 and first substrate layer 2, adhesive layer is provided with
11, first substrate layer 2 is provided with some buried via holes 21, and the second core layer 3 is provided with some first blind holes 31, some second blind holes
32, the first blind hole 31 is communicated with buried via hole 21, and the 3rd substrate layer 4 is provided with some 3rd blind holes 41, some 4th blind holes 42, and the 3rd
Blind hole 41 is communicated with the second blind hole 32, and tetrabasal layer 5 is provided with some 5th blind holes 51, the 5th blind hole 51 and the 4th blind hole 42
Communicate, buried via hole 21 is set to two, the buried via hole 21 is arranged in the middle part of first substrate layer 2, corresponding first blind hole 31 is set to two
Individual, the second blind hole 32 is set to two, and second blind hole 32 is arranged at 31 both sides of the first blind hole, and corresponding 3rd blind hole 41 is arranged
For two, the 4th blind hole 42 is set to two, and the 4th blind hole 42 is arranged at 41 both sides of the 3rd blind hole, corresponding 5th blind hole 51
It is set to two.
In said structure, when first substrate layer 2 is pressed with each second core layer 3 by adhesive layer 11, because first substrate
Layer 2 is provided with some buried via holes 21, and first blind hole 31 that is provided with of the second core layer 3 is communicated with buried via hole 21, so as to reduce first
Thermal stress difference between substrate layer 2 and the second core layer 3, it is to avoid cause substrate layer inclined because of thermal stress difference during pressing
Move or produce high frequency noise, in the same manner using successively pressing, the 3rd substrate layer 4 is because be provided with the 3rd blind hole 41 and the second central layer
Second blind hole 32 of layer 3 is communicated, and tetrabasal layer 5 is provided with the 5th blind hole 51 and is communicated with the 4th blind hole 42 of the 3rd blind hole 41,
So as to reducing the thermal stress difference between core layer and each substrate layer or between substrate layer and substrate layer, it is to avoid during pressing because
Cause substrate layer skew for thermal stress difference or produce high frequency noise.
In this example, the thickness of the second core layer 3 is set to 50um, and after successively pressing, the thickness of combined pressure layer 1 can be with
390～410um is controlled to, number of plies height, the requirement of thickness of thin is realized.
Embodiment two, with reference to shown in Fig. 2：
Difference with embodiment one is, in the present embodiment, it is anti-that circuit board is provided with the first fool proof group 7 and second
Slow-witted group 8, the first fool proof group 7 is arranged at circuit board left side edge, and the second fool proof group 8 is arranged at circuit board right side edge,
Wherein, the first fool proof group 7 is set to two fool proof holes, and the second fool proof group 8 is set to three fool proof holes.
In this example, because the fool proof hole of each fool proof group arranges quantity and differs, in installation or the course of processing, if circuit
Board position is misplaced, then the fool proof hole of fool proof group can be caused inconsistent with the mounting post quantity of installation site, so as to install, because
This is avoided the phenomenon that circuit board position is misplaced.
Above-described embodiment is only that ultimate principle of the present utility model, principal character and advantage has been shown and described.The industry
Technical staff it should be appreciated that this utility model is not restricted to the described embodiments, described in above-described embodiment and description
Principle of the present utility model is illustrated simply, on the premise of without departing from this utility model spirit and scope, this utility model can also
There are various changes and modifications, these changes and improvements both fall within claimed this utility model scope.
Claims (6)
1. a kind of to press circuit board, the circuit board includes combined pressure layer (1), and combined pressure layer (1) lower surface is provided with organic mould
Layer (6), it is characterised in that：Combined pressure layer (1) from top to bottom include successively tetrabasal layer (5), the 3rd substrate layer (4),
Second core layer (3), first substrate layer (2), the second core layer (3), the 3rd substrate layer (4), tetrabasal layer (5), described
Adhesive layer (11), the 3rd substrate layer (4) and the second core layer is provided between tetrabasal layer (5) and the 3rd substrate layer (4)
(3) adhesive layer (11) is provided between, is provided with adhesive layer (11) between the second core layer (3) and first substrate layer (2),
First substrate layer (2) be provided with some buried via holes (21), and the second core layer (3) are provided with some first blind holes
(31), some second blind hole (32), the first blind hole (31) are communicated with buried via hole (21), and the 3rd substrate layer (4) is provided with
Some 3rd blind holes (41), some 4th blind holes (42), the 3rd blind hole (41) are communicated with the second blind hole (32), and the described 4th
Substrate layer (5) is provided with some 5th blind holes (51), and the 5th blind hole (51) is communicated with the 4th blind hole (42).
2. one kind according to claim 1 presses circuit board, it is characterised in that：Buried via hole (21) are set to two, should
Buried via hole (21) is arranged in the middle part of first substrate layer (2), and corresponding first blind hole (31) are set to two, second blind hole
(32) two are set to, second blind hole (32) is arranged at the first blind hole (31) both sides, corresponding 3rd blind hole (41) sets
Two are set to, the 4th blind hole (42) is set to two, the 4th blind hole (42) is arranged at the 3rd blind hole (41) both sides, accordingly
The 5th blind hole (51) be set to two.
3. one kind according to claim 1 presses circuit board, it is characterised in that：The thickness of the second core layer (3) sets
It is set to 50um.
4. one kind according to claim 1 presses circuit board, it is characterised in that：The thickness of combined pressure layer (1) is set to
390～410um.
5. one kind according to claim 1 presses circuit board, it is characterised in that：The circuit board is provided with the first fool proof group
(7) and the second fool proof group (8), the first fool proof group (7) are arranged at circuit board left side edge, the second fool proof group (8)
It is arranged at circuit board right side edge.
6. one kind according to claim 5 presses circuit board, it is characterised in that：First fool proof group (7) are set to two
Individual fool proof hole (9), the second fool proof group (8) are set to three fool proof holes (9).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621066376.3U CN206042520U (en) | 2016-09-20 | 2016-09-20 | Pressfitting circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621066376.3U CN206042520U (en) | 2016-09-20 | 2016-09-20 | Pressfitting circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN206042520U true CN206042520U (en) | 2017-03-22 |
Family
ID=58295957
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201621066376.3U Expired - Fee Related CN206042520U (en) | 2016-09-20 | 2016-09-20 | Pressfitting circuit board |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN206042520U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112242476A (en) * | 2019-07-16 | 2021-01-19 | 佛山市国星光电股份有限公司 | LED display unit group and display panel |
| CN116504771A (en) * | 2023-06-27 | 2023-07-28 | 长春希达电子技术有限公司 | Micro-LED driving panel and preparation method thereof |
-
2016
- 2016-09-20 CN CN201621066376.3U patent/CN206042520U/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112242476A (en) * | 2019-07-16 | 2021-01-19 | 佛山市国星光电股份有限公司 | LED display unit group and display panel |
| CN112242476B (en) * | 2019-07-16 | 2022-03-18 | 佛山市国星光电股份有限公司 | LED display unit group and display panel |
| CN116504771A (en) * | 2023-06-27 | 2023-07-28 | 长春希达电子技术有限公司 | Micro-LED driving panel and preparation method thereof |
| CN116504771B (en) * | 2023-06-27 | 2023-12-08 | 长春希达电子技术有限公司 | Micro-LED driving panel and preparation method thereof |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20170322 Termination date: 20200920 |