CN205863166U - Semi-conductor test structure - Google Patents

Semi-conductor test structure Download PDF

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Publication number
CN205863166U
CN205863166U CN201620826110.8U CN201620826110U CN205863166U CN 205863166 U CN205863166 U CN 205863166U CN 201620826110 U CN201620826110 U CN 201620826110U CN 205863166 U CN205863166 U CN 205863166U
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Prior art keywords
weld pad
semi
electro
migration
test structure
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CN201620826110.8U
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Chinese (zh)
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赵祥富
杨莉娟
宋永梁
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Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
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Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
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Abstract

This utility model provides a kind of semi-conductor test structure, including: weld pad group, including multiple weld pads being intervally arranged;Stress migration test unit, around weld pad group, and two ends are connected with two adjacent weld pads respectively;Electro-migration testing unit, between weld pad group and stress migration test unit, and is connected with weld pad idle in weld pad group by four-end method.Semi-conductor test structure of the present utility model will not take the valuable area on wafer more, improves the utilization rate of wafer, and will not increase corresponding cost of manufacture;When electro-migration testing unit is consistent with the baking temperature of stress migration test unit, electro-migration testing and stress migration test can be carried out simultaneously, decrease the quantity of the wafer needing test, reduce testing cost;Microcrack under the high-temperature baking in electro-migration testing can be detected and may become the false inefficacy causing greatly electro-migration testing, reject the inefficacy that non-electromigration causes, improve the effectiveness of electro-migration testing.

Description

Semi-conductor test structure
Technical field
This utility model relates to a kind of semiconductor process technique field, particularly relates to a kind of semi-conductor test structure.
Background technology
In semiconductor test technique, electromigration (Electmigration, EM) test is that one of which is requisite Test event.Before electro-migration testing, firstly, it is necessary to cut the wafer completing technique to obtain testing core used Sheet;Secondly, by chip bonding to supporting on substrate;Finally again chip is tested.But, for 28nm and following elder generation thereof For entering the rear end low k material of technique, under the outside bigger stress effects such as cutting, easily cause fracture or layering, thus cause Electro-migration testing structure cannot normally work, and this is that these are fine owing to can produce microcrack (crack) in cutting process Crackle can strengthen under high temperature (200 DEG C~the 350 DEG C) baking in electro-migration testing and cause fracture or layering, thus causes electricity to move Move test failure, cause die young false morning.
In order to solve the problems referred to above, a kind of existing method is for providing the semiconductor test knot of a kind of new reliability testing Structure, includes electro-migration testing structure and stress migration (Stree Migration) test simultaneously in described semi-conductor test structure Structure.But in existing semi-conductor test structure, divide between described electro-migration testing structure and described stress migration test structure From setting, each described electro-migration testing structure needs 7 weld pads to draw connection, and described stress migration test structure is arranged at separately Between outer two weld pads.Described electro-migration testing structure is separately positioned with described stress migration test structure so that must use More weld pad is drawn, and takies valuable area more on wafer;Meanwhile, described stress test structure be arranged at two weld pads it Between, the region of test fracture or layering is limited, can not find out the bad product of electro-migration testing completely.
In consideration of it, be necessary to design a kind of new semi-conductor test structure in order to solve above-mentioned technical problem.
Utility model content
The shortcoming of prior art in view of the above, the purpose of this utility model is to provide a kind of semiconductor test knot Structure, for solving in prior art, owing to migration test structure is separately positioned with stress migration test structure, making of causing must More weld pad must be used to draw, the problem taking valuable area more on wafer, and owing to stress test structure is arranged at The test fracture caused between two weld pads or the region of layering are limited, can not find out the bad product of electro-migration testing completely The problem of product.
For achieving the above object and other relevant purposes, this utility model provides a kind of semi-conductor test structure, and described half Conductor test structure includes: weld pad group, described weld pad group includes multiple weld pad being intervally arranged;
Stress migration test unit, described stress migration test cell rings is around described weld pad group, and two ends are respectively with adjacent Two described in weld pad be connected;
Electro-migration testing unit, described electro-migration testing unit is positioned at described weld pad group and described stress migration test unit Between, and be connected with described weld pad idle in described weld pad group by four-end method.
As a kind of preferred version of semi-conductor test structure of the present utility model, described stress migration test unit includes Multiple stack architectures being intervally arranged;
Described stack architecture includes the metal level that multilamellar is stacked up and down, is connected by metal plug between adjacent metal Connect;And the described stack architecture stack architecture adjacent with being positioned at its side is connected by bottom metal layer, and it is positioned at its another The adjacent stack architecture in side is connected by top layer metallic layer.
As a kind of preferred version of semi-conductor test structure of the present utility model, it is provided with interlayer between described metal level and is situated between Matter layer, described metal plug runs through described interlayer dielectric layer up and down.
As a kind of preferred version of semi-conductor test structure of the present utility model, the two of described stress migration test unit End is connected with described weld pad by bottom metal layer.
As a kind of preferred version of semi-conductor test structure of the present utility model, described weld pad group includes: be arranged in order The first weld pad, the second weld pad, the 3rd weld pad, the 4th weld pad, the 5th weld pad, the 6th weld pad and the 7th weld pad;Described stress moves The two ends moving test cell are connected with weld pad described in the two of arbitrary neighborhood respectively.
As a kind of preferred version of semi-conductor test structure of the present utility model, described first weld pad, described second weldering Pad, described 3rd weld pad, described 4th weld pad, described 5th weld pad, described 6th weld pad and described 7th weld pad are in " one " word Type is intervally arranged.
As a kind of preferred version of semi-conductor test structure of the present utility model, the one of described stress migration test unit End is connected with described 3rd weld pad, and the other end is connected with described 4th weld pad.
As a kind of preferred version of semi-conductor test structure of the present utility model, described electro-migration testing unit passes through four Hold-carrying is connected with described first weld pad, described second weld pad, described 5th weld pad and described 6th weld pad.
As it has been described above, semi-conductor test structure of the present utility model, have the advantages that
Semi-conductor test structure the most of the present utility model is equivalent to the equivalent of electro-migration testing structure in the prior art Being additionally arranged a stress migration test structure in area, whole semi-conductor test structure will not take the valuable face on wafer more Long-pending, improve the utilization rate of wafer, and corresponding cost of manufacture will not be increased;
2., when electro-migration testing unit is consistent with the baking temperature of stress migration test unit, electricity can be carried out simultaneously move Move test and stress migration test, decrease the quantity of the wafer needing test, reduce testing cost;
3. microcrack under the high-temperature baking in electro-migration testing can be detected and change electro-migration testing may be caused greatly False inefficacy, reject the inefficacy that non-electromigration causes, improve the effectiveness of electro-migration testing.
Accompanying drawing explanation
Fig. 1 is shown as the top view of semi-conductor test structure of the present utility model.
Fig. 2 is shown as the Fig. 1 sectional view along AA ' direction.
Element numbers explanation
1 weld pad group
11 first weld pads
12 second weld pads
13 the 3rd weld pads
14 the 4th weld pads
15 the 5th weld pads
16 the 6th weld pads
17 the 7th weld pads
2 stress migration test unit
21 stack architectures
211 metal levels
212 metal plugs
22 bottom metal layers
23 top layer metallic layers
3 electro-migration testing unit
Detailed description of the invention
Below by way of specific instantiation, embodiment of the present utility model being described, those skilled in the art can be by this theory Content disclosed by bright book understands other advantages of the present utility model and effect easily.This utility model can also be by additionally Different detailed description of the invention is carried out or applies, the every details in this specification can also based on different viewpoints with should With, under without departing from spirit of the present utility model, carry out various modification or change.
Refer to Fig. 1 to Fig. 2.It should be clear that structure depicted in this specification institute accompanying drawings, ratio, size etc., the most only in order to Coordinate the content disclosed in description, understand for those skilled in the art and read, being not limited to this utility model Enforceable qualifications, therefore do not have technical essential meaning, the modification of any structure, the change of proportionate relationship or size Adjust, under not affecting effect that this utility model can be generated by and the purpose that can reach, all should still fall at this utility model In the range of disclosed technology contents obtains and can contain.Meanwhile, in this specification cited as " on ", D score, " left ", The term of " right ", " middle " and " one " etc., is merely convenient to understanding of narration, and it is enforceable to be not used to limit this utility model Scope, being altered or modified of its relativeness, changing under technology contents without essence, enforceable when being also considered as this utility model Category.
Referring to Fig. 1, this utility model provides a kind of semi-conductor test structure, and described semi-conductor test structure includes: weldering Pad group 1, described weld pad group 1 includes multiple weld pad being intervally arranged;Stress migration test unit 2, described stress migration test list Unit 2 is around described weld pad group 1, and two ends are connected with weld pad described in adjacent two respectively;Electro-migration testing unit 3, described electricity Migration test cell 3 is between described weld pad group 1 and described stress migration test unit 2, and passes through four-end method and described weldering Described weld pad idle in pad group 1 is connected.
As example, referring to Fig. 2, described stress migration test unit 2 includes multiple stack architecture 21 being intervally arranged; Described stack architecture 21 includes the metal level 211 that multilamellar is stacked up and down, by metal plug 212 phase between adjacent metal 211 Connect;And described stack architecture 21 stack architecture 21 adjacent with being positioned at its side is connected, with position by bottom metal layer 22 The stack architecture 21 adjacent in its opposite side is connected by top layer metallic layer 23.Multiple described stack architectures 21 are by the described end Layer metal level 22 or described top layer metallic layer 23 phase concatenation, constitute the chain structure around described weld pad group 1.
As example, between neighbouring described metal level 211, it is spaced certain spacing, and neighbouring described metal level Interlayer dielectric layer (not shown) it is provided with, to be dielectrically separated from by neighbouring described metal level 211 between 211;Described metal is inserted Plug about 212 runs through described interlayer dielectric layer, to guarantee that neighbouring described metal level 211 can pass through described metal plug 212 are connected.
As example, the two ends of described stress migration test unit 2 can by but be not limited only to bottom metal layer 22 with Described weld pad is connected.
As example, the quantity of the described weld pad that described weld pad group 1 includes can set, preferably according to actual needs Ground, in the present embodiment, described weld pad group 1 includes that 7 described weld pads, the most described weld pad group 1 include: the first weldering being arranged in order Pad the 11, second weld pad the 12, the 3rd weld pad the 13, the 4th weld pad the 14, the 5th weld pad the 15, the 6th weld pad 16 and the 7th weld pad 17;Described The two ends of stress migration test unit 2 are connected with weld pad described in the two of arbitrary neighborhood respectively.In one example, described stress moves The one end moving test cell 2 is connected with described 3rd weld pad 13, and the other end is connected with described 4th weld pad 14;Described electricity moves Move test cell 3 by four-end method and described first weld pad 11, described second weld pad 12, described 5th weld pad 15 and the described 6th Weld pad 16 is connected, as shown in Figure 1.Certainly, in other examples, described stress migration test unit 2 and described electromigration are surveyed The weld pad that examination unit 3 is connected can select according to actual needs, it is not limited to the restriction of above-mentioned example;But the most such as What selects, it is necessary to ensure that the two ends of described stress migration test unit 2 are connected with weld pad described in adjacent two respectively, and described The weld pad that electro-migration testing unit 3 is connected is the weld pad being not connected with described stress migration test unit 2.
As example, described first weld pad 11, described second weld pad 12, described 3rd weld pad 13, described 4th weld pad 14, Described 5th weld pad 15, described 6th weld pad 16 and described 7th weld pad 17 can be actually needed and present different arrangement sides Formula, it is preferable that in the present embodiment, described first weld pad 11, described second weld pad 12, described 3rd weld pad 13, described 4th weldering Pad 14, described 5th weld pad 15, described 6th weld pad 16 and described 7th weld pad 17 are intervally arranged in " one " font.
Semi-conductor test structure of the present utility model is by being arranged about described weldering by described stress migration test unit 2 The annular of pad group 1, and described electro-migration testing unit 3 is arranged at described weld pad group 1 and described stress migration test unit 2 it Between, it is additionally arranged a stress migration test structure in being equivalent to the equivalent area of electro-migration testing structure in the prior art, Whole semi-conductor test structure will not take the valuable area on wafer more, improves the utilization rate of wafer, and will not increase phase The cost of manufacture answered;Together with described stress migration test unit 2 is designed with described electro-migration testing unit 3, answer when described Power migrate test cell 2 consistent with the baking temperature of described electro-migration testing unit 3 time, can carry out simultaneously electro-migration testing and Stress migration test, decreases the quantity of the wafer needing test, reduces testing cost;Described semi-conductor test structure is permissible Detect microcrack under the high-temperature baking in electro-migration testing and may become the false inefficacy causing greatly electro-migration testing, reject The inefficacy that non-electromigration causes, improves the effectiveness of electro-migration testing.
In sum, this utility model provides a kind of semi-conductor test structure, and described semi-conductor test structure includes: weld pad Group, described weld pad group includes multiple weld pad being intervally arranged;Stress migration test unit, described stress migration test cell rings around Described weld pad group, and two ends are connected with weld pad described in adjacent two respectively;Electro-migration testing unit, described electro-migration testing list Unit is between described weld pad group and described stress migration test unit, and passes through the institute that four-end method is idle with described weld pad group State weld pad to be connected.Semi-conductor test structure of the present utility model be equivalent to electro-migration testing structure in the prior art etc. With being additionally arranged a stress migration test structure in area, whole semi-conductor test structure will not take the valuable face on wafer more Long-pending, improve the utilization rate of wafer, and corresponding cost of manufacture will not be increased;At electro-migration testing unit and stress migration test When the baking temperature of unit is consistent, electro-migration testing and stress migration test can be carried out simultaneously, decrease the crystalline substance needing test The quantity of sheet, reduces testing cost;Microcrack under the high-temperature baking in electro-migration testing can be detected and may become big Cause the false inefficacy of electro-migration testing, reject the inefficacy that non-electromigration causes, improve the effectiveness of electro-migration testing.
Above-described embodiment only illustrative principle of the present utility model and effect thereof are new not for limiting this practicality Type.Above-described embodiment all can be carried out by any person skilled in the art under spirit and the scope of the present utility model Modify or change.Therefore, art has usually intellectual such as without departing from the essence disclosed in this utility model All equivalences completed under god and technological thought are modified or change, and must be contained by claim of the present utility model.

Claims (8)

1. a semi-conductor test structure, it is characterised in that described semi-conductor test structure includes:
Weld pad group, described weld pad group includes multiple weld pad being intervally arranged;
Stress migration test unit, described stress migration test cell rings is around described weld pad group, and two ends are respectively with adjacent two Described weld pad is connected;
Electro-migration testing unit, described electro-migration testing unit be positioned at described weld pad group and described stress migration test unit it Between, and be connected with described weld pad idle in described weld pad group by four-end method.
Semi-conductor test structure the most according to claim 1, it is characterised in that: described stress migration test unit includes many The individual stack architecture being intervally arranged;
Described stack architecture includes the metal level that multilamellar is stacked up and down, is connected by metal plug between adjacent metal;
And the described stack architecture stack architecture adjacent with being positioned at its side is connected by bottom metal layer, and it is positioned at its another The adjacent stack architecture in side is connected by top layer metallic layer.
Semi-conductor test structure the most according to claim 2, it is characterised in that: it is provided with inter-level dielectric between described metal level Layer, described metal plug runs through described interlayer dielectric layer up and down.
Semi-conductor test structure the most according to claim 2, it is characterised in that: the two ends of described stress migration test unit It is connected with described weld pad by bottom metal layer.
Semi-conductor test structure the most according to any one of claim 1 to 4, it is characterised in that: described weld pad group includes: The first weld pad, the second weld pad, the 3rd weld pad, the 4th weld pad, the 5th weld pad, the 6th weld pad and the 7th weld pad being arranged in order;
The two ends of described stress migration test unit are connected with weld pad described in the two of arbitrary neighborhood respectively.
Semi-conductor test structure the most according to claim 5, it is characterised in that: described first weld pad, described second weld pad, Between described 3rd weld pad, described 4th weld pad, described 5th weld pad, described 6th weld pad and described 7th weld pad are in " one " font Every arrangement.
Semi-conductor test structure the most according to claim 5, it is characterised in that: one end of described stress migration test unit Being connected with described 3rd weld pad, the other end is connected with described 4th weld pad.
Semi-conductor test structure the most according to claim 7, it is characterised in that: described electro-migration testing unit passes through four ends Method is connected with described first weld pad, described second weld pad, described 5th weld pad and described 6th weld pad.
CN201620826110.8U 2016-08-01 2016-08-01 Semi-conductor test structure Active CN205863166U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111007387A (en) * 2019-12-07 2020-04-14 苏州容启传感器科技有限公司 Test chip and integration method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111007387A (en) * 2019-12-07 2020-04-14 苏州容启传感器科技有限公司 Test chip and integration method

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