CN205656854U - Local word line driver control circuit of low electric leakage - Google Patents

Local word line driver control circuit of low electric leakage Download PDF

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Publication number
CN205656854U
CN205656854U CN201620269270.7U CN201620269270U CN205656854U CN 205656854 U CN205656854 U CN 205656854U CN 201620269270 U CN201620269270 U CN 201620269270U CN 205656854 U CN205656854 U CN 205656854U
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China
Prior art keywords
word line
signal
field effect
effect transistor
type field
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Withdrawn - After Issue
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CN201620269270.7U
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Chinese (zh)
Inventor
熊保玉
段会福
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Xian Unilc Semiconductors Co Ltd
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Xian Unilc Semiconductors Co Ltd
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Abstract

The utility model relates to a local word line driver control circuit of low electric leakage, it is including connecting gradually the delay element who is used for controlling local word line driver, control circuit and output driver, major word line enable signal word line reset signal is connected to delay element's input makes ability, output connection control circuit input end, the control circuit input still connect major word line enable signal word line reset signal make can with decoded signal in advance, output driver is used for driving local word line driver, and it comprises two P type field effect transistor and a N type field effect transistor, control circuit's output is arranged in controlling output driver N type field effect transistor and P type field effect transistor switches on and turn -offs. When it dashed electricity operation beginning at dynamic RAM) in advance, major word line enable signal and word line restored to the throne enable signal by high step -down, local word line driver N type field effect transistor is in the linear zone when the standby, its electric leakage electric current is directly proportional rather than crossing driving voltage.

Description

A kind of local word line driver control circuit of Low dark curient
Technical field
This utility model relates to dynamic RAM design field, the local word line driver control circuit of a kind of Low dark curient.
Background technology
Along with smart mobile phone, mobile Internet application and the fast development of Internet of Things, increasing application operates on mobile phone terminal, this also means that and needs to consume more power consumption.But the development of battery does not the most obtain surging progress, the once charging use time of mobile phone terminal is by the restricting of capacity of battery.The power consumption of mobile phone terminal system includes dynamic power consumption and stand-by power consumption, and due to mobile phone in the most of the time all in holding state, therefore stand-by power consumption uses the time to have tremendous influence for the once charging of mobile phone.
Dynamic RAM has the biggest impact as component units requisite in mobile phone terminal, its stand-by power consumption for the stand-by power consumption of whole mobile phone terminal system.Dynamic RAM activates and cuts out wordline by local word line driver, thus realizes the activation to storage array and precharge operation.When dynamic RAM is in holding state, local word line driver is off state.Its leakage current is directly proportional to the overdrive voltage being carried on transistor.Traditional local word line driver is in order to obtain the most pre-punching electricity time delay, and the overdrive voltage of usual transistor is the highest, and therefore leakage current is the biggest.Due to local word line driver substantial amounts, its leakage current summation is considerable.So on the basis of not affecting pre-punching electricity time delay, the leakage current reducing local wordline driving is significantly.
Utility model content
For problems of the prior art, this utility model provides the local word line driver control circuit of a kind of Low dark curient, it is possible on the premise of not reducing and rushing electrically operated time delay in advance, reduce the leakage current of local word line driver.
This utility model is to be achieved through the following technical solutions:
The local word line driver control circuit of a kind of Low dark curient, including the delay unit being sequentially connected with for controlling local word line driver, control circuit and output driver;The input of described delay unit connects main word line and enables signal/word line reset signal enable, and outfan connects control circuit input;Described control circuit input is also connected with main word line and enables signal/word line reset signal enable and pre-decode signal;Described output driver is used for driving local word line driver, and it is made up of two p-type field effect transistor and a N-type field effect transistor;One of them p-type field effect transistor source connects builtin voltage, and another p-type field effect transistor source connects forward charge pump voltage, and N-type field effect transistor source connects negative sense wordline low-voltage;The grid end of two p-type field effect transistor and a N-type field effect transistor connects control circuit outfan respectively, and drain terminal all passes through main word line inverted burst signal/word line reset pulse signal and connects local word line driver input;The output of control circuit is used for controlling N-type field effect transistor and p-type field effect transistor in output driver and turns on and turn off.
Preferably, described delay unit is made up of chain of inverters, and its time delay is the rising edge propagation delay to local word-line signal trailing edge of word line reset signal.
Preferably, described control circuit is made up of basic logical gate;Control main word line inverted burst signal/word line reset pulse signal by controlling output driver, thus control being switched on and off of the device of local wordline driving;When at holding state, main word line inverted burst signal/word line reset pulse signal is builtin voltage;When at activation manipulation, main word line inverted burst signal/word line reset pulse signal is uprised by low;When rushing electrically operated in advance, main word line inverted burst signal/word line reset pulse signal is by high step-down.
Further, described control circuit includes two inputs or door, first liang of input and door, phase inverter, two input nor gates, two input nand gates and second liang of input and door;The input of two inputs or door connects main word line respectively and enables signal/word line reset signal enable and the outfan of delay unit;First liang of input is connected two inputs or gate output terminal and row pre-decode signal respectively with two inputs of door;Outfan connects source in output driver and connects the grid end of the p-type field effect transistor of builtin voltage;One inverted device of input of two input nor gates connects the outfan of delay unit, and another input connects main word line and enables signal/word line reset signal enable;Two inputs of two input nand gates connect main word line respectively and enable signal/word line reset signal enable and the outfans of two input nor gates;Outfan connects source in output driver and connects the grid end of the p-type field effect transistor of forward charge pump voltage;Second liang of input is connected main word line respectively and enables signal/word line reset signal enable and row pre-decode signal with two inputs of door;Outfan connects the grid end of N-type field effect transistor in output driver.
The local word line driver control circuit of a kind of Low dark curient of this utility model, when dynamic RAM rushes electrically operated beginning in advance, main word line enables signal and word line reset enables signal by high step-down;N-type field effect transistor in output driver is closed by control circuit, and the p-type field effect transistor that source connects forward charge pump voltage is opened, and main word line signal is anti-and word line reset signal is become forward charge pump voltage from negative sense wordline low-voltage, and local wordline turns off rapidly;After the time delay of delay unit, source is connected the p-type field effect transistor of forward charge pump voltage and turns off by control circuit, and the p-type field effect transistor that source connects builtin voltage opens, main word line signal is anti-and word line reset signal is become relatively low builtin voltage from higher forward charge pump voltage;Local word line driver N-type field effect transistor is in linear zone when standby, and its leakage current is directly proportional to its overdrive voltage.
Compared with prior art, this utility model has a following useful technique effect:
This locality word line driver N-type field effect transistor grid step voltage when this utility model is by reducing standby, reduces its overdrive voltage, thus reaches to reduce the purpose of leakage current.In order to prevent the increase of the precharge delay caused owing to using builtin voltage to turn off local word line driver, control similar to traditional local word line driver, when precharge operation starts, main word line signal is anti-and word line reset signal uses forward charge pump voltage by this locality word line driver quick closedown.But after local word line driver is closed, anti-for main word line signal/word line reset signal is reduced to relatively low builtin voltage by higher forward charge pump voltage by local word line driver control circuit, thus on the premise of not affecting precharge delay, reduce the leakage current that local wordline drives.Compared with traditional local word line driver control circuit, this circuit makes local word line driver leakage current decline nearly 60%.
Accompanying drawing explanation
Fig. 1 is the instance graph of the local word line driver described in this utility model example.
Fig. 2 is the local word line driver control circuit figure of a kind of Low dark curient described in this utility model example.
Detailed description of the invention
Below in conjunction with specific embodiment, this utility model is described in further detail, described in be to explanation of the present utility model rather than restriction.
Referring to shown in Fig. 1, Fig. 1 is the example of a local word line driver 140 in dynamic RAM, is made up of a p-type field effect transistor 202 and two N-type field effect transistor 205,206.The source of the first p-type field effect transistor 202 connects word line drive signal 201, and grid end connects main word line signal anti-203, and drain terminal connects local word-line signal 204.First N-type field effect transistor 205 source connects negative sense wordline low-voltage 208, and grid end connects main word line signal anti-203, and drain terminal connects local word-line signal 204.Second N-type field effect transistor 206 source connects negative sense wordline low-voltage 208, and grid end connects wordline reset signal 207, and drain terminal connects local word-line signal 204.
As in figure 2 it is shown, the local word line driver control circuit example that Fig. 2 is a kind of Low dark curient, including the delay unit 100 being sequentially connected with for controlling local word line driver 140, control circuit 110 and output driver 130.
Delay unit 100 input connects main word line and enables signal/word line reset signal enable 101, and output connects delay unit output 102.Delay unit 100 is made up of chain of inverters, and its time delay is determined by the propagation delay of the rising edge of word line reset signal 203 in word line driver 140 local in Fig. 1 to the trailing edge of local word-line signal 204.The function of this delay unit is, when dynamic RAM precharge operation, produce, by control circuit in Fig. 2 110, main word line inverted burst signal/word line reset pulse signal 135 that voltage is forward charge pump voltage 131, rapidly switch off local wordline 204 in Fig. 1.
Control circuit 110 includes two inputs or door 111, first liang of input and door 112, phase inverter 113, two input nor gates 114, two input nand gates 115, second liang of input and door 116.One input of two inputs or door 111 connects main word line and enables signal/word line reset signal enable 101, and another input connects delay unit 100 output signal 102, output signal P2 120.First liang of input is connected signal P2 120 with an input of door 112, and another input connects row pre-decode signal 103, and output connects signal PSET2 121.Phase inverter 113 input connects delay unit 100 output signal 102, output signal D1 122.One input of two input nor gates 114 connects signal D1 122, and another input connection main word line enables signal/word line reset signal and enables 101, output signal P1 123.One input of two input nand gates 115 connects main word line and enables signal/word line reset signal enable 101, and another input connects signal P1 123, output signal PSET1 124.Second liang of input is connected main word line with an input of door 116 and enables signal/word line reset signal enable 101, and another input connects row pre-decode signal 103, output signal NSET 125.Its function is, in the different phase of dynamic RAM operation, controls main word line inverted burst signal/word line reset pulse signal 135 by controlling output driver 130, thus controls being switched on and off of the device 140 of local wordline driving.
When holding state, it is low owing to main word line enable signal/word line reset signal to enable 101, in output driver 130, the grid level of the 3rd p-type field effect transistor 134 that source connects builtin voltage 132 is low, therefore main word line inverted burst signal/word line reset pulse signal 135 is builtin voltage, local word line driver is off state, and local wordline is maintained at negative sense wordline low-voltage.
Output driver 130 includes second and third p-type field effect transistor 133,134, the 3rd N-type field effect transistor 136.Second p-type field effect transistor 133 source connects forward charge pump voltage 131, grid termination signal PSET1 124, drain terminal connect main word line signal anti-/ word line reset signal 135.3rd p-type field effect transistor 134 source connects builtin voltage 132, grid termination signal PSET2 121, drain terminal connect main word line signal anti-/ word line reset signal 135.3rd N-type field effect transistor 136 source connects negative sense wordline low-voltage 137, grid termination signal NSET 125, drain terminal connect main word line signal anti-/ word line reset signal 135.Its function is, different phase in dynamic RAM operation, control p-type and the grid end of N-type field effect transistor in output driver by control circuit, control main word line signal anti-/ level of word line reset signal, thus control being switched on and off of local word line driver 140.
This utility model is when activation manipulation, and main word line enables signal/word line reset enable 101 and uprised by low.
For not selected main word line signal/word line reset signal 101, owing to row pre-decode is low, therefore in output driver 130, the grid level of the 3rd p-type field effect transistor 134 that source connects builtin voltage 132 is low, main word line signal is anti-/ and to enable 101 be builtin voltage 132 to word line reset, local word line driver 140 is off state, and local wordline is maintained at negative sense wordline low-voltage 137.
101 are enabled for selected main word line signal/word line reset, owing to row pre-decode is high, therefore in output driver 130, the grid level of the 3rd p-type field effect transistor 134 that source connects builtin voltage 132 is high, the grid level of the 3rd N-type field effect transistor 136 is high, main word line signal is anti-/ and word line reset enables 101 and become negative sense wordline low-voltage 137 from builtin voltage 132, thus open the first p-type field effect transistor 202 in local word line driver 140, local word line driver 140 is opened, and local wordline is drawn high forward charge pump voltage 131 by word line drive signal.
When rushing electrically operated in advance, main word line enables signal/word line reset and enables 101 by high step-down.The 3rd N-type field effect transistor 136 in output driver 130 is closed by control circuit 110, source connects the 3rd p-type field effect transistor of forward charge pump voltage 132 and opens, main word line signal is anti-/ and word line reset enables 101 and become forward charge pump voltage 131 from negative sense wordline low-voltage 137, and local wordline turns off rapidly.After the time delay of a delay unit 100, source is connected the second p-type field effect transistor 133 of forward charge pump voltage 131 and turns off by control circuit 110, and the 3rd p-type field effect transistor 134 that source connects builtin voltage 132 opens, main word line signal is anti-and word line reset enable 101 is become relatively low builtin voltage 132 from higher forward charge pump voltage 131.

Claims (4)

1. the local word line driver control circuit of a Low dark curient, it is characterized in that, including the delay unit (100) being sequentially connected with for controlling local word line driver (140), control circuit (110) and output driver (130);
The input of described delay unit (100) connects main word line and enables signal/word line reset signal enable (101), and outfan connects control circuit (110) input;
Described control circuit (110) input is also connected with main word line and enables signal/word line reset signal enable (101) and pre-decode signal (103);
Described output driver (130) is used for driving local word line driver (140), and it is made up of two p-type field effect transistor and a N-type field effect transistor;One of them p-type field effect transistor source connects builtin voltage (132), and another p-type field effect transistor source connects forward charge pump voltage (131), and N-type field effect transistor source connects negative sense wordline low-voltage (137);The grid end of two p-type field effect transistor and a N-type field effect transistor connects control circuit outfan respectively, and drain terminal all passes through main word line inverted burst signal/word line reset pulse signal (135) and connects local word line driver (140) input;
The output of control circuit (110) is used for controlling N-type field effect transistor and p-type field effect transistor in output driver (130) and turns on and turn off.
The local word line driver control circuit of a kind of Low dark curient the most according to claim 1, it is characterized in that, described delay unit (100) is made up of chain of inverters, and its time delay is the rising edge propagation delay to local word-line signal trailing edge of word line reset signal.
The local word line driver control circuit of a kind of Low dark curient the most according to claim 1, it is characterised in that described control circuit is made up of basic logical gate;Control main word line inverted burst signal/word line reset pulse signal (135) by controlling output driver (130), thus control being switched on and off of the device of local wordline driving;
When at holding state, main word line inverted burst signal/word line reset pulse signal (135) is builtin voltage;When at activation manipulation, main word line inverted burst signal/word line reset pulse signal (135) is uprised by low;When rushing electrically operated in advance, main word line inverted burst signal/word line reset pulse signal (135) is by high step-down.
The local word line driver control circuit of a kind of Low dark curient the most according to claim 3, it is characterized in that, described control circuit (110) includes two inputs or door (111), first liang of input and door (112), phase inverter (113), two inputs nor gate (114), two input nand gates (115) and second liang of input and door (116);
The input of two inputs or door (111) connects main word line respectively and enables signal/word line reset signal enable (101) and outfan of delay unit (100);
First liang of input is connected two inputs or door (111) outfan and row pre-decode signal (103) respectively with two inputs of door (112);Outfan connects source in output driver (130) and connects the grid end of the p-type field effect transistor of builtin voltage (132);
One the inverted device of input (113) of two inputs nor gate (114) connects the outfan of delay unit (100), and another input connects main word line and enables signal/word line reset signal enable (101);
Two inputs of two input nand gates (115) connect main word line respectively and enable signal/word line reset signal enable (101) and the outfan of two inputs nor gate (114);Outfan connects source in output driver (130) and connects the grid end of the p-type field effect transistor of forward charge pump voltage (131);
Second liang of input is connected main word line respectively and enables signal/word line reset signal enable (101) and row pre-decode signal (103) with two inputs of door (116);Outfan connects the grid end of N-type field effect transistor in output driver (130).
CN201620269270.7U 2016-03-31 2016-03-31 Local word line driver control circuit of low electric leakage Withdrawn - After Issue CN205656854U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Application Number Priority Date Filing Date Title
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105895146A (en) * 2016-03-31 2016-08-24 西安紫光国芯半导体有限公司 Low-current-leakage local word line driver control circuit and control method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105895146A (en) * 2016-03-31 2016-08-24 西安紫光国芯半导体有限公司 Low-current-leakage local word line driver control circuit and control method
CN105895146B (en) * 2016-03-31 2019-01-15 西安紫光国芯半导体有限公司 A kind of local word line driver control circuit and control method of Low dark curient

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Granted publication date: 20161019

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