CN205645856U - Formal dress gaN LED chip - Google Patents
Formal dress gaN LED chip Download PDFInfo
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- CN205645856U CN205645856U CN201620282725.9U CN201620282725U CN205645856U CN 205645856 U CN205645856 U CN 205645856U CN 201620282725 U CN201620282725 U CN 201620282725U CN 205645856 U CN205645856 U CN 205645856U
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Abstract
The utility model provides a formal dress gaN LED chip, relates to emitting diode LED's production technical field. The substrate with one side each epitaxial layer and transparent conducting film in proper order, the current barrier layer, arrange the P electrode that P electrode and P electrode are connected respectively and expand the strip on the current barrier layer, arrange the N electrode that N electrode and N electrode are connected respectively and expand the strip on the current barrier layer, in P electrode extension strip below, inject the pore into from a plurality of P electrodes of current barrier layer to transparent conducting film distribution, in N electrode extension strip below, from current barrier layer to N the gaN layer a plurality of N electrode outflow pore of distribution. Under the chip of same size, the utility model discloses the light -emitting area that can increase effectively reduces with the current density under the drive current, reduces the droop effect to reach reduced voltage, promote the purpose of luminance.
Description
Technical field
This utility model relates to the production technical field of LED.
Background technology
Existing formal dress GaN LED is provided with current barrier layer (CBL) below P-electrode and electrode extension bar so that the effective SQW below current barrier layer can not effectively be excited because lacking electric current injection;N-electrode and electrode extension bar entirety are directly contacted with N-GaN so that effective SQW of N-electrode and extension bar present position cannot be used effectively by ICP etching;And the industrialized production of routine needs point MESA, CB, ITO, Pad and PV five step photoetching process, increases production procedure and cost.
Utility model content
This utility model purpose is to propose a kind of formal dress GaN LED chip that can promote brightness under conditions of reducing voltage.
This utility model includes substrate, U-GaN layer, N-GaN layer, quantum well layer, P-GaN layer, transparency conducting layer and current barrier layer is set gradually in the same side of substrate, current barrier layer is respectively arranged the P electrode extension bar that P electrode is connected with P electrode, current barrier layer is respectively arranged the N electrode extension bar that N electrode is connected with N electrode, it is characterized in that: below P electrode extension bar, it is distributed some P electrode injector tunnels from current barrier layer to transparency conducting layer, below N electrode extension bar, it is distributed some N electrode from current barrier layer to N-GaN layer and flows out duct.
Being provided with P electrode injector tunnel below each electrode extension layer due to this utility model and N electrode flows out duct, the effective SQW below P electrode and N electrode can be used effectively, by coating transparency conducting layer to increase current spread above effective SQW.Under the chip of same size, the light-emitting area that this utility model can increase effectively, reduces with the electric current density driven under electric current, reduces droop effect, thus reduce voltage, promote the purpose of brightness.
This utility model another object is that the manufacture method proposing above product.
First be formed epitaxially one after the other U-GaN layer, N-GaN layer, quantum well layer, P-GaN layer in the same side of substrate, then on P-GaN layer, evaporation forms transparency conducting layer, it is characterised in that further comprising the steps of:
Make on the transparency conducting layer in region at N electrode extension bar, transparency conducting layer etch respectively to N-GaN layer and forms some equally distributed N electrode outflow duct;
Evaporation forms current barrier layer over transparent conductive layer;
Make on the current barrier layer in region at P electrode extension bar, current barrier layer etch respectively to transparency conducting layer and form some equally distributed P electrode injector tunnels;
Above-mentioned N electrode is flowed out the current barrier layer above duct and carries out continuity etching;
Produce P electrode and P electrode extension bar, N electrode and N electrode extension bar respectively.
This utility model processing technology is simple, reasonable, convenient, optimizes the production procedure of chip, gold-tinted photo-mask process Zhi Xu tri-road therein, can be substantially reduced cost, beneficially industrialized mass production, and product stability is good.
Accompanying drawing explanation
Fig. 1 is of the present utility model bowing to perspective view.
Fig. 2 to Fig. 4 is manufacturing process figure of the present utility model.
Detailed description of the invention
One, fabrication processing:
Step one, is formed epitaxially one after the other U-GaN layer, N-GaN layer, quantum well layer, P-GaN layer in the same side of substrate, and on P-GaN layer, evaporation forms transparency conducting layer.
Step 2, makes on the transparency conducting layer in region at N electrode extension bar, transparency conducting layer etch respectively to N-GaN layer and forms some equally distributed N electrode and flow out duct, and N electrode flows out duct and can prolong the uniform length of N electrode extension bar and be distributed.The effect formed is as shown in Figure 2.
Step 3, evaporation forms current barrier layer the most over transparent conductive layer, then make on the current barrier layer in region at P electrode extension bar, being etched respectively to transparency conducting layer by current barrier layer and form some equally distributed P electrode injector tunnels, P electrode injector tunnel can be prolonged the length of P electrode extension bar and is all uniformly distributed.
Meanwhile, above-mentioned each N electrode is flowed out the current barrier layer above duct and carry out continuity etching.
The effect formed is as shown in Figure 3.
Step 4, produces P electrode and P electrode extension bar, N electrode and N electrode extension bar respectively.The effect formed is as shown in Figure 4.
Two, product structure feature:
Such as Fig. 1, shown in 4, U-GaN layer 2, N-GaN layer 3, quantum well layer 4, P-GaN layer 5, transparency conducting layer 6 and current barrier layer 7 is set gradually in the same side of substrate 1, current barrier layer 7 is respectively arranged the P electrode extension bar 8 that P electrode is connected with P electrode, current barrier layer 7 is respectively arranged the N electrode extension bar 9 that N electrode is connected with N electrode.
In the lower section of two symmetrical P electrode extension bars 8, each it is uniformly distributed five P electrode injector tunnels 10 from current barrier layer 7 to transparency conducting layer 6.
Below N electrode extension bar, it is uniformly distributed four N electrode from current barrier layer 7 to N-GaN layer 3 and flows out duct 11.
Claims (1)
1. a formal dress GaN LED chip, including substrate, U-GaN layer is set gradually in the same side of substrate, N-GaN layer, quantum well layer, P-GaN layer, transparency conducting layer and current barrier layer, current barrier layer is respectively arranged the P electrode extension bar that P electrode is connected with P electrode, current barrier layer is respectively arranged the N electrode extension bar that N electrode is connected with N electrode, it is characterized in that: below P electrode extension bar, it is distributed some P electrode injector tunnels from current barrier layer to transparency conducting layer, below N electrode extension bar, it is distributed some N electrode from current barrier layer to N-GaN layer and flows out duct.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN201620282725.9U CN205645856U (en) | 2016-04-07 | 2016-04-07 | Formal dress gaN LED chip |
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CN201620282725.9U CN205645856U (en) | 2016-04-07 | 2016-04-07 | Formal dress gaN LED chip |
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CN205645856U true CN205645856U (en) | 2016-10-12 |
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CN201620282725.9U Active CN205645856U (en) | 2016-04-07 | 2016-04-07 | Formal dress gaN LED chip |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105789397A (en) * | 2016-04-07 | 2016-07-20 | 厦门乾照光电股份有限公司 | Face-up GaN LED chip and manufacturing method thereof |
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2016
- 2016-04-07 CN CN201620282725.9U patent/CN205645856U/en active Active
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105789397A (en) * | 2016-04-07 | 2016-07-20 | 厦门乾照光电股份有限公司 | Face-up GaN LED chip and manufacturing method thereof |
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