CN205595333U - Single channel transient voltage inhibitor - Google Patents
Single channel transient voltage inhibitor Download PDFInfo
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- CN205595333U CN205595333U CN201620419138.XU CN201620419138U CN205595333U CN 205595333 U CN205595333 U CN 205595333U CN 201620419138 U CN201620419138 U CN 201620419138U CN 205595333 U CN205595333 U CN 205595333U
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Abstract
The utility model discloses a single channel transient voltage inhibitor. Single channel transient voltage inhibitor includes semiconductor substrate, be located first doped region among the semiconductor substrate, be located the last epitaxial layer of semiconductor substrate, be located isolation region in the epitaxial layer, be located second doped region in the epitaxial layer, be located third doped region in the epitaxial layer, wherein the second doped region centers on third doped region at least partly, and be located fourth doped region in the third doped region, and interconnect structure, will the isolation region with the second doped region is the short circuit each other. Single channel transient voltage inhibitor includes punch through diode, first doped region with the second doped region the third doped region and the conduct respectively of fourth doped region punch through diode's collecting zone, base region and launch site. This single channel transient voltage inhibitor adopts punch through diode to reduce operating voltage to improve the static electricity discharge ability under the high -power.
Description
Technical field
This utility model relates to microelectronics technology, more particularly, to single channel transient voltage
Suppressor.
Background technology
Transient Voltage Suppressor TVS (Transient Voltage Suppressor) is at stabilivolt base
The high-effect circuit brake of development on plinth.The profile of TVS diode is as good as with common stabilivolt,
But, due to special structure and technological design, the transient response speed of TVS diode and surge
Absorbability is far above common stabilivolt.Such as, the response time of TVS diode is only 10-12
Second, and the surge power of the most thousands of watts can be absorbed.Under the conditions of applied in reverse, when bearing
During one high-octane big pulse, the working impedance of TVS diode can quickly be down to extremely low conducting
Value, thus allow big electric current to pass through, meanwhile, by voltage clamp at predeterminated level.Therefore, TVS
Diode can protect the precision components in electronic circuit from the damage of various surge pulse effectively
Bad.
In the Chinese patent application of Application No. CN201420858051.3, disclose a kind of by
Three integrated TVS device formed on a single die of discrete device.As it is shown in figure 1, this TVS
Device includes the first diode D1, the second diode D2 and Zener diode ZD, wherein first
Diode D1 and Zener diode ZD differential concatenation.First diode D1 and Zener diode
Anode connects signal end I/O and earth terminal GND, the negative electrode of the second diode D2 and anode respectively
Connect signal end I/O and earth terminal GND respectively.When surge occurs, if at signal end I/O
And between earth terminal, bear positive voltage, and the numerical value of positive voltage hitting higher than Zener diode ZD
Wear voltage, then produce along the forward of the first diode and the electric current of the reverse flow of Zener diode,
Thus play the effect of ESD protection.If bearing negative voltage between signal end I/O and earth terminal,
The most only second diode D2 forward conduction.
It is unidirectional device in the TVS device shown in Fig. 1, wherein, common commutation diode conduct
The additional capacitor of small capacitances value, connects with Zener diode.The capacitance of this TVS device will depend on
Capacitance in additional capacitor.This TVS device is included in multiple deviding devices integrated in a chip
Part, thus significantly reduce packaging cost, but processing technology is relative complex.Do not considering work
On the premise of skill complexity and cost, it is possible to achieve low electric capacity unidirectional ESD protection function.
But, owing to the characteristic of Zener diode limits, this TVS can not realize low-work voltage.
In Zener diode, if, with highly doped reduction running voltage, then leakage current also can increase.
In order to take into account leakage current and doping content that running voltage needs to control in Zener diode as a result,
The running voltage of Zener diode is usually less than 5V.The restriction of this running voltage also causes TVS
Transient power be restricted so that TVS may not apply in high-power applications.
Therefore, it is desirable to develop novel TVS device, reduce the running voltage of TVS further,
Thus improve high-power under Electro-static Driven Comb ability.
Utility model content
The technical problems to be solved in the utility model is to provide and a kind of uses break-over diode to realize
TVS device.
According to one side of the present utility model, it is provided that a kind of single channel Transient Voltage Suppressor, including:
The Semiconductor substrate of the first doping type；The second doping type being positioned in described Semiconductor substrate
First doped region, wherein the second doping type and the first doping type are contrary；It is positioned at described quasiconductor
The epitaxial layer of the second doping type on substrate；The first doping type being positioned in described epitaxial layer
Isolation area；Second doped region of the second doping type being positioned in described epitaxial layer；Be positioned at described outside
Prolonging the 3rd doped region of the first doping type in layer, wherein said second doped region is around described
Three doped regions at least some of；And the second doping type being positioned in described 3rd doped region
4th doped region；And interconnection structure, by described isolation area and described second doped region short circuit each other,
Wherein, described single channel Transient Voltage Suppressor includes break-over diode, described first doped region and
Described second doped region, described 3rd doped region and described 4th doped region are worn respectively as described
The logical collecting zone of diode, base and launch site.
Preferably, described first doped region and described second doped region are by the institute of described 3rd doped region
Stating and be defined to semiconductor island at least partially, described first doped region is used for limiting described semiconductor island
Bottom, described second doped region is for limiting the sidewall of described semiconductor island.
Preferably, when described break-over diode turns on, current path include described 4th doped region,
Described 3rd doped region, described first doped region and described second doped region, described isolation area, with
And described Semiconductor substrate.
Preferably, also include: the 5th of the second doping type being positioned in described Semiconductor substrate mixes
Miscellaneous district；And the 7th doped region of the first doping type being positioned in described epitaxial layer, wherein, institute
State single channel Transient Voltage Suppressor and also include the first diode, described 7th doped region and described outside
Prolong layer respectively as the anode of described first diode and negative electrode.
Preferably, also include that the second diode, described Semiconductor substrate and described epitaxial layer are made respectively
Anode and negative electrode for described second diode.
Preferably, described single channel Transient Voltage Suppressor has signal end and an earth terminal, and described
The negative electrode of one diode and the launch site of described break-over diode are electrically connected to each other, described one or two pole
The anode of pipe and the collecting zone of described break-over diode connect described signal end and described earth terminal respectively,
The negative electrode of described second diode and anode connect described signal end and described earth terminal respectively.
Preferably, also include the 6th doped region of the second doping type being positioned in described epitaxial layer,
Described 6th doped region is around described 7th doped region, wherein, and described 6th doped region and described the
Four doped region electrical connections.
Preferably, also include the 8th doped region of the second doping type being positioned in described epitaxial layer,
Described 8th doped region is positioned at the region of described second diode, and with described 7th doped region
Electrical connection.
Preferably, described first diode, described second diode and described break-over diode use
Public described Semiconductor substrate.
Preferably, described isolation area limits described first diode, described second diode and described
The respective active area of break-over diode.
Preferably, the first doping type is one of N-type and p-type, the second doping type be N-type and
Another in p-type.
Single channel Transient Voltage Suppressor according to embodiment of the present utility model uses break-over diode.
Owing to the breakdown voltage of break-over diode is much smaller than Zener diode, therefore can reduce single channel wink
The running voltage of state voltage suppressor, for example, it is possible to realize the multiple work such as 2.8V, 3.3V, 5V
Make voltage, thus improve high-power under Electro-static Driven Comb ability.Further, owing to using interconnection
Structure by described isolation area and described second doped region short circuit each other, even if this break-over diode based on
Vertical NPN structural laminate, it is also possible to use as planar device.Therefore, this single channel transient state
Voltage suppressor can use selectively as vertical devices or horizontal device.
In a preferred embodiment, the first diode and the second diode are integrated in break-over diode
In same chip.Owing to using interconnection structure by described isolation area and described second doped region each other
Short circuit, the first diode and the second diode and break-over diode can use public doping partly to lead
Body substrate, thus easily three is integrated in a chip.Press down at this single channel transient voltage
In device processed, using common commutation diode as the additional capacitor of small capacitances value, with break-over diode
Series connection.The commutation diode utilizing series connection reduces the capacitance of this single channel Transient Voltage Suppressor,
Thus improve the transient response speed of this single channel Transient Voltage Suppressor.
Additionally, the processing technology of this single channel Transient Voltage Suppressor and traditional bipolar transistor plumber
Skill is compatible, and can be the most permissible when commutation diode and break-over diode being integrated
Minimize the quantity of semiconductor layer and/or doped region, such that it is able to avoid single channel transient voltage to suppress
The structure complication of device and dramatically increasing of manufacturing cost.
Accompanying drawing explanation
By description to this utility model embodiment referring to the drawings, of the present utility model above-mentioned
And other objects, features and advantages will be apparent from, in the accompanying drawings:
Fig. 1 illustrates the circuit diagram of the Transient Voltage Suppressor according to prior art；
Fig. 2 illustrates the circuit diagram of the single channel Transient Voltage Suppressor according to embodiment；
Fig. 3 illustrates cutting of the single channel Transient Voltage Suppressor according to this utility model first embodiment
Face figure；
Fig. 4 illustrates cutting of the single channel Transient Voltage Suppressor according to this utility model the second embodiment
Face figure；
Fig. 5 a to 5h illustrates each rank of manufacture method of single channel Transient Voltage Suppressor shown in Fig. 4
The sectional view of section.
Detailed description of the invention
It is more fully described this utility model hereinafter with reference to accompanying drawing.In various figures, identical
Element uses similar reference to represent.For the sake of clarity, the various piece in accompanying drawing does not has
Have drawn to scale.Furthermore, it is possible to not shown part known to some.
Should be appreciated that when describing certain structure, when by one layer, a region is referred to as being positioned at another
When layer, another region " above " or " top ", can refer to be located immediately at another layer, another
Above individual region, or between floor, another region, also comprise other Ceng Huo district itself and another
Territory.Further, if this structure is overturn, this layer, region will be located in another layer, another
Individual region " below " or " lower section ".If being located immediately at another layer, another region to describe
Above scenario, will use " A is directly on B " or " A on B and therewith neighbour herein
Connect " form of presentation.
In the following description, the doping type describing semi-conducting material is specially p-type and N-type
One of.It is appreciated that if inverting the doping type of each semi-conducting material, it is also possible to obtain phase
The semiconductor device of congenerous.
This utility model can present in a variety of manners, some of them example explained below.
Fig. 2 illustrates the circuit diagram of the single channel Transient Voltage Suppressor according to embodiment.Such as figure
Shown in 2, this TVS device includes the first diode D1, the second diode D2 and break-over diode
D0.Different from conventional diode, break-over diode D0 has the knot being similar to bipolar transistor
Structure, such as NPN transistor, including emitter stage, base stage and colelctor electrode.At work, break-through two
The open base of pole pipe, emitter stage and current collection apply voltage between having.By optimizing launch site, base
District and the doping content of collecting zone so that break-over diode produces between launch site-base or collecting zone
Punch-through breakdown is there is between-base.
First diode D1 and break-over diode D0 series connection.The negative electrode of the first diode D1 and wearing
The emitter stage of logical diode is connected to each other, the anode of the first diode D1 and the collection of break-over diode
Electrode connects signal end I/O and earth terminal GND, the negative electrode of the second diode D2 and anode respectively
Connect signal end I/O and earth terminal GND respectively.When surge occurs, if at signal end I/O
And between earth terminal, bear positive voltage, and the numerical value of positive voltage hitting higher than break-over diode D0
Wear voltage, then produce along the forward of the first diode and the electric current of the forward flow of break-over diode,
Thus play the effect of ESD protection.If bearing negative voltage between signal end I/O and earth terminal,
The most only second diode D2 forward conduction.
Similar with the TVS device shown in Fig. 1, it is unidirectional device in the TVS device shown in Fig. 2,
Wherein, common commutation diode, as the additional capacitor of small capacitances value, is connected with break-over diode.
The capacitance of this TVS device will depend upon which the capacitance of additional capacitor.Utilize rectification two pole of series connection
Pipe reduces the capacitance of TVS device, thus improves the transient response speed of TVS device.Enter one
Step ground, uses break-over diode, due to the breakdown voltage of break-over diode in above-mentioned TVS device
Much smaller than Zener diode, the running voltage of TVS device therefore can be reduced, for example, it is possible to real
The multiple running voltages such as existing 2.8V, 3.3V, 5V.
It should be noted that, break-over diode can also be used alone as TVS device.Now, TVS device
It is bilateral device, and still can realize low-work voltage.But, with the TVS shown in Fig. 2
Device is compared, and is used alone break-over diode and causes transient response speed to reduce in TVS device.
Fig. 3 illustrates cutting of the single channel Transient Voltage Suppressor according to this utility model first embodiment
Face figure.In this embodiment, it is shown that break-over diode is used alone as the situation of TVS device.At this
In embodiment, the break-over diode that TVS device 100 is single use.
As it is shown on figure 3, TVS device 100 includes Semiconductor substrate 101, is positioned at Semiconductor substrate
The first doped region 102, the epitaxial layer 104 being positioned in Semiconductor substrate 101 in 101, be positioned at outside
The second doped region 106 and the 3rd prolong the isolation area 105 in layer 104, being positioned in epitaxial layer 104
Doped region 108 and be positioned at the 4th doped region 110 in the 3rd doped region 108.
Semiconductor substrate 101 the most heavily doped P-type semiconductor substrate, epitaxial layer 104 is such as
It it is lightly doped N doped epitaxial layer.In an example, Semiconductor substrate 101 e.g. monocrystalline
Silicon substrate, epitaxial layer 104 e.g. silicon epitaxy layer, and it is respectively adopted the doping of suitable adulterant
Become desired doping type.
In order to form p-type or n type semiconductor layer or region, can mix in semiconductor layer and region
Enter the adulterant of respective type.Such as, P-type dopant include boron, N type dopant include phosphorus or
Arsenic or antimony.
In this embodiment, Semiconductor substrate 101 is about the heavily doped of 0.002～0.02 Ω cm for resistivity
Miscellaneous P-type silicon substrate.Epitaxial layer 104 is lightly doped n type silicon epitaxy layer, and its resistivity is about 0.1
Ω cm～1000 Ω cm, thickness about 2 microns～100 microns.
Isolation area 105 the most heavily doped p-type doped region.Isolation area 105 is from epitaxial layer 104
Surface extend to described Semiconductor substrate 101, thus in epitaxial layer 104, limit TVS device
Active area.Additionally, this isolation area 105 is connected with Semiconductor substrate 101, will be located in break-through two
On the current path of pole pipe, its concentration will affect the conducting resistance of break-over diode, art technology
Personnel can control isolation area concentration according to device requirement, but too low isolation area concentration will seriously restrict
The current capacity of device, therefore should control not less than 1019cm-3The order of magnitude.
First doped region 102 and the second doped region 106 are heavily doped n-type doping district the most respectively,
It is provided commonly for being formed the collecting zone of break-over diode.First doped region 102 is positioned at Semiconductor substrate 101
In, the second doped region 106 extends to certain depth in epitaxial layer from the surface of epitaxial layer 104.The
One doped region 102 together with the second doped region 106, at least some of by the 3rd doped region 108
Being defined to semiconductor island, wherein the first doped region 102 is for limiting the bottom of semiconductor island, and second
Doped region 106 is for limiting the sidewall of semiconductor island.First doped region 102 and the second doped region 106
Will be located on the current path of break-over diode, its concentration will affect the conducting resistance of break-over diode,
Those skilled in the art can control the first doped region 102 and the second doped region 106 according to device requirement
Concentration, if but the concentration of the first described doped region 102 and the second doped region 106 arrange mistake
Low, by the current capacity of serious constraint device, therefore should control not less than 1019cm-3The order of magnitude.
3rd doped region 108 e.g. p-type doped region, for forming the base of break-over diode.3rd
Doped region 108 is the doped region formed in epitaxial layer 104.As it has been described above, the 3rd doped region 108
At least some of by the first doped region 102 and the second doped region 106 around, thus formed and partly lead
Body island.3rd doped region 108 for example, ion implanting 1013cm-2～1015cm-2After the ion of magnitude
And carry out annealing formation doped region.
4th doped region 110 the most heavily doped n-type doping district, is used for forming break-over diode
Launch site.4th doped region 110 extends to the 3rd doped region from the surface of the 3rd doped region 108
Desired depth position in 108.The doping content of the 4th doped region 110 is for example,
1018cm-3～1020cm-3Magnitude.
Further, TVS device 100 also includes interlayer insulating film the 112, first electrode 121 and
Interconnection structure the 122, second electrode 131.
First electrode 121 electrically connects through the opening in interlayer insulating film 112 and the 4th doped region 110,
Interconnection structure 122 electrically connects through the opening in interlayer insulating film 112 and the second doped region 106,
And by isolation area 105 and the second doped region 106 short circuit each other.Second electrode 131 and quasiconductor
Another surface relative with the surface forming epitaxial layer 104 of substrate 101 contacts.Layer insulation
Layer 112 is such as made up of silicon oxide or silicon nitride, the first electrode 121 and interconnection structure 122, the
Two electrodes 131 are such as by selected from gold, silver, copper, aluminum, aluminum silicon, aluminum copper silicon, titanium silver, titanium nickel gold
Form Deng metal or alloy.
In the TVS device 100 shown in Fig. 3, Semiconductor substrate the 101, first doped region 102
PNPN structure is constituted with the second doped region the 106, the 3rd doped region the 108, the 4th doped region 110
Lamination.Owing to interconnection structure 122 is by the second doped region 106 and isolation area 105 short circuit, and isolation
District 105 is connected with Semiconductor substrate 101, therefore, and the lamination practical function of this PNPN structure
Identical with the lamination of NPN structure.When break-over diode turns on, the flow direction of electric current such as Fig. 3
In dotted line shown in, i.e. electric current from the 4th doped region 110 via the 3rd doped region 108, first mix
Miscellaneous district 102 and the second doped region 106, isolation area 105 flow to Semiconductor substrate 101.
In this embodiment, the first electrode 121 electrically connects with the 4th doped region 110, the second electrode
131 electrically connect with Semiconductor substrate 101, respectively as the emitter and collector of break-over diode.
In alternate embodiments, it is possible to use interconnection structure 122 is as colelctor electrode, thus saves second
Electrode 131.Even if this break-over diode is based on vertical NPN structural laminate, it is also possible to as flat
Face device uses.Therefore, the TVS device according to this embodiment can be selectively as plumb
Part or horizontal device use so that break-over diode can be easily integrated with other devices same
In individual chip.
Fig. 4 illustrates cutting of the single channel Transient Voltage Suppressor according to this utility model the second embodiment
Face figure.TVS device 200 is unidirectional device, and former with the circuit of the TVS device shown in Fig. 2
Reason is consistent.That is, TVS device 200 is possible not only to realize low-work voltage, and by break-through two
Pole pipe is integrated in same chip with commutation diode, such that it is able to improve transient response speed.
As shown in Figure 4, TVS device 200 is included in public Semiconductor substrate 101 formation
First diode D1, the second diode D2 and break-over diode D0.In this embodiment, every
Extend to described Semiconductor substrate 101 from the surface of epitaxial layer 104 from district 105, thus in extension
Layer 104 limits the first diode D1, the second diode D2 and break-over diode D0 respective
Active area.The structure of this break-over diode D0 is identical with the TVS device shown in Fig. 3, the most not
Describe in detail again.
TVS device 200 also includes the 5th doped region 103, the position being positioned in Semiconductor substrate 101
The 6th doped region the 107, the 7th doped region 109 and the 8th doped region 111 in epitaxial layer 104.
In the active area of the first diode D1, Semiconductor substrate 101 and the 5th doped region 103
Form reverse PN junction so that the first diode D1 is spaced apart with Semiconductor substrate 101.6th
Doped region 107 the most heavily doped n-type doping district, from the surface of epitaxial layer 104 extends to
Prolong desired depth position in layer 104.7th doped region 109 e.g. p-type doped region, from extension
The surface of layer 104 extends to desired depth position in epitaxial layer 104.7th doped region 109 is with outer
Prolong layer 104 and form PN junction, respectively as anode and the negative electrode of the first diode D1.
The doping content for example, 10 of the 5th doped region 10318cm-3～1020cm-3Magnitude.6th doped region
The doping content of 107 for example, 1018cm-3～1020cm-3Magnitude.7th doped region 109 for example, from
Son injects 1013cm-2～1015cm-2After the ion of magnitude and carry out annealing formed doped region.
6th doped region 107 is conducive to reducing the dead resistance of the first diode D1.Substitute
In embodiment, the 6th doped region 107 can be saved.
In the active area of the second diode D2, Semiconductor substrate 101 is formed with epitaxial layer 104
PN junction, respectively as anode and the negative electrode of the second diode D2.8th doped region 111 is e.g.
Heavily doped n-type doping district, extends to pre-depthkeeping epitaxial layer 104 from the surface of epitaxial layer 104
Degree position.
The doping content for example, 10 of the 8th doped region 11118cm-3～1020cm-3Magnitude.
8th doped region 111 is conducive to reducing the dead resistance of the second diode D2.Substitute
In embodiment, the 8th doped region 111 can be saved.
Further, TVS device 200 also includes the 3rd electrode 123, the 4th electrode 124 and
Five electrodes 125.
3rd electrode 123 is electrically connected through the opening in interlayer insulating film 112 and the 7th doped region 109
Connecing, the 4th electrode 124 is electrically connected through the opening in interlayer insulating film 112 and the 8th doped region 111
Connecing, the 5th electrode 125 is electrically connected through the opening in interlayer insulating film 112 and the 6th doped region 107
Connect.3rd electrode the 123, the 4th electrode 124 and the 5th electrode 125 such as by selected from gold, silver,
The metal or alloy compositions such as copper, aluminum, aluminum silicon, aluminum copper silicon, titanium silver, titanium nickel gold.
In the TVS device 200 shown in Fig. 4, additional interconnection or bonding line can be used, will
First electrode 121 and the 5th electrode 125 are connected to each other, by the 3rd electrode 123 and the 4th
Electrode 124 is connected to each other, and collectively as the signal end I/O of TVS device, second
Electrode 131 is then as the receiving terminal GND of TVS device.
In this embodiment, owing to interconnection structure 122 is by the second doped region 106 and isolation area 105
Short circuit, and isolation area 105 is connected with Semiconductor substrate 101, therefore, break-over diode D0
In the lamination practical function of PNPN structure identical with the lamination of NPN structure.This break-through two pole
Pipe D0 can use P-type semiconductor substrate, namely can be with the first diode D1 and the two or two pole
Pipe D2 uses public Semiconductor substrate 101, thus easily by the first diode D1, second
Diode D2 and break-over diode D0 is integrated in a chip.
In TVS device 200, using common commutation diode as the additional capacitor of small capacitances value,
Connect with break-over diode.The commutation diode utilizing series connection reduces the capacitance of TVS device, from
And improve the transient response speed of TVS device.Further, use in above-mentioned TVS device
Break-over diode, owing to the breakdown voltage of break-over diode is much smaller than Zener diode, the most permissible
Reduce the running voltage of TVS device, for example, it is possible to realize the multiple work such as 2.8V, 3.3V, 5V
Make voltage.
Fig. 5 a to 5h illustrates each rank of manufacture method of single channel Transient Voltage Suppressor shown in Fig. 4
The sectional view of section.
As shown in Figure 5 a, in Semiconductor substrate 101, shape the first doped region 102 and the 5th is mixed successively
Miscellaneous district 103.
Semiconductor substrate 101 the most heavily doped P-type semiconductor substrate.In an example,
Semiconductor substrate 101 e.g. monocrystalline substrate, the resistivity of described monocrystalline substrate is e.g., about
0.002～0.02 Ω cm.
First doped region 102 and the 5th doped region 103 are heavily doped n-type doping district the most respectively.
In this example, the first doped region 102 uses phosphorus as adulterant, and doping content controls the least
In 1019cm-3The order of magnitude.5th doped region 103 uses antimony as adulterant, and doping content is such as
It is 1018cm-3～1020cm-3Magnitude.
The doping process of quasiconductor is known, uses suitable adulterant to mix in a semiconductor material
Miscellaneous can obtain desired doping type.In order to form p-type or n type semiconductor layer or region, can
To mix the adulterant of respective type in semiconductor layer and region.Such as, P-type dopant includes
Boron, N type dopant includes phosphorus or arsenic or antimony.Doping process can include the thermal annealing added, example
If the high annealings of more than 1000 DEG C are to activate adulterant.
Subsequently, Semiconductor substrate 101 forms epitaxial layer 104, as shown in Figure 5 b.
Epitaxial layer 104 can use known depositing operation to be formed.Such as, depositing operation can be
Selected from electron beam evaporation (EBM), chemical gaseous phase deposition (CVD), ald (ALD),
One in sputtering.In this embodiment, epitaxial layer 104 the most lightly doped N doped epitaxial
Layer, resistivity is about 0.1 Ω cm～1000 Ω cm, thickness about 2 microns～100 microns.
Subsequently, epitaxial layer 104 forms insulating barrier 112, as shown in Figure 5 c.
Insulating barrier 112 can use sputtering or thermal oxide to be formed.Such as, insulating barrier 112 is hot oxygen
Change formed silicon oxide layer, in follow-up doping step, insulating barrier 112 as protective layer, and
And using the interlayer insulating film as resulting devices.
Subsequently, epitaxial layer 104 sequentially forms isolation area 105, and the second doped region 106
With the 6th doped region 107, as shown in Figure 5 c.
Isolation area 105 the most heavily doped p-type doped region, doping content is not less than 1019cm-3
The order of magnitude.Isolation area 105 extends to described Semiconductor substrate 101 from the surface of epitaxial layer 104,
Epitaxial layer 104 is separated into three regions, is respectively used to limit the first diode, the second diode
Active area with break-over diode.Additionally, this isolation area 105 is connected with Semiconductor substrate 101.
In break-over diode, isolation area 105 will be located on the current path of break-over diode.
Second doped region 106 and the 6th doped region 107 the most heavily doped n-type doping district, mix
Miscellaneous concentration is not less than 1019cm-3The order of magnitude.Second doped region 106 and the 6th doped region 107 are permissible
Same step is formed.Second doped region 106 extends to extension from the surface of epitaxial layer 104
Layer certain depth.First doped region 102 is together with the second doped region 106, by epitaxial layer 104
A part is defined to semiconductor island, and wherein the first doped region 102 is for limiting the bottom of semiconductor island,
Second doped region 106 is for limiting the sidewall of semiconductor island.In break-over diode, the first doping
District 102 will be located on the current path of break-over diode.
Subsequently, in the region of break-over diode, epitaxial layer 104 forms the 3rd doped region 108,
As fig 5d.
3rd doped region 108 e.g. p-type doped region, for forming the base of break-over diode.
3rd doped region 108 being enclosed epitaxial layer 104 by the first doped region 102 and the second doped region 106
Around region transoid, p-type will be changed into by above-mentioned semiconductor island.
Subsequently, in the first diode area, form the 7th doped region 109 in the epitaxial layer, as
Shown in Fig. 5 e.
7th doped region 109 the most heavily doped p-type doped region, described p-type doped region is such as
For ion implanting 1013cm-2～1015cm-2After the ion of magnitude and carry out annealing formed doped region.The
Seven doped regions 109 extend to desired depth position epitaxial layer 104 from the surface of epitaxial layer 104.
7th doped region 109 forms PN junction, respectively as the sun of the first diode D1 with epitaxial layer 104
Pole and negative electrode.
Subsequently, in the region of break-over diode, the 3rd doped region 108 forms the 4th doping
District 110, in the region of the second diode, forms the 8th doped region 111 in epitaxial layer 104,
As shown in figure 5f.
4th doped region 110 and the 8th doped region 111 are heavily doped n-type doping district the most respectively,
Doping content for example, 1018cm-3～1020cm-3Magnitude.4th doped region 110 and the 8th doped region
111 can be formed in same step.4th doped region 110 is from the table of the 3rd doped region 108
Face extends to desired depth position in the 3rd doped region 108, and the 8th doped region 111 is from epitaxial layer 104
Surface extend to desired depth position in epitaxial layer 104.
In the region of break-over diode, the 4th doped region 110, the 3rd doped region 108 and
One doped region 102 and the second doped region 106 are respectively as the launch site of break-over diode D0, base
District and collecting zone.
In the region of the second diode, Semiconductor substrate 101 and epitaxial layer 104 form PN junction,
Anode and negative electrode respectively as the second diode D2.
Subsequently, insulating barrier 112 forms multiple opening, as shown in fig. 5g.
The plurality of opening exposes the 4th doped region 110, isolation respectively in the region of break-over diode
District 105 and the surface of the second doped region 106, expose the 6th doped region in the region of the first diode
107 and the 7th surface of doped region 109, the 8th doped region 111 is exposed in the region of the second diode
Surface.
Subsequently, multiple electrode and interconnection structure are made, as shown in figure 5h.
Interconnection structure 122 is electrically connected through the opening in interlayer insulating film 112 and the second doped region 106
Connect, and by isolation area 105 and the second doped region 106 short circuit each other.
First electrode 121 is electrically connected through the opening in interlayer insulating film 112 and the 4th doped region 110
Connect.3rd electrode 123 is electrically connected through the opening in interlayer insulating film 112 and the 7th doped region 109
Connecing, the 4th electrode 124 is electrically connected through the opening in interlayer insulating film 112 and the 8th doped region 111
Connecing, the 5th electrode 125 is electrically connected through the opening in interlayer insulating film 112 and the 6th doped region 107
Connect.
By thinning for Semiconductor substrate 101 and back face metalization, in the back side shape of Semiconductor substrate 101
Become metal layer on back, as the second electrode 131.That is, the second electrode 131 and Semiconductor substrate
Another surface relative with the surface forming epitaxial layer 104 of 101 contacts.
Above-mentioned electrode and interconnection structure such as by selected from gold, silver, copper, aluminum, aluminum silicon, aluminum copper silicon,
The metal or alloy compositions such as titanium silver, titanium nickel gold.
It should be noted that, heavy doping is with to be lightly doped be relative concept in the above-described example, represent
Heavily doped doping content is more than lightly doped doping content, and not to concrete doping content scope
Restriction.
In the above description, known structural element and step are not described in detail.
It should be appreciated to those skilled in the art that can realize corresponding by various technological means
Structural element and step.It addition, in order to form identical structural element, those skilled in the art are also
Can be designed that method the most identical with process as described above.Although it addition, more than
Respectively describe each embodiment, but it is not intended that the measure in each embodiment can not be favourable
Be used in combination.
Above embodiment of the present utility model is described.But, these embodiments are only
For illustrative purposes, it is not intended to limit scope of the present utility model.Model of the present utility model
Enclose and limited by claims and equivalent thereof.Without departing from scope of the present utility model, this area
Technical staff can make multiple replacement and amendment, and these substitute and amendment all should fall new in this practicality
Within the scope of type.
Claims (11)
1. a single channel Transient Voltage Suppressor, it is characterised in that including:
The Semiconductor substrate of the first doping type；
First doped region of the second doping type being positioned in described Semiconductor substrate, wherein second mixes
Miscellany type and the first doping type are contrary；
The epitaxial layer of the second doping type being positioned in described Semiconductor substrate；
The isolation area of the first doping type being positioned in described epitaxial layer；
Second doped region of the second doping type being positioned in described epitaxial layer；
3rd doped region of the first doping type being positioned in described epitaxial layer, wherein said second mixes
Miscellaneous district is at least some of around described 3rd doped region；And
4th doped region of the second doping type being positioned in described 3rd doped region；And
Interconnection structure, by described isolation area and described second doped region short circuit each other,
Wherein, described single channel Transient Voltage Suppressor includes break-over diode, described first doping
District and described second doped region, described 3rd doped region and described 4th doped region are respectively as institute
State the collecting zone of break-over diode, base and launch site.
Single channel Transient Voltage Suppressor the most according to claim 1, it is characterised in that institute
State the first doped region and described second doped region by described at least some of limit of described 3rd doped region
Be set to semiconductor island, described first doped region for limiting the bottom of described semiconductor island, described the
Two doped regions are for limiting the sidewall of described semiconductor island.
Single channel Transient Voltage Suppressor the most according to claim 1, it is characterised in that
During the conducting of described break-over diode, current path includes described 4th doped region, described 3rd doping
District, described first doped region and described second doped region, described isolation area and described quasiconductor
Substrate.
Single channel Transient Voltage Suppressor the most according to claim 3, it is characterised in that also
Including:
5th doped region of the second doping type being positioned in described Semiconductor substrate；And
7th doped region of the first doping type being positioned in described epitaxial layer,
Wherein, described single channel Transient Voltage Suppressor also includes the first diode, and the described 7th mixes
Miscellaneous district and described epitaxial layer are respectively as the anode of described first diode and negative electrode.
Single channel Transient Voltage Suppressor the most according to claim 4, it is characterised in that also
Including the second diode, described Semiconductor substrate and described epitaxial layer respectively as described two or two pole
The anode of pipe and negative electrode.
Single channel Transient Voltage Suppressor the most according to claim 5, it is characterised in that institute
State single channel Transient Voltage Suppressor and there is signal end and earth terminal, the negative electrode of described first diode
It is electrically connected to each other with the launch site of described break-over diode, the anode of described first diode and described
The collecting zone of break-over diode connects described signal end and described earth terminal, described two or two pole respectively
The negative electrode of pipe and anode connect described signal end and described earth terminal respectively.
Single channel Transient Voltage Suppressor the most according to claim 6, it is characterised in that also
Including the 6th doped region of the second doping type being positioned in described epitaxial layer, described 6th doped region
Around described 7th doped region, wherein, described 6th doped region electrically connects with described 4th doped region.
Single channel Transient Voltage Suppressor the most according to claim 6, it is characterised in that also
Including the 8th doped region of the second doping type being positioned in described epitaxial layer, described 8th doped region
It is positioned at the region of described second diode, and electrically connects with described 7th doped region.
Single channel Transient Voltage Suppressor the most according to claim 6, it is characterised in that institute
State the first diode, described second diode and described break-over diode use public described partly lead
Body substrate.
Single channel Transient Voltage Suppressor the most according to claim 6, it is characterised in that
It is each that described isolation area limits described first diode, described second diode and described break-over diode
From active area.
11. single channel Transient Voltage Suppressors according to any one of claim 1 to 10,
It is characterized in that, the first doping type is one of N-type and p-type, the second doping type be N-type and
Another in p-type.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620419138.XU CN205595333U (en) | 2016-05-10 | 2016-05-10 | Single channel transient voltage inhibitor |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620419138.XU CN205595333U (en) | 2016-05-10 | 2016-05-10 | Single channel transient voltage inhibitor |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105932023A (en) * | 2016-05-10 | 2016-09-07 | 北京燕东微电子有限公司 | Transient voltage suppressor |
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2016
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105932023A (en) * | 2016-05-10 | 2016-09-07 | 北京燕东微电子有限公司 | Transient voltage suppressor |
| CN105932023B (en) * | 2016-05-10 | 2019-01-29 | 北京燕东微电子有限公司 | Transient Voltage Suppressor |
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