CN205564928U - High performance wave filter module - Google Patents

High performance wave filter module Download PDF

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Publication number
CN205564928U
CN205564928U CN201620328724.3U CN201620328724U CN205564928U CN 205564928 U CN205564928 U CN 205564928U CN 201620328724 U CN201620328724 U CN 201620328724U CN 205564928 U CN205564928 U CN 205564928U
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China
Prior art keywords
electric capacity
inductance
screen layer
layer
filter module
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Withdrawn - After Issue
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CN201620328724.3U
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Chinese (zh)
Inventor
戴永胜
陈相治
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NANJING BOERTE ELECTRONIC TECHNOLOGY Co Ltd
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Individual
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Abstract

The utility model discloses a high performance wave filter module belongs to the communication technology field, including low pass filter module F1, band elimination filter module F2 and first via hole via1, a low pass filter and a band elimination filter are cascaded to adoption LTCC technique, have realized better in -band flatness and geng gao's distal end suppression degree, the utility model discloses a LTCC technique, small, light in weight, with low costs, the reliability is high to circuit implementation structure is simple, easily mass production.

Description

A kind of high performance filter module
Technical field
This utility model communication technical field, particularly relates to a kind of high performance filter module.
Background technology
In recent years, along with the developing rapidly of miniaturization of mobile communication, satellite communication and Defensive Avionics System, High-performance, low cost and miniaturization have become as the developing direction of microwave current/RF application, to wave filter Performance, size, reliability and cost are all had higher requirement.Referring mainly to of this component capabilities is described Indicate: passband operating frequency range, stop band frequency range, pass band insertion loss, stopband attenuation, passband are defeated Enter/output voltage standing-wave ratio, insert phase shift and delay/frequency characteristic, temperature stability, volume, weight, can By property etc..
LTCC is a kind of Electronic Encapsulating Technology, uses multi-layer ceramics technology, it is possible to by passive element Being built in inside medium substrate, active component can also be mounted on substrate surface makes passive/active collection simultaneously The functional module become.LTCC technology is at cost, integration packaging, wiring live width and distance between centers of tracks, low impedance metal Change, design diversity and the aspect such as motility and high frequency performance all show many merits, it has also become passive collection The mainstream technology become.It has high q-factor, it is simple to embedded passive device, and thermal diffusivity is good, and reliability is high, resistance to High temperature, rushes the advantages such as shake, utilizes LTCC technology, can well process size little, and precision is high, closely Type is good, and little microwave device is lost.Owing to LTCC technology has the integrated advantage of 3 D stereo, at microwave frequency band It is widely used for manufacturing various microwave passive components, it is achieved passive element highly integrated.Based on LTCC technique Stack technology, it is possible to achieve three-dimensionally integrated so that various micro microwave filter have size little, weight Amount is light, performance is excellent, reliability is high, batch production performance concordance is good and the plurality of advantages such as low cost, utilization Its three-dimensionally integrated construction features, it is possible to achieve high performance filter module.
Utility model content
The purpose of this utility model is to provide a kind of high performance filter module, uses LTCC technology low by one Bandpass filter and a band elimination filter cascade, it is achieved that preferably filter effect, and reached more excellent Electric property.
For achieving the above object, this utility model is by the following technical solutions:
A kind of high performance filter module, including low pass filter blocks F1, band elimination filter module F2 and the One via Via1,
Low pass filter blocks F1 include surface-pasted 50 ohmage input port P1, the first inductance L1, Second inductance L2, the 3rd inductance L3, the first electric capacity C1, the second electric capacity C2, the 3rd electric capacity C3, the 4th electricity Hold C4, the 5th electric capacity C5, the first screen layer SD1, secondary shielding layer SD2, the second via Via2 and the 3rd Via Via3, input port P1 the first inductance L1 the most together and the first electric capacity C1 connects second Via Via2, described second via Via2 connect the first screen layer SD1 by the second electric capacity C2, and described Two via Via2 connect the 3rd via Via3 also by the second inductance L2 being connected in parallel and the 3rd electric capacity C3, Described 3rd via Via3 connects secondary shielding layer SD2, described 3rd via Via3 by the 4th electric capacity C4 Described first via Via1 is connected also by the 3rd inductance L3 being connected in parallel and the 5th electric capacity C5;
Described first screen layer SD1 is located at above described secondary shielding layer SD2, described first screen layer SD1 With described secondary shielding layer SD2 in the horizontal direction for be arrangeding in parallel, described first inductance L1, described second Inductance L2, described 3rd inductance L3, described first electric capacity C1, described second electric capacity C2, described 3rd electricity Hold C3, described 4th electric capacity C4, described 5th electric capacity C5, described second via Via2 and described 3rd mistake Hole Via3 is all located between described first screen layer SD1 and described secondary shielding layer SD2;
Band elimination filter F2 include surface-pasted 50 ohmage output port P2, the 4th inductance L4, Five inductance L5, the 6th inductance L6, the 7th inductance L7, the 6th electric capacity C6, the 7th electric capacity C7, the 8th electric capacity C8, the 9th electric capacity C9, the tenth electric capacity C10, the 3rd screen layer SD3, the 4th screen layer SD4, the 4th via Via4, the 5th via Via5 and the 6th via Via6, described first via Via1 is also by being connected in parallel The 4th inductance L4 and the 6th electric capacity C6 connect the 4th via Via4, described 4th via Via4 by the 7th Electric capacity C7 connects the 4th screen layer SD4, and described 4th via Via4 is also by the 5th inductance being connected in parallel L5 and the 8th electric capacity C8 connects the 5th via Via5, described 5th via Via5 by the 6th inductance L6 even Meet the 6th via Via6, described 6th via Via6 and connect the 3rd screen layer SD3 also by the 9th electric capacity C9, Described 5th via Via5 connects output also by the 7th inductance L7 being connected in parallel and the tenth electric capacity C10 Port P2;
Described 3rd screen layer SD3 is located at above described 4th screen layer SD4, described 3rd screen layer SD3 With described 4th screen layer SD4 in the horizontal direction for be arrangeding in parallel, described 4th inductance L4, the described 5th Inductance L5, described 6th inductance L6, described 7th inductance L7, described 6th electric capacity C6, described 7th electricity Hold C7, described 8th electric capacity C8, described 9th electric capacity C9, described tenth electric capacity C10, described 4th via Via4, described 5th via Via5 and described 6th via Via6 be all located at described 3rd screen layer SD3 and Between described 4th screen layer SD4.
Described first screen layer SD1 and the 3rd screen layer SD3 is positioned at same aspect and the most connected, the second screen Cover layer SD2 and the 4th screen layer SD4 and be positioned at same aspect and the most connected.
The circuit board of described a kind of high performance filter module is LTCC circuit substrate.
A kind of high performance filter module described in the utility model, uses LTCC technology by a low-pass filtering Device and the cascade of band elimination filter, solve the former cut-off frequency when low pass filter when being 3GHz, input Frequency is higher than after 9GHz, and decay after filtering the problem significantly reduced, it is achieved that preferably filter effect, and And reached more excellent electric property;This utility model uses low-loss low-temperature co-burning ceramic material and mixing Multilager base plate process technology, it is achieved that preferably inband flatness and higher far-end degree of suppression;This practicality is new Type uses LTCC technology, and volume is little, lightweight, low cost, reliability high, and the letter of circuit realiration structure Single, it is easy to produce in enormous quantities.
Accompanying drawing explanation
Fig. 1 is the contour structures schematic diagram of this utility model a kind of high performance filter module;
Fig. 2 is profile and the internal structure of low pass filter in this utility model a kind of high performance filter module Schematic diagram;
Fig. 3 is profile and the internal structure of band elimination filter in this utility model a kind of high performance filter module Schematic diagram;
Fig. 4 be in this utility model a kind of high performance filter module the amplitude-versus-frequency curve of low pass filter and Stationary wave characteristic curve;
Fig. 5 is that band elimination filter is cascaded by this utility model one high performance filter module with low pass filter After amplitude-frequency characteristic and stationary wave characteristic curve.
Detailed description of the invention
A kind of high performance filter module as shown in Figure 1, including low pass filter blocks F1, bandreject filtering Device module F2 and the first via Via1,
Low pass filter blocks F1 as shown in Figure 2 include surface-pasted 50 ohmage input port P1, First inductance L1, the second inductance L2, the 3rd inductance L3, the first electric capacity C1, the second electric capacity C2, the 3rd electricity Hold C3, the 4th electric capacity C4, the 5th electric capacity C5, the first screen layer SD1, secondary shielding layer SD2, the second mistake Hole Via2 and the 3rd via Via3, input port P1 the first inductance L1 and first electricity the most together Appearance C1 connects the second via Via2, described second via Via2 and connects the first screen layer by the second electric capacity C2 SD1, described second via Via2 connect also by the second inductance L2 being connected in parallel and the 3rd electric capacity C3 3rd via Via3, described 3rd via Via3 connect secondary shielding layer SD2, institute by the 4th electric capacity C4 State the 3rd via Via3 and connect described first also by the 3rd inductance L3 being connected in parallel and the 5th electric capacity C5 Via Via1;
Described first screen layer SD1 is located at above described secondary shielding layer SD2, described first screen layer SD1 With described secondary shielding layer SD2 in the horizontal direction for be arrangeding in parallel, described first inductance L1, described second Inductance L2, described 3rd inductance L3, described first electric capacity C1, described second electric capacity C2, described 3rd electricity Hold C3, described 4th electric capacity C4, described 5th electric capacity C5, described second via Via2 and described 3rd mistake Hole Via3 is all located between described first screen layer SD1 and described secondary shielding layer SD2;
Band elimination filter F2 as shown in Figure 3 include surface-pasted 50 ohmage output port P2, Four inductance L4, the 5th inductance L5, the 6th inductance L6, the 7th inductance L7, the 6th electric capacity C6, the 7th electric capacity C7, the 8th electric capacity C8, the 9th electric capacity C9, the tenth electric capacity C10, the 3rd screen layer SD3, the 4th screen layer SD4, the 4th via Via4, the 5th via Via5 and the 6th via Via6, described first via Via1 is also The 4th inductance L4 and the 6th electric capacity C6 the most together connect the 4th via Via4, described 4th mistake Hole Via4 connects the 4th screen layer SD4 by the 7th electric capacity C7, and described 4th via Via4 is also by parallel connection The 5th inductance L5 and the 8th electric capacity C8 together connect the 5th via Via5, described 5th via Via5 and lead to Cross the 6th inductance L6 connection the 6th via Via6, described 6th via Via6 to connect also by the 9th electric capacity C9 3rd screen layer SD3, described 5th via Via5 are also by the 7th inductance L7 being connected in parallel and the tenth electricity Hold C10 and connect output port P2;
Described 3rd screen layer SD3 is located at above described 4th screen layer SD4, described 3rd screen layer SD3 With described 4th screen layer SD4 in the horizontal direction for be arrangeding in parallel, described 4th inductance L4, the described 5th Inductance L5, described 6th inductance L6, described 7th inductance L7, described 6th electric capacity C6, described 7th electricity Hold C7, described 8th electric capacity C8, described 9th electric capacity C9, described tenth electric capacity C10, described 4th via Via4, described 5th via Via5 and described 6th via Via6 be all located at described 3rd screen layer SD3 and Between described 4th screen layer SD4.
Described first screen layer SD1 and the 3rd screen layer SD3 is positioned at same aspect and the most connected, the second screen Cover layer SD2 and the 4th screen layer SD4 and be positioned at same aspect and the most connected.
The circuit board of described a kind of high performance filter module is LTCC circuit substrate.
As shown in Figure 4 and Figure 5, the cut-off frequency of former low pass filter is 3GHz, after frequency is higher than 9GHz, Decay significantly reduces, after a low pass filter and a band elimination filter are cascaded by this utility model, Its mid frequency is still 3GHz, and frequency is greatly improved higher than degree of suppression at 9GHz, and input port return loss is excellent In 19dB.
This utility model uses multilamellar LTCC technique to realize, its low-temperature co-burning ceramic material and metal Figure sinters at a temperature of about 900 DEG C and forms, so having extreme high reliability and temperature stability, by Hybrid multilayer substrate process technology and outer surface metallic shield is used to be grounded and encapsulate in structure, thus Making volume significantly reduce, size is only 1.2mm × 5.7mm × 0.94mm.
A kind of high performance filter module described in the utility model, uses LTCC technology by a low-pass filtering Device and the cascade of band elimination filter, solve the former cut-off frequency when low pass filter when being 3GHz, input Frequency is higher than after 9GHz, and decay after filtering the problem significantly reduced, it is achieved that preferably filter effect, and And reached more excellent electric property;This utility model uses low-loss low-temperature co-burning ceramic material and mixing Multilager base plate process technology, it is achieved that preferably inband flatness and higher far-end degree of suppression;This practicality is new Type uses LTCC technology, and volume is little, lightweight, low cost, reliability high, and the letter of circuit realiration structure Single, it is easy to produce in enormous quantities.

Claims (3)

1. a high performance filter module, it is characterised in that: include the resistance filter of low pass filter blocks F1, band Ripple device module F2 and the first via Via1,
Low pass filter blocks F1 include surface-pasted 50 ohmage input port P1, the first inductance L1, Second inductance L2, the 3rd inductance L3, the first electric capacity C1, the second electric capacity C2, the 3rd electric capacity C3, the 4th electricity Hold C4, the 5th electric capacity C5, the first screen layer SD1, secondary shielding layer SD2, the second via Via2 and the 3rd Via Via3, input port P1 the first inductance L1 the most together and the first electric capacity C1 connects second Via Via2, described second via Via2 connect the first screen layer SD1 by the second electric capacity C2, and described Two via Via2 connect the 3rd via Via3 also by the second inductance L2 being connected in parallel and the 3rd electric capacity C3, Described 3rd via Via3 connects secondary shielding layer SD2, described 3rd via Via3 by the 4th electric capacity C4 Described first via Via1 is connected also by the 3rd inductance L3 being connected in parallel and the 5th electric capacity C5;
Described first screen layer SD1 is located at above described secondary shielding layer SD2, described first screen layer SD1 With described secondary shielding layer SD2 in the horizontal direction for be arrangeding in parallel, described first inductance L1, described second Inductance L2, described 3rd inductance L3, described first electric capacity C1, described second electric capacity C2, described 3rd electricity Hold C3, described 4th electric capacity C4, described 5th electric capacity C5, described second via Via2 and described 3rd mistake Hole Via3 is all located between described first screen layer SD1 and described secondary shielding layer SD2;
Band elimination filter F2 include surface-pasted 50 ohmage output port P2, the 4th inductance L4, Five inductance L5, the 6th inductance L6, the 7th inductance L7, the 6th electric capacity C6, the 7th electric capacity C7, the 8th electric capacity C8, the 9th electric capacity C9, the tenth electric capacity C10, the 3rd screen layer SD3, the 4th screen layer SD4, the 4th via Via4, the 5th via Via5 and the 6th via Via6, described first via Via1 is also by being connected in parallel The 4th inductance L4 and the 6th electric capacity C6 connect the 4th via Via4, described 4th via Via4 by the 7th Electric capacity C7 connects the 4th screen layer SD4, and described 4th via Via4 is also by the 5th inductance being connected in parallel L5 and the 8th electric capacity C8 connects the 5th via Via5, described 5th via Via5 by the 6th inductance L6 even Meet the 6th via Via6, described 6th via Via6 and connect the 3rd screen layer SD3 also by the 9th electric capacity C9, Described 5th via Via5 connects output also by the 7th inductance L7 being connected in parallel and the tenth electric capacity C10 Port P2;
Described 3rd screen layer SD3 is located at above described 4th screen layer SD4, described 3rd screen layer SD3 With described 4th screen layer SD4 in the horizontal direction for be arrangeding in parallel, described 4th inductance L4, the described 5th Inductance L5, described 6th inductance L6, described 7th inductance L7, described 6th electric capacity C6, described 7th electricity Hold C7, described 8th electric capacity C8, described 9th electric capacity C9, described tenth electric capacity C10, described 4th via Via4, described 5th via Via5 and described 6th via Via6 be all located at described 3rd screen layer SD3 and Between described 4th screen layer SD4.
2. a kind of high performance filter module as claimed in claim 1, it is characterised in that: described first screen Cover layer SD1 and the 3rd screen layer SD3 and be positioned at same aspect and the most connected, secondary shielding layer SD2 and the 4th Screen layer SD4 is positioned at same aspect and the most connected.
3. a kind of high performance filter module as claimed in claim 1, it is characterised in that: described a kind of high The circuit board of performance filter module is LTCC circuit substrate.
CN201620328724.3U 2016-04-19 2016-04-19 High performance wave filter module Withdrawn - After Issue CN205564928U (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105762470B (en) * 2016-04-19 2018-09-25 南京波而特电子科技有限公司 A kind of high performance filter module
CN109216837A (en) * 2017-07-03 2019-01-15 Tdk株式会社 Laminated electronic component

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105762470B (en) * 2016-04-19 2018-09-25 南京波而特电子科技有限公司 A kind of high performance filter module
CN109216837A (en) * 2017-07-03 2019-01-15 Tdk株式会社 Laminated electronic component
CN109216837B (en) * 2017-07-03 2020-12-18 Tdk株式会社 Laminated electronic component

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C14 Grant of patent or utility model
GR01 Patent grant
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Effective date of registration: 20170510

Address after: building 401, building 3, building 8, Yongfeng Road, Qinhuai District, Nanjing, Jiangsu, China 210000

Patentee after: NANJING BOERTE ELECTRONIC TECHNOLOGY CO., LTD.

Address before: 200 School of electro-optic engineering, Nanjing University of Science and Technology, Xuanwu District, Xiaolingwei, Nanjing 210094, Jiangsu

Co-patentee before: Chen Xiangzhi

Patentee before: Dai Yongsheng

TR01 Transfer of patent right
AV01 Patent right actively abandoned

Granted publication date: 20160907

Effective date of abandoning: 20180925

AV01 Patent right actively abandoned