CN205488140U - Trench gate of gradual switching characteristic surpasses knot MOSFET device - Google Patents

Trench gate of gradual switching characteristic surpasses knot MOSFET device Download PDF

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Publication number
CN205488140U
CN205488140U CN201620257794.4U CN201620257794U CN205488140U CN 205488140 U CN205488140 U CN 205488140U CN 201620257794 U CN201620257794 U CN 201620257794U CN 205488140 U CN205488140 U CN 205488140U
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cellular
trench gate
epitaxial layer
district
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白玉明
章秀芝
张海涛
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Wuxi Unigroup Microelectronics Co ltd
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Wuxi Tongfang Microelectronics Co Ltd
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Abstract

The utility model provides a trench gate of gradual switching characteristic surpasses knot MOSFET device, two cellular structures including at least a set of horizontal coordination, in two cellular structures, single cellular includes: the N+ type substrate back precipitates the drain electrode that the drain electrode metal formed the MOSFET device, do it have N to grow on the N+ type substrate the type epitaxial layer, N at the cellular type epitaxial layer both sides are formed with P type post deep groove structure downwards from the top, N at the cellular type epitaxial layer top intermediate formation has trench gate, lateral wall and bottom at trench gate are formed with gate oxide layer, N at the cellular be formed with P type tagma between type epitaxial layer top trench gate lateral wall gate oxide layer and the P type post deep groove structure, the P type tagma degree of depth of single the cellular inner groove bars left and right sides is different in two cellular structures, P type tagma top is formed with N+ type source region, is the source electrode metal deposit at N type epitaxial layer top, there is the dielectric layer to keep apart between source electrode metal and the trench gate. The utility model discloses can form the gradual trench gate of gate -drain capacitance.

Description

The groove grid super node MOSFET device of gradual switching characteristic
Technical field
This utility model relates to a kind of semiconductor device, especially a kind of power MOS pipe device.
Background technology
Super node MOSFET power device, based on charge balance technique, can reduce parasitic capacitance so that super junction power device has the switching characteristic being exceedingly fast, and can reduce switching loss, it is achieved higher power conversion efficiency.Super node MOSFET power device during being switched on and off, miller capacitance (Crss) And corresponding gate leakage capacitance (Cgd) The switching speed of super junction power device is played a leading role, if Cgd can be reduced, so that it may improve the switching speed of super junction power device, reduce switching loss;Meanwhile, super node MOSFET power device when being switched on and off, gate leakage capacitance (Cgd) Can undergo mutation, this makes the electromagnetic interference of super node MOSFET power device serious.
Summary of the invention
For the deficiencies in the prior art, this utility model provides the groove grid super node MOSFET device of a kind of gradual switching characteristic, use the body plot structure with two or more unequal degree of depth, the sudden change of the super junction power device gate leakage capacitance when being switched on or off can be shared multiple voltage node, thus reduce the electromagnetic interference caused by gate leakage capacitance sudden change.The technical solution adopted in the utility model is:
A kind of groove grid super node MOSFET device of gradual switching characteristic, the double structure cells connected the most side by side including least one set;
In double structure cells, single cellular includes:
N+ type substrate, N+ type substrate back deposit drain metal forms the drain electrode of MOSFET element, and N+ type Grown has N-type epitaxial layer;
It is formed with p-type post deep groove structure from top down in the N-type epitaxial layer both sides of cellular;
N-type epitaxial layer crown center at cellular is formed with trench gate, and trench gate is as the grid of MOSFET element;
The grid oxide layer playing buffer action it is formed with at the sidewall of trench gate and bottom;
It is formed with PXing Ti district between N-type epitaxial layer top channel grid sidewall grid oxide layer and the p-type post deep groove structure of cellular;In double structure cells, the PXing Ti district degree of depth of the single cellular internal channel grid left and right sides is different;
Top, PXing Ti district is formed with N+ type source region;PXing Ti district is formed with the P+ type contact area for contacting with p-type post deep groove structure top;
Source metal is deposited on N-type epitaxial layer top, is connected with p-type post deep groove structure, PXing Ti district and N+ type source region, forms the source electrode of MOSFET element;Dielectric layer is had to isolate between source metal and trench gate.
Further, in double structure cells, the PXing Ti district of trench gate both sides is degree of depth left and right specular in the cellular of two, left and right.
Advantage of the present utility model: this utility model uses the body plot structure with two or more unequal degree of depth, the sudden change of the super junction power device gate leakage capacitance when being switched on or off can be shared multiple voltage node, thus reduce the electromagnetic interference caused by gate leakage capacitance sudden change.The corresponding different gate leakage capacitance in the body district of different depth.Under identical structure, the body district degree of depth is deep, and corresponding gate leakage capacitance is the least, otherwise then corresponding gate leakage capacitance is big.
Accompanying drawing explanation
Fig. 1 is that structure of the present utility model forms schematic diagram.
Detailed description of the invention
Below in conjunction with concrete drawings and Examples, the utility model is described in further detail.
The groove grid super node MOSFET device of the gradual switching characteristic that the utility model proposes, as it is shown in figure 1, include double structure cells that least one set connects the most side by side;In whole MOSFET element, it is usually present double structure cells of hundreds of thousands of repetition the most up to ten thousand;
In double structure cells, single cellular includes:
N+ type substrate 1, N+ type substrate 1 back side can deposit drain metal and form the drain electrode of MOSFET element, and on N+ type substrate 1, growth has N-type epitaxial layer 2;
It is formed with p-type post deep groove structure 3(P-pillar trench from top down) in N-type epitaxial layer 2 both sides of cellular;P-type post deep groove structure 3 generally uses following method to be formed: first N-type epitaxial layer 2 both sides at cellular can perform etching formation deep groove structure from top down, then epitaxial growth p type impurity layer in deep groove structure, carry out the fill process of deep groove structure, form p-type post deep groove structure 3;This p-type post deep groove structure 3 is used for the most pressure of super node MOSFET;
N-type epitaxial layer 2 crown center at cellular is formed with trench gate 5, and trench gate 5 is as the grid of MOSFET element;When making trench gate 5, first N-type epitaxial layer 2 crown center at cellular carries out the etching of gate trench, then forms the grid oxide layer 4 of buffer action in gate trench, then carries out deposit and the etching of polysilicon in gate trench, forms the structure of trench gate 5;Therefore, sidewall and the bottom of trench gate 5 is formed with grid oxide layer 4;
It is formed with PXing Ti district 6 between N-type epitaxial layer 2 top channel grid 5 sidewall grid oxide layer and the p-type post deep groove structure 3 of cellular;PXing Ti district 6 is distributed in trench gate 5 both sides;In double structure cells, PXing Ti district 6 degree of depth of single cellular internal channel grid 5 left and right sides is different;In actual fabrication, the PXing Ti district 6 of usual trench gate 5 both sides is degree of depth left and right specular in the cellular of two, left and right, i.e., in Fig. 1, in the cellular of two, left and right, adjoining Liang GePXing Ti district 6 degree of depth is consistent, and Liang GePXing Ti district 6 degree of depth deviated from mutually is consistent;
Top, PXing Ti district 6 is formed with N+ type source region 7;PXing Ti district 6 is formed with the P+ type contact area for contacting with p-type post deep groove structure 3 top;
Source metal 8 is deposited on N-type epitaxial layer 2 top, is connected with p-type post deep groove structure 3, PXing Ti district 6 and N+ type source region 7, forms the source electrode of MOSFET element;Dielectric layer 9 is had to isolate between source metal 8 and trench gate 5.
Need simple declaration: in double structure cells, cellular corresponding electrically position in two, left and right is electrical connection, the trench gate of such as left side cellular and the trench gate electrical connection (realizing electrical connection in overall domain) of right side cellular, these annexations are techniques known, do not do expansion and describe in the present embodiment.

Claims (2)

1. the groove grid super node MOSFET device of a gradual switching characteristic, it is characterised in that include double structure cells that least one set connects the most side by side;
In double structure cells, single cellular includes:
N+ type substrate (1), N+ type substrate (1) back side deposit drain metal forms the drain electrode of MOSFET element, and the upper growth of N+ type substrate (1) has N-type epitaxial layer (2);
It is formed with p-type post deep groove structure (3) from top down in N-type epitaxial layer (2) both sides of cellular;
N-type epitaxial layer (2) crown center at cellular is formed with trench gate (5), and trench gate (5) is as the grid of MOSFET element;
The grid oxide layer (4) playing buffer action it is formed with at the sidewall of trench gate (5) and bottom;
It is formed with PXing Ti district (6) between N-type epitaxial layer (2) top channel grid (5) the sidewall grid oxide layer and p-type post deep groove structure (3) of cellular;In double structure cells, PXing Ti district (6) degree of depth of single cellular internal channel grid (5) left and right sides is different;
PXing Ti district (6) top is formed with N+ type source region (7);PXing Ti district (6) is formed with the P+ type contact area for contacting with p-type post deep groove structure (3) top;
Source metal (8) is deposited on N-type epitaxial layer (2) top, is connected with p-type post deep groove structure (3), PXing Ti district (6) and N+ type source region (7), forms the source electrode of MOSFET element;Dielectric layer (9) is had to isolate between source metal (8) and trench gate (5).
The groove grid super node MOSFET device of gradual switching characteristic the most as claimed in claim 1, it is characterised in that:
In double structure cells, the PXing Ti district (6) of trench gate (5) both sides is degree of depth left and right specular in the cellular of two, left and right.
CN201620257794.4U 2016-03-30 2016-03-30 Trench gate of gradual switching characteristic surpasses knot MOSFET device Active CN205488140U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107591453A (en) * 2017-10-24 2018-01-16 贵州芯长征科技有限公司 Groove grid super node MOSFET device and preparation method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107591453A (en) * 2017-10-24 2018-01-16 贵州芯长征科技有限公司 Groove grid super node MOSFET device and preparation method thereof

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PE01 Entry into force of the registration of the contract for pledge of patent right

Denomination of utility model: Trench gate of gradual switching characteristic surpasses knot MOSFET device

Effective date of registration: 20170117

Granted publication date: 20160817

Pledgee: Agricultural Bank of China Limited by Share Ltd. Wuxi science and Technology Branch

Pledgor: WUXI TONGFANG MICROELECTRONICS Co.,Ltd.

Registration number: 2017990000043

PLDC Enforcement, change and cancellation of contracts on pledge of patent right or utility model
CP03 Change of name, title or address

Address after: 214135 D2 four, China International Innovation Network, China sensor network, No. 200 Linghu Avenue, new Wu District, Wuxi, Jiangsu.

Patentee after: WUXI UNIGROUP MICROELECTRONICS CO.,LTD.

Country or region after: China

Address before: 214135 China Jiangsu Sensor Network International Innovation Park 200, Linghu Avenue, Wuxi new district.

Patentee before: WUXI TONGFANG MICROELECTRONICS Co.,Ltd.

Country or region before: China

CP03 Change of name, title or address
PC01 Cancellation of the registration of the contract for pledge of patent right

Granted publication date: 20160817

Pledgee: Agricultural Bank of China Limited by Share Ltd. Wuxi science and Technology Branch

Pledgor: WUXI TONGFANG MICROELECTRONICS Co.,Ltd.

Registration number: 2017990000043

PC01 Cancellation of the registration of the contract for pledge of patent right