CN205408081U - Tuner test system - Google Patents
Tuner test system Download PDFInfo
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- CN205408081U CN205408081U CN201620127648.XU CN201620127648U CN205408081U CN 205408081 U CN205408081 U CN 205408081U CN 201620127648 U CN201620127648 U CN 201620127648U CN 205408081 U CN205408081 U CN 205408081U
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Abstract
The utility model discloses a tuner test system, including test signal generating circuit, the frequency control signal generation circuit, a first adjustment resistance for making the test signal's of test signal generating circuit output voltage equals first voltage, a the second adjustment resistance for making the test signal's of test signal generating circuit output voltage equals second voltage, an on -off control device for controlling DC power supply switches on or turn -offs with the power end of frequency control signal generation circuit, a port circuit for controlling the 2nd on -off control device on the first end of first adjustment resistance or the first termination ground of the second adjustment resistance and being connected with tuner and detection device respectively. This system need not transform original circuit (for example STB) and can realize carrying out the purpose of testing to the tuner, and the low price of the components and parts that adopt of this system, so with low costs, this system is hardware architecture simultaneously, compares with the software program, debugs easily.
Description
Technical field
This utility model relates to television equipment field tests, particularly relates to a kind of tuner test system.
Background technology
Tuner (also known as lnb), is a kind of circuit for TV signal carries out low noise amplification and frequency conversion, in order to ensure the normal operation of tuner, it is necessary to tuner is tested.And the mode that tuner is tested is: export the signal tremendously high frequency head of four kinds of states respectively, then respectively the situation exporting signal that tuner is corresponding is analyzed, judges that whether this tuner is normal.
The test system of current tuner mainly has two kinds, the internal circuit of Set Top Box is reequiped by a kind of needs, the signal tremendously high frequency head of Set Top Box four kinds of states of output is controlled by arranging toggle switch, this system needs the software and hardware in Set Top Box to co-operate, therefore not easily debug, and need all to reequip the Set Top Box being used for testing, cost is high；
Another kind is to use single-chip microcomputer, controls to export the signal of four kinds of required states by coding in single-chip microcomputer, and this system needs the program write is debugged, and debugging efforts is complicated, and uses the cost height of single-chip microcomputer.
Therefore, how to provide a kind of cost low and the tuner test system of easy debugging is the problem that those skilled in the art are presently required solution.
Utility model content
The purpose of this utility model is to provide a kind of tuner test system, it is not necessary to original circuit (such as Set Top Box) carries out the purpose that transformation can realize tuner is tested, and cost is low；And easily debug.
For solving above-mentioned technical problem, this utility model provides a kind of tuner test system, device and the port circuit being connected respectively is controlled with tuner and detecting device including testing signal generation circuit, frequency control signal generative circuit, the first adjustment resistance, the second adjustment resistance, the first switch controlling device, second switch, wherein:
Described first switch controlling device is connected with the power end of DC source and described frequency control signal generative circuit respectively；
The signal output part of described frequency control signal generative circuit is connected with the adjustment end of described testing signal generation circuit by the first capacitance；
Described second switch control device respectively with described first adjust resistance the first end, described second adjust resistance the first end and ground be connected；Described second switch controls device and adjusts the first end ground connection of resistance for controlling the described first the first end adjusting resistance or described second；
The input of described testing signal generation circuit is connected with described DC source；The end that adjusts of described testing signal generation circuit is connected with the described first the second end adjusting resistance and the described second the second end adjusting resistance respectively；The outfan of described testing signal generation circuit is connected with described port circuit；Wherein, the described first voltage adjusting the resistance test signal for making described testing signal generation circuit export is equal to the first voltage；Described second voltage adjusting the resistance described test signal for making described testing signal generation circuit export is equal to the second voltage.
Preferably, described port circuit includes the first port and the second port, wherein:
First end of described first port is for being connected with described tuner, and the second end of described first port is connected with the first end of described second port by the second capacitance；Second end of described first port is connected also by the outfan of high-frequency signal blocking apparatus with described testing signal generation circuit；
Second end of described second port is for being connected with described detecting device.
Preferably, described frequency control signal generative circuit is single schmidt trigger inverter.
Preferably, also include:
Mu balanced circuit, the input of described mu balanced circuit is connected with described first switch controlling device, and the outfan of described mu balanced circuit is connected with the power end of described frequency control signal generative circuit.
Preferably, described second switch control device is:
Single-pole double-throw switch (SPDT), the moved end ground connection of described single-pole double-throw switch (SPDT), the first of described single-pole double-throw switch (SPDT) not moved end is connected with the described first the first end adjusting resistance, and the second of described single-pole double-throw switch (SPDT) not moved end is connected with the described second the first end adjusting resistance.
Preferably, also include:
For avoiding the both positive and negative polarity of described DC source to connect anti-diode, the anode of described diode is connected with described DC source, and the negative electrode of described diode is connected with the input of described testing signal generation circuit and described first switch controlling device respectively.
Preferably, this system also includes:
Metal shell, described testing signal generation circuit, described frequency control signal generative circuit, described first switch controlling device, described second switch control device, described first adjustment resistance, described second adjustment resistance, described mu balanced circuit and described diode and are respectively positioned in described metal shell, and described first port and described second port are arranged on described metal shell.
Preferably, described DC source is output voltage is the power supply of 20V.
Preferably, described first adjustment resistance is resistance is the resistance of 1.83K Ω.
Preferably, described second adjustment resistance is resistance is the resistance of 2.37K Ω.
This utility model provides a kind of tuner test system, whether this system controls to turn between power end and the DC source of frequency control signal generative circuit by the first switch controlling device, whether output frequency controls signal to testing signal generation circuit to control frequency control signal generative circuit, thus the frequency controlling the test signal of testing signal generation circuit output is 0Hz or is predeterminated frequency；Second switch controls device can control the first end of the first adjustment resistance or the first end ground connection of the second adjustment resistance, thus controlling the testing signal generation circuit output voltage to the test signal of port circuit equal to the first voltage or the second voltage.Therefore this system is capable of the signal tremendously high frequency head of four kinds of states of output (two kinds of frequencies and two kinds of any combination of two of voltage), thus tuner is tested.As can be seen here, original circuit (such as Set Top Box) need not be carried out the purpose that transformation can realize tuner is tested and the low price of the components and parts of this utility model employing by the system in this utility model, therefore cost is low；This system is hardware configuration simultaneously, and compared with software program, debugging efforts is simple, therefore easily debugs.
Accompanying drawing explanation
In order to be illustrated more clearly that the technical scheme in this utility model embodiment, the accompanying drawing used required in prior art and embodiment will be briefly described below, apparently, accompanying drawing in the following describes is only embodiments more of the present utility model, for those of ordinary skill in the art, under the premise not paying creative work, it is also possible to obtain other accompanying drawing according to these accompanying drawings.
The structural representation of a kind of tuner test system that Fig. 1 provides for this utility model；
The structural representation of the another kind of tuner test system that Fig. 2 provides for this utility model；
The circuit diagram of the another kind of tuner test system that Fig. 3 provides for this utility model；
Wherein, in Fig. 3:
S1 the first switch controlling device, S2 second switch controls device, U1 testing signal generation circuit, U2 frequency control signal generative circuit, U3 mu balanced circuit, R1 first adjusts resistance, R2 second adjusts resistance, Port1 the first port, Port2 the second port, GND ground, C1 the first capacitance, C2 the second capacitance, C3 0.01 μ F electric capacity, C4 0.1 μ F electric capacity, C5 0.1 μ F electric capacity, C6 0.1 μ F electric capacity, C6 0.1 μ F electric capacity, DC20V 20V DC source, D1 diode, L high-frequency signal blocking apparatus.
Detailed description of the invention
Core of the present utility model is to provide a kind of tuner test system, it is not necessary to original circuit (such as Set Top Box) carries out the purpose that transformation can realize tuner is tested, and cost is low；And easily debug.
For making the purpose of this utility model embodiment, technical scheme and advantage clearly, below in conjunction with the accompanying drawing in this utility model embodiment, technical scheme in this utility model embodiment is clearly and completely described, obviously, described embodiment is a part of embodiment of this utility model, rather than whole embodiments.Based on the embodiment in this utility model, the every other embodiment that those of ordinary skill in the art obtain under not making creative work premise, broadly fall into the scope of this utility model protection.
Embodiment one
This utility model provides a kind of tuner test system, shown in Figure 1, the structural representation of a kind of tuner test system that Fig. 1 provides for this utility model；
This system includes testing signal generation circuit 18, frequency control signal generative circuit 14, first adjusts resistance 16, second and adjusts resistance the 17, first switch controlling device 11, second switch control device 12 and the port circuit 19 being connected with tuner and detecting device respectively, wherein:
First switch controlling device 11 is connected with the power end of DC source 13 and frequency control signal generative circuit 14 respectively；
The signal output part of frequency control signal generative circuit 14 is connected with the adjustment end of testing signal generation circuit 18 by the first capacitance 15；
Second switch control device 12 respectively with first adjust the first end of resistance 16, second adjust resistance 17 the first end and ground be connected；Second switch controls device 12 and adjusts the first end ground connection of resistance 17 for the first end or second controlling the first adjustment resistance 16；
The input of testing signal generation circuit 18 is connected with DC source 13；The end that adjusts of testing signal generation circuit 18 is connected with the first the second end adjusting resistance 16 and the second the second end adjusting resistance 17 respectively；The outfan of testing signal generation circuit 18 is connected with port circuit 19；Wherein, the first voltage adjusting the resistance 16 test signal for making testing signal generation circuit 18 export is equal to the first voltage；Second voltage adjusting the resistance 17 test signal for making testing signal generation circuit 18 export is equal to the second voltage.
This utility model provides a kind of tuner test system, whether this system controls to turn between power end and the DC source of frequency control signal generative circuit by the first switch controlling device, whether output frequency controls signal to testing signal generation circuit to control frequency control signal generative circuit, thus the frequency controlling the test signal of testing signal generation circuit output is 0KHz or is predeterminated frequency；Second switch controls device can control the first end of the first adjustment resistance or the first end ground connection of the second adjustment resistance, thus controlling the testing signal generation circuit output voltage to the test signal of port circuit equal to the first voltage or the second voltage.Therefore this system is capable of the signal tremendously high frequency head of four kinds of states of output (two kinds of frequencies and two kinds of any combination of two of voltage), thus tuner is tested.As can be seen here, original circuit (such as Set Top Box) need not be carried out the purpose that transformation can realize tuner is tested and the low price of the components and parts of this utility model employing by the system in this utility model, therefore cost is low；This system is hardware configuration simultaneously, and compared with software program, debugging efforts is simple, therefore easily debugs.
Embodiment two
On basis based on embodiment one, this utility model additionally provides another kind of tuner test system, and referring to shown in Fig. 2 and Fig. 3, Fig. 2 tests the structural representation of system for the another kind of tuner that this utility model provides；The circuit diagram of the another kind of tuner test system that Fig. 3 provides for this utility model.
In this embodiment, port circuit 19 includes the first port 23 and the second port 24, wherein:
First end of the first port 23 is for being connected with tuner, and the second end of the first port 23 is connected with the first end of the second port 24 by the second capacitance 25；Second end of the first port 23 is connected also by the outfan of high-frequency signal blocking apparatus 22 with testing signal generation circuit 18；
Second end of the second port 24 is for being connected with detecting device.
Wherein, the port Impedance of the first port 23 can be 75 Ω, and the port Impedance of the second port 24 can be 50 Ω.Certainly, this utility model does not limit the port Impedance value of two above port.
It is understandable that, testing signal generation circuit 18 exports the signal tremendously high frequency head of four kinds of states by the first port 23, tuner is after the signal often receiving a kind of state, output high-frequency signal that can be corresponding is to the second port 24, then pass through the second port 24 export to detecting device carry out detection analyze, circuit operation is affected, it is necessary to high-frequency signal blocking apparatus 22 is set and intercepts in order to avoid the high-frequency signal of tuner output enters testing signal generation circuit 18.
Wherein, high-frequency signal blocking apparatus 22 here is inductance.Certainly, this utility model is to this and is not specially limited, and any device intercepting the purpose of high-frequency signal that is capable of is all within protection domain of the present utility model.
Wherein, testing signal generation circuit 18 here can be the power IC of LM317 for model, and the output voltage of this circuit is adjustable.Certainly, this is not construed as limiting by this utility model.
It addition, the first capacitance 15 and the second capacitance 25 in order that isolated DC signal, it is to avoid testing signal generation circuit 18 and detecting device are impacted.Wherein, the first capacitance 15 can be the electric capacity of 1 μ F, and the second capacitance 25 can be the electric capacity of 0.1 μ F.Certainly, the concrete numerical value of the first capacitance 15 and the second capacitance 25 is not limited by this utility model.
Wherein, frequency control signal generative circuit 14 here is single schmidt trigger inverter.The model of single schmidt trigger inverter here can be 74LVC1G14GW, now, shown in Figure 3, and 4 pins of single schmidt trigger inverter are signal output part, and 5 pins are power end (i.e. VCC pin).Certainly, type and the model of frequency control signal generative circuit 14 are all not construed as limiting by this utility model, as long as when disclosure satisfy that conducting between the power end and DC source 13 of frequency control signal generative circuit 14 and when turning off between power end and the DC source 13 of frequency control signal generative circuit 14, the frequency control signal of frequency control signal generative circuit 14 output can make the frequency testing signal that testing signal generation circuit 18 exports meet default two kind frequency state.Certainly, the concrete condition of two kinds of default frequency state is not limited by this utility model.
As preferably, also including:
Mu balanced circuit 20, input and first switch controlling device 11 of mu balanced circuit 20 are connected, and the outfan of mu balanced circuit 20 is connected with the power end of frequency control signal generative circuit 14.
It is understandable that, when second switch control device 12 switches over, the voltage of the test signal of testing signal generation circuit 18 output can change, now, the voltage adjusting end place of testing signal generation circuit 18 also can change, thus the amplitude of frequency control signal that frequency control signal generative circuit 14 exports can be caused unstable, accordingly, it would be desirable to mu balanced circuit 20 stablizes the amplitude of frequency control signal.
Wherein, the first switch controlling device 11 here can be single-pole single-throw switch (SPST) or single-pole double-throw switch (SPDT).When the first switch controlling device 11 is single-pole single-throw switch (SPST), the first end of this single-pole single-throw switch (SPST) is connected with DC source 13, and the second end of single-pole single-throw switch (SPST) is connected with the power end of frequency control signal generative circuit 14；When the first switch controlling device 11 is single-pole double-throw switch (SPDT), the first of this single-pole double-throw switch (SPDT) not moved end is connected with DC source 13, the second of single-pole double-throw switch (SPDT) not moved end is unsettled, and the moved end of single-pole double-throw switch (SPDT) is connected with the power end of frequency control signal generative circuit 14.
It addition, second switch here controls device 12 it is:
Single-pole double-throw switch (SPDT), the moved end ground connection of single-pole double-throw switch (SPDT), the first of single-pole double-throw switch (SPDT) not moved end is connected with the first the first end adjusting resistance 16, and the second of single-pole double-throw switch (SPDT) not moved end is connected with the second the first end adjusting resistance 17.
It is further known that, it can also be two single-pole single-throw switch (SPST)s that second switch here controls device 12, controls the first end whether ground connection of the first end of the first adjustment resistance 16 and the second adjustment resistance 17 respectively.
Certainly, these are only preferred version, this utility model does not limit the particular type of the first switch controlling device 11 and second switch control device 12.
As preferably, this system also includes:
For avoiding the both positive and negative polarity of DC source 13 to connect anti-diode 21, the anode of diode 21 is connected with DC source 13, and the negative electrode of diode 21 is connected with the input of testing signal generation circuit 18 and the first switch controlling device 11 respectively.
As preferably, this system also includes:
Metal shell, testing signal generation circuit 18, frequency control signal generative circuit the 14, first switch controlling device 11, second switch control device the 12, first adjustment resistance the 16, second adjustment resistance 17, mu balanced circuit 20 and diode 21 and are respectively positioned in metal shell, and the first port 23 and the second port 24 are arranged on metal shell.
It is understood that adopt the metal shell of integration, it is possible to avoid test signal by external interference；And the metal shell in this utility model is only connected to a wire for connecting DC source 13, and connecting Set Top Boxes compared with the mode of switch with prior art needs many connecting lines of employing, the structure of this system is more simple, also allows for moving.
Wherein, DC source 13 is the power supply of 20V for output voltage.Certainly, this utility model does not limit the size of the output voltage of DC source 13, as long as its output voltage disclosure satisfy that the normal operation of the system in this utility model.
It addition, first adjusts the resistance that resistance 16 is 1.83K Ω for resistance, second adjusts the resistance that resistance 17 is 2.37K Ω for resistance.Certainly, these are only preferred version, this utility model adjusts resistance 16 to first and the second concrete resistance adjusting resistance 17 is not specially limited.
It is understood that the signal of four kinds of states needed for test tuner is 13V/0KHz, 13V/22KHz, 18V/0KHz and 18V/22KHz, namely the first voltage is 13V, and the second voltage is 18V.
As can be seen here, when the first switch controlling device 11 controls conducting between the power end of frequency control signal generative circuit 14 and DC source 13, frequency control signal generative circuit 14 can export 22KHz and control signal to testing signal generation circuit 18, the frequency of the test signal controlling testing signal generation circuit 18 output is 22KHz, when the first switch controlling device 11 controls to turn off between the power end of frequency control signal generative circuit 14 and DC source 13, frequency control signal generative circuit 14 can export 0KHz and control signal to testing signal generation circuit 18, the frequency of the test signal of testing signal generation circuit 18 output is 0KHz；When second switch controls the first end ground connection that device 12 controls the first adjustment resistance 16, the voltage of the test signal of testing signal generation circuit 18 output is 13V, when second switch controls the first end ground connection that device 12 controls the second adjustment resistance 17, the voltage of the test signal of testing signal generation circuit 18 output is 18V.
Certainly, the concrete numerical value of the frequency in above four kinds of states Yu voltage is all not particularly limited by this utility model.
Compared with embodiment one, the present embodiment further increases mu balanced circuit to stablize the amplitude of the frequency control signal of frequency control signal generative circuit output；Also add diode, it is possible to avoid DC source to connect and inverse time native system is caused damage；Meanwhile, the present embodiment adopts the metal shell of integration can avoid the interference that outer bound pair test signal causes as far as possible, thus improve the accuracy of tuner test.
It should be noted that, in this manual, the relational terms of such as first and second or the like is used merely to separate an entity or operation with another entity or operating space, and not necessarily requires or imply the relation that there is any this reality between these entities or operation or sequentially.And, term " includes ", " comprising " or its any other variant are intended to comprising of nonexcludability, so that include the process of a series of key element, method, article or equipment not only include those key elements, but also include other key elements being not expressly set out, or also include the key element intrinsic for this process, method, article or equipment.When there is no more restriction, statement " including ... " key element limited, it is not excluded that there is also other identical element in including the process of described key element, method, article or equipment.
Described above to the disclosed embodiments, makes professional and technical personnel in the field be capable of or uses this utility model.The multiple amendment of these embodiments be will be apparent from for those skilled in the art, and generic principles defined herein when without departing from spirit or scope of the present utility model, can realize in other embodiments.Therefore, this utility model is not intended to be limited to the embodiments shown herein, and is to fit to the widest scope consistent with principles disclosed herein and features of novelty.
Claims (10)
1. a tuner test system, it is characterized in that, device and the port circuit being connected respectively is controlled with tuner and detecting device including testing signal generation circuit, frequency control signal generative circuit, the first adjustment resistance, the second adjustment resistance, the first switch controlling device, second switch, wherein:
Described first switch controlling device is connected with the power end of DC source and described frequency control signal generative circuit respectively；
The signal output part of described frequency control signal generative circuit is connected with the adjustment end of described testing signal generation circuit by the first capacitance；
Described second switch control device respectively with described first adjust resistance the first end, described second adjust resistance the first end and ground be connected；Described second switch controls device and adjusts the first end ground connection of resistance for controlling the described first the first end adjusting resistance or described second；
The input of described testing signal generation circuit is connected with described DC source；The end that adjusts of described testing signal generation circuit is connected with the described first the second end adjusting resistance and the described second the second end adjusting resistance respectively；The outfan of described testing signal generation circuit is connected with described port circuit；Wherein, the described first voltage adjusting the resistance test signal for making described testing signal generation circuit export is equal to the first voltage；Described second voltage adjusting the resistance described test signal for making described testing signal generation circuit export is equal to the second voltage.
2. system according to claim 1, it is characterised in that described port circuit includes the first port and the second port, wherein:
First end of described first port is for being connected with described tuner, and the second end of described first port is connected with the first end of described second port by the second capacitance；Second end of described first port is connected also by the outfan of high-frequency signal blocking apparatus with described testing signal generation circuit；
Second end of described second port is for being connected with described detecting device.
3. system according to claim 2, it is characterised in that described frequency control signal generative circuit is single schmidt trigger inverter.
4. system according to claim 2, it is characterised in that also include:
Mu balanced circuit, the input of described mu balanced circuit is connected with described first switch controlling device, and the outfan of described mu balanced circuit is connected with the power end of described frequency control signal generative circuit.
5. system according to claim 4, it is characterised in that described second switch controls device and is:
Single-pole double-throw switch (SPDT), the moved end ground connection of described single-pole double-throw switch (SPDT), the first of described single-pole double-throw switch (SPDT) not moved end is connected with the described first the first end adjusting resistance, and the second of described single-pole double-throw switch (SPDT) not moved end is connected with the described second the first end adjusting resistance.
6. system according to claim 4, it is characterised in that also include:
For avoiding the both positive and negative polarity of described DC source to connect anti-diode, the anode of described diode is connected with described DC source, and the negative electrode of described diode is connected with the input of described testing signal generation circuit and described first switch controlling device respectively.
7. system according to claim 6, it is characterised in that this system also includes:
Metal shell, described testing signal generation circuit, described frequency control signal generative circuit, described first switch controlling device, described second switch control device, described first adjustment resistance, described second adjustment resistance, described mu balanced circuit and described diode and are respectively positioned in described metal shell, and described first port and described second port are arranged on described metal shell.
8. system according to claim 1, it is characterised in that described DC source is output voltage is the power supply of 20V.
9. system according to claim 8, it is characterised in that described first adjustment resistance is resistance is the resistance of 1.83K Ω.
10. system according to claim 9, it is characterised in that described second adjustment resistance is resistance is the resistance of 2.37K Ω.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620127648.XU CN205408081U (en) | 2016-02-18 | 2016-02-18 | Tuner test system |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201620127648.XU CN205408081U (en) | 2016-02-18 | 2016-02-18 | Tuner test system |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106791816A (en) * | 2016-12-27 | 2017-05-31 | 珠海迈科智能科技股份有限公司 | A kind of method for detecting tuner voltage |
| CN108733853A (en) * | 2017-04-17 | 2018-11-02 | 东莞百电子有限公司 | A kind of novel high-frequency head emulation actual measurement system |
| CN113645461A (en) * | 2021-07-08 | 2021-11-12 | 浙江盛洋科技股份有限公司 | Novel tuner test circuit and test fixture |
-
2016
- 2016-02-18 CN CN201620127648.XU patent/CN205408081U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106791816A (en) * | 2016-12-27 | 2017-05-31 | 珠海迈科智能科技股份有限公司 | A kind of method for detecting tuner voltage |
| CN106791816B (en) * | 2016-12-27 | 2018-08-10 | 珠海迈科智能科技股份有限公司 | A method of detection tuner voltage |
| CN108733853A (en) * | 2017-04-17 | 2018-11-02 | 东莞百电子有限公司 | A kind of novel high-frequency head emulation actual measurement system |
| CN113645461A (en) * | 2021-07-08 | 2021-11-12 | 浙江盛洋科技股份有限公司 | Novel tuner test circuit and test fixture |
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