CN205160990U - Power semiconductor device versatile protector - Google Patents
Power semiconductor device versatile protector Download PDFInfo
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- CN205160990U CN205160990U CN201520917777.4U CN201520917777U CN205160990U CN 205160990 U CN205160990 U CN 205160990U CN 201520917777 U CN201520917777 U CN 201520917777U CN 205160990 U CN205160990 U CN 205160990U
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Abstract
The utility model provides a power semiconductor device versatile protector, include radiator, mounting substrate, current induction detection circuit, response PCB board, power semiconductor device, wherein power semiconductor device has leading -out terminal, power semiconductor device fixes at mounting substrate, mounting substrate fixes on the radiator, current induction detection circuit suit is on leading -out terminal, response PCB board is fixed on leading -out terminal. Its advantage lies in guaranteeing power semiconductor device's thermal conductivity and does not receive the influence of environment to the device. Can improve 30~40% power density, with under the constant power operating condition, volume reducible 50%.
Description
Technical field
The utility model relates to a kind of power semiconductor device comprehensive protector, and be applied in technical grade power semiconductor device chip package, real realization does not rely on peripheral circuit, and the device directly become from chip package completes comprehensive precisely protection.Improve power density and the reliability of power semiconductor device.
Background technology
Current power semiconductor device mainly contains enhancement mode controllable silicon (GTO) and High Performance Insulation transistor npn npn (IGBT).Power semiconductor device lost efficacy, damage principal mode excess temperature, short circuit and overvoltage.What cause power semiconductor device excess temperature to damage is the thermal fatigue phenomenon of device, and reason has heat dissipation design improper, and drive circuit design is unreasonable, the change etc. that extraneous load occurs.The reason forming power semiconductor device Damage by Short Circuit is that load isolation is bad, the short out road of bridge etc. that external impurities causes.The reason of power semiconductor device excessive pressure damages is caused to be that busbar voltage rises, the shutoff crest voltage etc. that extraneous noise (lightning surge) and inductive load occur.Above disabling damage form has contained the disabling damage scope of more than 95% of power semiconductor device.
Power semiconductor device must be long-term, highly reliable work, to guarantee safety.Currently generally all some drive circuits are set in power semiconductor device periphery, comprise various protective circuit.But this type of drive circuit or professional IC driver do not work under Same Physical environment with power semiconductor device.Therefore to the various disabling damage induction speed that device produces, there is inconsistency in comprehensive treatment capability etc.
Utility model content
The purpose of this utility model aims to provide a kind of power semiconductor device comprehensive protector, to overcome the existing defects of above-mentioned prior art.
The utility model provides a kind of power semiconductor device comprehensive protector, comprises, radiator, installation base plate, electric current induction sensing circuit, induction pcb board, power semiconductor device; Wherein power semiconductor device has leading-out terminal; Power semiconductor device is fixed on installation base plate; Installation base plate is fixing on a heat sink; Electric current induction sensing circuit is sleeved on leading-out terminal; Induction pcb board is fixed on leading-out terminal.
Further, the utility model provides a kind of power semiconductor device comprehensive protector, can also have such feature: radiator is concave character type radiator.
Further, the utility model provides a kind of power semiconductor device comprehensive protector, can also have such feature: installation base plate is ceramic copper-clad plate.
Further, the utility model provides a kind of power semiconductor device comprehensive protector, can also have such feature: power semiconductor device is enhancement mode controlled silicon chip group or High Performance Insulation transistor npn npn chipset.
Further, the utility model provides a kind of power semiconductor device comprehensive protector, can also have such feature: induction pcb board is provided with excess voltage protection and thermal-shutdown circuit.
Further, the utility model provides a kind of power semiconductor device comprehensive protector, can also have such feature: adopt IC special glue by device package.
Further, the utility model provides a kind of power semiconductor device comprehensive protector, can also have such feature: electric current induction sensing circuit comprises: regulating resistance, output resistance, small-sized rectifier bridge stack, unidirectional triggering controllable silicon, electric current inductive pick-up and optocoupler; Regulating resistance is connected in parallel on the two ends of the coil of electric current inductive pick-up; The input of small-sized rectifier bridge stack is connected with the two ends of coil, and output is connected with the input of optocoupler; Unidirectional triggering silicon controlled positive pole is connected with an output of the first output, optocoupler; Negative pole is connected with the second output, trigger electrode is connected with another output of optocoupler through output resistance.
Further, the utility model provides a kind of power semiconductor device comprehensive protector, can also have such feature: excess voltage protection comprises piezo-resistance, current-limiting resistance, bidirectional trigger diode and light-emitting diode; Piezo-resistance is connected in parallel on power semiconductor device; After the positive pole series connection of current-limiting resistance, bidirectional trigger diode, light-emitting diode, in parallel with piezo-resistance.
Further, the utility model provides a kind of power semiconductor device comprehensive protector, can also have such feature: thermal-shutdown circuit comprises two temperature sensors, and next-door neighbour's power semiconductor device is arranged.
Accompanying drawing explanation
Fig. 1 is the structural representation of enhancement mode silicon controlled comprehensive protector.
Fig. 2 is the circuit diagram of enhancement mode silicon controlled comprehensive protector.
Fig. 3 is the structural representation of the comprehensive protector of High Performance Insulation transistor npn npn.
Fig. 4 is the circuit diagram of the comprehensive protector of High Performance Insulation transistor npn npn.
Embodiment
Below in conjunction with the drawings and specific embodiments, the utility model is further described.
Embodiment one
Fig. 1 is the structural representation of enhancement mode silicon controlled comprehensive protector.
As shown in Figure 1, enhancement mode silicon controlled comprehensive protector comprises: concave character type radiator 1, soldering-tin layer 2, installation base plate (DBC) 3, electric current induction sensing circuit 4, induction pcb board 5, leading-out terminal 6, interconnector 7, enhancement mode controlled silicon chip group 8 form.
Elder generation on installation base plate (DBC) 3, can form single core group, twin-core group, four-core group, six core groups and seven core groups by difference in functionality enhancement mode controlled silicon chip group 8 solidified welding.In order to strengthen the calorific intensity of installation base plate (DBC) 3, unsuitable multicore, with one piece of substrate, is no more than twin-core at most.Again the soldering-tin layer 2 that the installation base plate welding chipset (DBC) 3 is formed by middle temperature tin slurry is fixed on concave character type radiator 1, can area of dissipation be increased, improve power density.Using the leading-out terminal 6 of enhancement mode controlled silicon chip group 8 as support, electric current induction sensing circuit 4 is set in.According to different job requirements, function needs, can make different induction pcb boards 5 again, in the present embodiment, excess voltage protection and thermal-shutdown circuit are just arranged on induction pcb board 5.Induction pcb board 5, can multilayer also using the leading-out terminal 6 of enhancement mode controlled silicon chip 8 as support, three-dimensionally installs, and in the present embodiment, induction pcb board 5 is two-layer, is respectively thermal-shutdown circuit 5-1 and excess voltage protection 5-2.Interconnector 7 is the connecting line of an electronic devices and components.Finally encapsulate by IC special glue.
Fig. 2 is the circuit diagram of enhancement mode silicon controlled comprehensive protector.
As shown in Figure 2, connect with the circuit of single enhancement mode controlled silicon chip and be described, the single GTO controlled silicon chip GTO of enhancement mode controlled silicon chip group 8 is made up of two unidirectional controllable silicon S CR1, SCR2 reverse parallel connection.
Thermal-shutdown circuit 5-1 comprises the first temperature sensor R1 and the second temperature sensor R2.First temperature sensor R1 is PCT temperature sensor, and one end is connected with first input end Vin1, and the other end is connected with the trigger electrode of the unidirectional controllable silicon S CR1 of enhancement mode controlled silicon chip GTO.
Second temperature sensor R2 is also PCT temperature sensor, and one end is connected with the second input Vin2, and the other end is connected with the trigger electrode of the unidirectional controllable silicon S CR2 of enhancement mode controllable silicon (GTO) chip.First temperature sensor R1, the second temperature sensor R2 are separately positioned on the top of unidirectional controllable silicon S CR1, SCR2.
Excess voltage protection 5-2 comprises: piezo-resistance R3, current-limiting resistance R4, bidirectional trigger diode D1 and light-emitting diode D2.
Piezo-resistance R3 is connected in parallel on enhancement mode controlled silicon chip GTO, and two ends are connected with two output tie points of two unidirectional controllable silicon S CR1, SCR2 respectively.
After the positive pole series connection of current-limiting resistance R4, bidirectional trigger diode D1, light-emitting diode D2, in parallel with piezo-resistance R3, namely in parallel with enhancement mode controlled silicon chip GTO.
Electric current induction sensing circuit 4 comprises: regulating resistance R5, output resistance R6, small-sized rectifier bridge stack D3, unidirectional triggering controllable silicon SCR 3, electric current inductive pick-up L and optocoupler IC.
The coil of electric current inductive pick-up L is enclosed within the leading-out terminal of enhancement mode controlled silicon chip GTO.Regulating resistance R5 is connected in parallel on the two ends of coil.The small-sized input of rectifier bridge stack D3 is connected with the two ends of coil, and output is connected with the input of optocoupler IC.The positive pole of unidirectional triggering controllable silicon SCR 3 is connected with an output of the first output end vo ut1, optocoupler IC; Negative pole is connected with the second output end vo ut2, trigger electrode is connected with another output of optocoupler IC through output resistance R6.
Two leading-out terminals 6 are connected with two unidirectional controllable silicon S CR1 of enhancement mode controlled silicon chip GTO, the tie point of SCR2 respectively.
The course of work of enhancement mode silicon controlled general protective circuit:
Input control signal opened or turn off is held by first input end Vin1 and the second input Vin2, by the first temperature sensor R1, second temperature sensor R2, trigger two unidirectional controllable silicon S CR1, SCR2, namely enhancement mode controlled silicon chip GTO, obtain signal and drive conducting or the work of shutoff main circuit, PTC temperature sensor R1, R2 is arranged at two unidirectional controllable silicon S CR1 respectively, the top of SCR2, by the real-time chip operating temperature of IC special packaging plastic heat transfer, the resistance value of the first temperature sensor R1 and the second temperature sensor R2 is made to produce respective change with the working temperature of chip.The highest general design temperature is 120 DEG C.As exceeded this design temperature point, unidirectional controllable silicon S CR1, SCR2 just turn off work main circuit.This is also the process of an Automatic-searching heat balance operating current.Namely ensure that semiconductor electric chip can not cross cause thermal damage, autobalance can find a best operating point again.
The Special display absorbing circuit that excess voltage protection is made up of piezo-resistance R3, current-limiting resistance R4, diac D1 and light-emitting diode D2 is formed; the voltage that Absorbable rod is too high and the noise (lightning surge) that external environment condition produces, also have the shutoff crest voltage etc. that inductive load occurs.Also can show the operating state of power semiconductor device in real time.
Overcurrent (short circuit) protective circuit is enclosed within SCR1, SCR2 leading-out terminal, available one by electric current inductive pick-up L coil, also can two.The output voltage of the induction coil of regulating resistance R5 adjustable current inductive pick-up L, a direct voltage is obtained by small-sized rectifier bridge stack D3, optocoupler IC is driven to export, a switching signal Vout1 and Vout2 is obtained by output resistance R6 and unidirectional triggering controllable silicon SCR 3, this is one and is forced shutdown signal, this signal is by the unidirectional triggering SCR control of unidirectional triggering controllable silicon SCR 3, operating characteristic according to this device is reached a conclusion, once there is overcurrent (short circuit) state, must to control load maintenance down after overcurrent (short circuit) protective circuit startup work in device, and turn off input control signal and could work, there is a restarting process, guarantee safety.Overcurrent (short circuit) starts operating current can be set as 150%, 200%, 300% etc., to avoid producing too much misoperation according to different semiconductor electric chip rated capacity.
Embodiment two
Fig. 3 is the structural representation of the comprehensive protector of High Performance Insulation transistor npn npn.
As shown in Figure 3, the comprehensive protector of High Performance Insulation transistor npn npn comprises: concave character type radiator 1, soldering-tin layer 2, installation base plate (DBC) 3, electric current induction sensing circuit 4, induction pcb board 5, leading-out terminal 6, interconnector 7, High Performance Insulation transistor npn npn chipset 8 form.
The comprehensive protector of High Performance Insulation transistor npn npn is substantially identical with the structure of enhancement mode silicon controlled comprehensive protector, is not described in detail.What difference was this unit protection is that High Performance Insulation transistor npn npn and input temp guard method are slightly distinguished, and physical circuit is as follows:
Fig. 4 is the circuit diagram of the comprehensive protector of High Performance Insulation transistor npn npn.
As shown in Figure 4, the circuit of the comprehensive protector of High Performance Insulation transistor npn npn, responds to sensing circuit 4 by thermal-shutdown circuit 5-1, excess voltage protection 5-2 and electric current equally and forms.
Thermal-shutdown circuit 5-1 comprises the first temperature sensor R1 and the second temperature sensor R2.First temperature sensor R1 is PCT temperature sensor, and the second temperature sensor R2 is NTC temperature sensor.
One end of first temperature sensor R1 is connected with first input end Vin1, the base stage of the other end and High Performance Insulation transistor npn npn IGBT.One end of second temperature sensor R2 is connected with earth terminal GND, the other end also with the base stage of High Performance Insulation transistor npn npn IGBT.
A PWM switch or PLC industry control message is inputted by first input end Vin1, the temperature-control circuit consisted of PTC temperature sensor R1 and NTC temperature sensor R2 drives High Performance Insulation transistor npn npn (IGBT) work, when generation excess temperature phenomenon, be generally also set as 120 DEG C.The resistance value of PTC temperature sensor R1 and NTC temperature sensor R2 can produce respective change with the temperature sensed, PTC is positive temperature sensor R1, increases resistance value with the increase of temperature, and NTC temperature sensor R2 is that resistance value reduces with the increase of temperature.Like this, the grid of High Performance Insulation transistor npn npn IGBT can obtain a more sensitive protection.Automatically a heat balance function can be produced.Intelligence be operated in a suitable operating current.Due to setting up of NTC temperature sensor R2, quite not useful by electrostatic breakdown for ensureing the grid of High Performance Insulation transistor npn npn IGBT yet.Thus the protection making power semiconductor device more perfect.
Excess voltage protection 5-2 is identical with embodiment one with function with the operation principle of electric current induction sensing circuit 4, no longer repeated description.
The effect of embodiment and principle
The general disabling damage form of power semiconductor device is excess temperature, short circuit and overvoltage.For power semiconductor device, exactly the temperature of device inside, electric current all to there be is a relative fast and accurate mensuration with voltage, and are effectively controlled at device inside rapidly, to complete the integrated protection to power semiconductor device.According to our product test to current some power semiconductor device professional production companies both at home and abroad, excess temperature phenomenon is generally relatively slow in the performance of shell, but in fact excess temperature can produce thermal fatigue, has temperature cycle model and power cycle pattern two kinds.Under temperature cycle model, refer to power semiconductor device from start to and finally quit work, there is a temperature changing process more slowly on device outer case surface.Under power cycle pattern, in device, the variations injunction temperature of chip is frequent, and the acute variation of each junction temperature is all closely related with changed power.This is by one of factor of causing power semiconductor device excess temperature disabling damage to consider.Need measuring junction temperature from chip minimum distance and protected.According to our experiment, overheat protector also can produce a thermally equilibrated phenomenon, namely automatically the electric current exported is declined, is limited in certain scope.This is very useful.This also in a disguised form improves the power density of device.
For short-circuit failure protection, although the probability produced is not high, the consequence produced is disastrous, must be protected, otherwise will make device permanent damage within the us level time.This is also the reason needing just to obtain fastest response in device.
Overvoltage fail safe is fairly simple, and the schemes such as available TVS, piezo-resistance and Special display absorbing circuit solve.
Above three kinds of disabling damage form effects to power semiconductor device superpose often, if the junction temperature of chip of device is 120 DEG C time, when producing overcurrent or short circuit again, the material being interconnected employing between power semiconductor device chip is different, there is the chip of silicon materials, copper or aluminium connecting line, the tin layers of welding and the copper composite surface of insulated substrate, the thermal coefficient of expansion of their various materials is different, will produce stress inconsistent.And overcurrent or short circuit phenomenon exacerbate the frequent temperature rise of device.Be easy to cause power semiconductor device internal injury.So in order to avoid this synergistic effect, effectively must be controlled in power semiconductor device inside.
Overheat protector and short circuit (overcurrent) protection are all passed through current related with power semiconductor device; we are set by temperature sensor and current sensor in device; in 150% scope of the rated operational current of electrical device, belong to overheat protector scope, exceeding this rated current is exactly the scope that short circuit (overcurrent) is protected.The work of device must be stopped immediately.Power semiconductor device must from being entirely conducting to shutoff (cut-off) state within the us level second time.The power density that can improve electrical device like this can guarantee device safety again.
Also just like not to power semiconductor device overvoltage phenomenon in addition available protecting, be exactly most possibly produce partial breakdown, this puncturing can make power semiconductor device operationally extremely unstable, accelerates the damage of power semiconductor device.With this experimental analysis for conclusion, in order to this special requirement of power semiconductor device will be reached, work highly reliable, steady in a long-term.Above three comprehensively precisely defencive function must chip-scale must with reliably protecting in power semiconductor device.Reach intellectualized module (IPM) to control.
The power semiconductor devices such as enhancement mode controllable silicon (GTO) or High Performance Insulation transistor npn npn (IGBT) chip are welded on the installation base plate DBC (ceramic copper-clad plate) of power semiconductor device.A suitable inductive spacing is reserved between two or multiple chip.On the top of enhancement mode controllable silicon (GTO) or High Performance Insulation transistor npn npn (IGBT) chip, a thermally conductive insulating layer is set, with 3D form three-dimensional single or multiple lift superposition installation, there is the function induction pcb boards such as temperature, overcurrent, overvoltage induction again, like this can with do not increase on former chip package area basis with nearest location sensitive to electric semiconductor power chip temperature, electric current, change in voltage.
Above-mentioned functions induction pcb board, be a kind of induction pcb board that can arrange arbitrarily function, can be the induction pcb board of one piece of simple function, as having measuring ability to temperature, that just uses temperature sensor.Need there is requirement to temperature, electric current in this way, just can power up influenza induction sensor with temperature sensor.Can certainly be Full Featured, that be with regard to set temperature transducer, electric current inductive pick-up, overvoltage protection transducer, also can be included the Special display absorbing circuit device of inductive load protection even.This decides with the purposes of power semiconductor device.At the device of some special purposes, use as capacitive load (reactive power compensator) is upper, just can set soft starting mode, extend start-up time and achieve the goal.This is a kind of according to purposes in a word, very flexile compound mode.
On power semiconductor device leading-out terminal line cover, small current induction coil completes and detects the curent change of overcurrent or short circuit, can arrange single or two electric current induction coils and mutually connect, to improve detection sensitivity.And the input of FEEDBACK CONTROL power semiconductor device, us order reaction second speed can be reached like this.Simultaneously at power semiconductor device output TVS (transient overvoltage protection) in parallel or piezo-resistance, Special display absorbing circuit.
Special display absorbing circuit of the present utility model is made up of current-limiting resistance R4, bidirectional trigger diode D1, light-emitting diode D2.Be parallel to power semiconductor device output.When power semiconductor device place cut-off (not conducting) state, light-emitting diode obtains operating voltage by current-limiting resistance, bidirectional trigger diode, Quan Liang.When power semiconductor device is in conducting state, because the tube voltage drop of power semiconductor device is quite low, only have below 2V, be not enough to the operating voltage of supplying light-emitting diode, do not work.When power semiconductor device is in over-temperature condition, due to the effect of temperature sensor.Make the rising progressively of electric semiconductor tube voltage drop, also due to the effect of bidirectional trigger diode.Not enough driving bidirectional trigger diode conducting under 30V voltage.Light-emitting diode does not still work, and only has when power semiconductor device tube voltage drop is more than more than 30V.This light-emitting diode just starts from faint until very bright.This is the effective ways that very intuitive judgment electric semiconductor is overheated.This circuit also very effectively can absorb the various high-pressure sharp pulses that work main circuit may exist simultaneously, as the irregular burst of pulses of lightning induction etc.
After overall power semiconductor device has been tested, installation base plate (DBC) has directly welded on a heat sink.In order to reach best radiating effect, we devise concave character type radiator, and overall electronic semiconductor components is welded on the bottom surface of concave character type radiator, and such radiator has multiple side externally to dispel the heat simultaneously, finally the special sealing encapsulation of filling IC again.Ensure the heat conductivity of power semiconductor device and be not subject to environment on the impact of device.Can improve the power density of 30 ~ 40%, under Same Efficieney condition of work, volume can reduce 50%.
Power semiconductor device comprehensive protector of the present utility model because semiconductor electric chip integrated level is high, can be applicable to operating current from a few peace to a few kilo-ampere, operating voltage from a few hectovolt to the device of several kilovolts on a large scale in application.Can be widely used at three-phase circuit (technical grade), inverter, high-power frequency conversion, AC-DC-AC drives, the more real protection from chip-scale.Guarantee the safe and reliable of load and device.
Device of the present utility model can be applied on many dissimilar power semiconductor devices and improve and change, and all improvement are all considered to be in spirit and scope of the present utility model with change.As defined in the claim of the utility model patent.
Claims (9)
1. a power semiconductor device comprehensive protector, is characterized in that: comprise, radiator, installation base plate, electric current induction sensing circuit, induction pcb board, power semiconductor device;
Wherein said power semiconductor device has leading-out terminal;
Described power semiconductor device is fixed on installation base plate;
Described installation base plate is fixed on described radiator;
Described electric current induction sensing circuit is sleeved on described leading-out terminal;
Described induction pcb board is fixed on described leading-out terminal.
2. power semiconductor device comprehensive protector according to claim 1, is characterized in that:
Wherein, described radiator is concave character type radiator.
3. power semiconductor device comprehensive protector according to claim 1, is characterized in that:
Wherein, described installation base plate is ceramic copper-clad plate.
4. power semiconductor device comprehensive protector according to claim 1, is characterized in that:
Wherein, described power semiconductor device is enhancement mode controlled silicon chip group or High Performance Insulation transistor npn npn chipset.
5. power semiconductor device comprehensive protector according to claim 1, is characterized in that:
Wherein, described induction pcb board is provided with excess voltage protection and thermal-shutdown circuit.
6. power semiconductor device comprehensive protector according to claim 1, is characterized in that:
Adopt IC special glue by device package.
7. power semiconductor device comprehensive protector according to claim 1, is characterized in that:
Wherein, described electric current induction sensing circuit comprises: regulating resistance, output resistance, small-sized rectifier bridge stack, unidirectional triggering controllable silicon, electric current inductive pick-up and optocoupler;
Described regulating resistance is connected in parallel on the two ends of the coil of described electric current inductive pick-up; The input of described small-sized rectifier bridge stack is connected with the two ends of described coil, and output is connected with the input of described optocoupler; Described unidirectional triggering silicon controlled positive pole is connected with an output of the first output, described optocoupler; Negative pole is connected with the second output, trigger electrode is connected with another output of described optocoupler through described output resistance.
8. power semiconductor device comprehensive protector according to claim 5, is characterized in that:
Wherein, described excess voltage protection comprises piezo-resistance, current-limiting resistance, bidirectional trigger diode and light-emitting diode;
Described piezo-resistance is connected in parallel on described power semiconductor device; After the positive pole series connection of described current-limiting resistance, described bidirectional trigger diode, described light-emitting diode, in parallel with described piezo-resistance.
9. power semiconductor device comprehensive protector according to claim 5, is characterized in that:
Wherein, thermal-shutdown circuit comprises two temperature sensors, is close to described power semiconductor device and arranges.
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| CN201520917777.4U CN205160990U (en) | 2015-11-17 | 2015-11-17 | Power semiconductor device versatile protector |
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| CN201520917777.4U CN205160990U (en) | 2015-11-17 | 2015-11-17 | Power semiconductor device versatile protector |
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| CN205160990U true CN205160990U (en) | 2016-04-13 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105246286A (en) * | 2015-11-17 | 2016-01-13 | 杨友林 | Power semiconductor device integrated protection device and manufacturing method thereof |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105246286A (en) * | 2015-11-17 | 2016-01-13 | 杨友林 | Power semiconductor device integrated protection device and manufacturing method thereof |
| CN105246286B (en) * | 2015-11-17 | 2018-06-01 | 上海一旻成峰电子科技有限公司 | Power semiconductor device comprehensive protector and preparation method |
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Address after: Room 108, Building 3, Lane 1588, Youyi Road, Baoshan District, Shanghai 201900 Patentee after: Shanghai Yizhang Chengfeng Electronic Technology Co.,Ltd. Address before: Room 108, Building 3, Lane 1588, Youyi Road, Baoshan District, Shanghai 201900 Patentee before: SHANGHAI YIMIN CHENGFENG ELECTRONIC SCIENCE & TECHNOLOGY CO.,LTD. |
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| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160413 Termination date: 20211117 |