CN205123762U - 1. 25G -64G novel error rate test equipment of test speed can be set for wantonly to full rate - Google Patents

1. 25G -64G novel error rate test equipment of test speed can be set for wantonly to full rate Download PDF

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Publication number
CN205123762U
CN205123762U CN201520771711.9U CN201520771711U CN205123762U CN 205123762 U CN205123762 U CN 205123762U CN 201520771711 U CN201520771711 U CN 201520771711U CN 205123762 U CN205123762 U CN 205123762U
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China
Prior art keywords
circuit
test
detector
mcu controller
clock source
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CN201520771711.9U
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Chinese (zh)
Inventor
朱朝军
向刚
史玉栓
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Chengdu Rui Suogao Creates Photoelectricity Technology Corp Ltd
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Chengdu Rui Suogao Creates Photoelectricity Technology Corp Ltd
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Abstract

The utility model discloses a 1.25G -64G novel error rate test equipment of test speed can be set for wantonly to full rate solves the unable test of multifrequency section, the higher problem of cost of realizing of prior art. The utility model discloses a MCU controller, USB interface, pseudorandom code type generator and detector, clock source circuit, signal shaping circuit, power supply circuit, wherein, MCU controller, clock source circuit, signal shaping circuit equally divide other continuously with pseudorandom code type generator and detector, the MCU controller still links to each other with the USB interface to through USB interface and outside computer communication, power supply circuit provides the power for MCU controller, clock source circuit, signal shaping circuit, pseudorandom code type generator and detector. The utility model discloses satisfy mainstream light communication module's receiving and dispatching end test in the existing market, only needed all the index tests before the optical module shipment just can be accomplished to DCA of collocation and an attenuator, effectively reduced the manufacturing cost of optical module.

Description

A kind of 1.25G-64G full rate can set arbitrarily the novel error rate test equipment of test rate
Technical field
The utility model relates to the novel error rate test equipment that a kind of 1.25G-64G full rate can set arbitrarily test rate.
Background technology
A lot of Error Detector in the market, it is all but a frequency, continuous arbitrary velocity can not be done, performance can not meet the client in this frequency ranges all, need to buy multiple devices, hardware cost causes waste, and also will programme respectively to different equipment in the process of automated production, increases construction cycle and cost.
Utility model content
The purpose of this utility model is to provide a kind of 1.25G-64G full rate can set arbitrarily the novel error rate test equipment of test rate, solves prior art and cannot realize multiband test, the problem that cost is higher.
To achieve these goals, the technical solution adopted in the utility model is as follows:
1.25G-64G full rate can set arbitrarily a novel error rate test equipment for test rate, comprises MCU controller, USB interface, pseudorandom pattern generator and detector, clock source circuit, signal transformation circuit, power circuit;
Wherein, MCU controller, clock source circuit, signal transformation circuit are connected with detector with pseudorandom pattern generator respectively;
Described MCU controller is also connected with USB interface, and is communicated with outer computer by USB interface;
Described power circuit is MCU controller, clock source circuit, signal transformation circuit, pseudorandom pattern generator and detector provide power supply.
Further, the reference clock frequency of described clock source circuit is 0 ~ 200MHz.That is clock source circuit can produce any clock frequency of 0 ~ 200MHz.
Again further, described clock source circuit adopts SI5338A chip, and signal transformation circuit adopts GN2017 chip, and pseudorandom pattern generator and detector adopt GT1706 chip.Wherein, pseudorandom pattern generator and detector have multi-channel data transmission function, and signal transformation circuit has multi-channel data transmission function.
The utility model compared with prior art, has the following advantages and beneficial effect:
The utility model is the novel error rate test equipment that a kind of 1.25G-64G full rate can set arbitrarily test rate, can regulate continuously in this frequency range.Meet the sending and receiving end test of main flow optical communications module in the market, a DCA and attenuator of only need arranging in pairs or groups just can complete all index tests before optical module shipment, effectively reduces the production cost of optical module.In addition, the utility model also can be used for the vision signal of other high speed data transfer, the test of the products such as broadcast.
Accompanying drawing explanation
Fig. 1 is system block diagram of the present utility model.
Fig. 2 is clock source circuit schematic diagram in the utility model.
Fig. 3 is signal transformation circuit schematic diagram in the utility model.
Fig. 4 is the circuit theory diagrams of pseudorandom pattern generator and detector in the utility model.
Fig. 5 is the circuit theory diagrams of MCU controller in the utility model.
Embodiment
Below in conjunction with drawings and Examples, the utility model is described in further detail, and execution mode of the present utility model includes but not limited to the following example.
Embodiment
As shown in Fig. 1 ~ 5, a kind of 1.25G-64G full rate can set arbitrarily the novel error rate test equipment of test rate, comprises MCU controller, USB interface, pseudorandom pattern generator and detector, clock source circuit, signal transformation circuit, power circuit;
Wherein, MCU controller, clock source circuit, signal transformation circuit are connected with detector with pseudorandom pattern generator respectively;
Described MCU controller is also connected with USB interface, and is communicated with outer computer by USB interface;
Described power circuit is MCU controller, clock source circuit, signal transformation circuit, pseudorandom pattern generator and detector provide power supply.
In addition, the reference clock frequency of described clock source circuit is 0 ~ 200MHz.Described clock source circuit adopts SI5338A chip, and signal transformation circuit adopts GN2017 chip, and pseudorandom pattern generator and detector adopt GT1706 chip.
Operation principle of the present utility model is as follows:
Clock source circuit produces any clock frequency of 0 ~ 200MHz, and pseudorandom pattern generator and detector carry out arbitrary integer frequency adjustment doubly according to the clock of input, the bandwidth Design that but chip ensures is 1.25G ~ 64G, so within the scope of this, the Error detection of arbitrary velocity within the scope of this can be accomplished as required; And because pseudorandom pattern generator and detector are multichannel designs, 4 passages are employed in the utility model, detect so can do 4 tunnels simultaneously, can 40G(4 × 16G be met) test of module, also can use wherein any a few road, each passage works alone, signal transformation circuit also has 4 tunnels accordingly, every road signal is independently adjusted, can shake be reduced, the rise and fall time of adjustment signal and signal output amplitude.In addition, power circuit is by outside 5V DC power supply input, the power supply that on generation equipment, all parts need.
When reality uses, MCU controller controls above-mentioned each parts, simultaneously by USB interface and compunication, realizes automatic test.
What deserves to be explained is, the utility model can realize detecting the error rate of different rates, and one multiplex, does not need to be equipped with special tester to each speed, greatly reduces input cost.
According to above-described embodiment, just the utility model can be realized well.What deserves to be explained is; under prerequisite based on said structure design; for solving same technical problem; even if some making on the utility model are without substantial change or polishing; the essence of the technical scheme adopted is still the same with the utility model, therefore it also should in protection range of the present utility model.

Claims (3)

1. 25G-64G full rate can set arbitrarily a novel error rate test equipment for test rate, it is characterized in that, comprises MCU controller, USB interface, pseudorandom pattern generator and detector, clock source circuit, signal transformation circuit, power circuit;
Wherein, MCU controller, clock source circuit, signal transformation circuit are connected with detector with pseudorandom pattern generator respectively;
Described MCU controller is also connected with USB interface, and is communicated with outer computer by USB interface;
Described power circuit is MCU controller, clock source circuit, signal transformation circuit, pseudorandom pattern generator and detector provide power supply.
2. a kind of 1.25G-64G full rate according to claim 1 can set arbitrarily the novel error rate test equipment of test rate, it is characterized in that, the reference clock frequency of described clock source circuit is 0 ~ 200MHz.
3. a kind of 1.25G-64G full rate according to claim 2 can set arbitrarily the novel error rate test equipment of test rate, it is characterized in that, described clock source circuit adopts SI5338A chip, signal transformation circuit adopts GN2017 chip, and pseudorandom pattern generator and detector adopt GT1706 chip.
CN201520771711.9U 2015-09-30 2015-09-30 1. 25G -64G novel error rate test equipment of test speed can be set for wantonly to full rate Active CN205123762U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201520771711.9U CN205123762U (en) 2015-09-30 2015-09-30 1. 25G -64G novel error rate test equipment of test speed can be set for wantonly to full rate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201520771711.9U CN205123762U (en) 2015-09-30 2015-09-30 1. 25G -64G novel error rate test equipment of test speed can be set for wantonly to full rate

Publications (1)

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CN205123762U true CN205123762U (en) 2016-03-30

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105119782A (en) * 2015-09-30 2015-12-02 成都瑞索高创光电技术有限公司 New type bit error rate test equipment with full rate 1.25G to 64 G capable of arbitrarily setting test speed

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105119782A (en) * 2015-09-30 2015-12-02 成都瑞索高创光电技术有限公司 New type bit error rate test equipment with full rate 1.25G to 64 G capable of arbitrarily setting test speed

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