Background
The data output channel is a necessary component for data transmission of a computer control system, various intelligent instruments, signal generators, audio and video players and the like, along with the development of scientific technology, the requirement on the data transmission rate is increasingly improved, and the requirement on high-speed data output cards for various purposes is increasingly and urgently increased.
Computer control system and many high-grade intelligent instruments and meters, signal generator, audio and video player, etc. all use the computer as the core, and the general fast bus of the computer mainly has USB, PCI and PCIe, etc., the transmission bandwidth of these three kinds of buses is respectively:
1. the theoretical bandwidth of the USB3.0 transmission rate is 5Gbps, and the actual bandwidth is (5 Gbps 8/10)/8 =500 MB/s.
2. The theoretical bandwidth of the PCI transfer rate is 528 MB/s.
3. The PCIe transmission rate table is as follows:
PCIe edition |
Bandwidth per link per direction |
16 link bidirectional total bandwidth |
PCIe1.x |
250MB/s |
8GB/s |
PCIe2.x |
500MB/s |
16GB/s |
PCIe3.0 |
1GB/s |
32GB/s |
From the above data, it can be seen that the PCIe bus transfers much faster than other buses. High-end fast output cards with strong universality and large batch at home and abroad mostly adopt 16 link buses of PCIe2.x, and some high-end fast output cards even adopt 16 link buses of PCIe3.0. However, the high-end fast output cards with special purposes and small use amount adopt few 16-link buses of PCIe2.x, and adopt fewer 16-link buses of PCIe3.0, even though the price is extremely high. The main reasons are as follows: first, FPGAs are generally used for developing special-purpose products with small usage amount, but the FPGAs have a disadvantage that the speed is not fast enough, and under the same other indexes, the fast speed chips in the FPGA series are prohibitively expensive compared with the slow speed chips, while the 16-link bus speed of pci 2.x or pci 3.0 is too fast, the cost is high by adopting the FPGA scheme, and is not competitive for general commercial products, while the speed is not an issue by adopting the ASIC scheme, but the manufacturing cost is high if the products are not produced in batch. Secondly, since the 16-link bus of pci 2.x or pci 3.0 has too fast speed, developers need to have great experience, and advanced development tools and development platforms are needed, so that the 16-link bus data output card of pci 2.x or pci 3.0 has the defects of great development difficulty, long development period, high development cost and the like, and is not suitable for the situations of special product purposes, small generation quantity, short development period requirement and unsuitable too high product price.
Disclosure of Invention
The technical problem to be solved by the invention is to provide a universal data transmission system for transmitting data at a high rate.
The technical scheme of the invention is as follows:
a universal data transmission system comprises a computer host and at least one data transmission device, wherein at least one display interface is configured on the computer host;
the computer host is connected with the data transmission device through the display interface;
the computer host is used for sending high-speed transmission data to the data transmission device through the display interface according to the transmission rate requirement of the data transmission device;
and the data transmission device receives the data transmitted by the computer host at high speed, converts the data into a data form required by the external equipment connected with the data transmission device and outputs the data.
Furthermore, the computer host comprises at least one graphics card, the graphics card is inserted into a PCIe or AGP slot of a motherboard in the computer host, and the display interface is one or more output ports of the graphics card.
Furthermore, the computer host includes at least one graphics card, the graphics card is integrated on a motherboard in the computer host, and the display interface is one or more of output ports of the graphics card.
Furthermore, the computer host includes a central processing unit integrated with an acceleration processor, and the display interface is one or more of output ports of the acceleration processor.
Further, the transmission rate of the data sent by the computer host to the data transmission device through the display interface is not less than the transmission rate required by the data transmission device.
Further, determining the number of the display interfaces required by the universal data transmission system according to the data transmission rate of each display interface and the data transmission rate required by the data transmission device;
factors that affect the display interface transfer rate include display resolution, display refresh rate, and computer display mode.
The invention has the beneficial effects that:
the technical scheme of the invention is matched with the data transmission rate requirement of the data transmission device, and at least one display interface is set, so that the high-speed transmission of data is realized. By utilizing the mature video card technology, the video card or the acceleration processor with the video card function is used as a switching device for transmitting data, and the data meeting the transmission rate requirement can be sent to the data transmission device through the display interface. In addition, the technical scheme of the invention also reduces the development difficulty of the data transmission system, shortens the development period and reduces the development cost.
Detailed Description
The principles and features of this invention are described below in conjunction with the following drawings, which are set forth by way of illustration only and are not intended to limit the scope of the invention.
The universal data transmission system comprises a computer host 1 and at least one data transmission device 30, wherein at least one display interface is configured on the computer host 1. The computer host 1 is connected to the data transmission device 30 via a display interface. The computer host 1 is configured to send high-speed transmission data to the data transmission device 30 through the display interface according to a transmission rate requirement of the data transmission device 30. The data transmission device 30 receives data transmitted at high speed by the computer host 1, and converts the data into a data format required by an external device connected thereto and outputs the data. The data transmission device may be embodied in the form of a data transmission card, a data transmission board, a data transmission box, or the like.
In order to realize high-speed data transmission between the computer host 1 and the data transmission device 30, at least one display interface is provided on the computer host 1, and the display interface can be realized by the following three specific ways.
1. The computer host 1 comprises at least one display card, the display card is inserted in a PCIe or AGP slot of a mainboard in the computer host, and the display interface is one or more output ports of the inserted display card. That is, one or more output ports among the at least one output port of the plug-in type graphics card are display interfaces.
2. The computer host 1 comprises at least one display card, at the moment, the display card is not connected with a mainboard in the computer host in a plugging mode, but the mainboard is integrated with the display card, namely the mainboard comprises an embedded display card, and a display interface is one or more output ports of the embedded display card. That is, one or more output ports among the at least one output port of the embedded graphics card are display interfaces.
As shown in fig. 1, in the above two implementation manners, the central processing unit 10 in the computer host 1 sends data to the graphics card 20 (including a plug-in graphics card and an embedded graphics card), and then the output port of the graphics card 20 sends the data to the data transmission device 30 at a high speed.
3. The computer host 1 includes a central Processing unit (cpu) integrated with an acceleration processor, that is, the cpu includes an Accelerated Processing Unit (APU) having a video card function. The display interface is one or more of the output ports of the acceleration processor. That is, one or more of the at least one output port of the accelerated processor is a display interface. In this implementation, the central processing unit sends data to the acceleration processor, and the data is sent to the data transmission device 30 at a high speed through the output port of the acceleration processor.
The technical scheme of the invention can avoid directly developing a special data output card of a 16-link bus of PCIe2.x or PCIe3.0 with high difficulty, and utilizes mature video card technology to take a video card or an acceleration processor with the function of the video card as a switching device for transmitting data, so that the data meeting the transmission rate requirement can be sent to the data transmission device 30 through the display interface. The present invention sets at least one display interface in accordance with the data transmission rate requirement of the data transmission device 30, and thus can achieve the function of transmitting data at a high rate, which can only be achieved by a data output card having a 16-link bus of pci 2.x or pci 3.0.
The display card technology is mature, large-scale production is realized, and the display card is generally applied, so that the price is not too high, and the quality is easy to ensure. In addition, since the input/output interface circuit of the video card is much simpler than the PCIe bus circuit, the development of the data transmission device 30 in the present invention is much easier than the development of the data transmission device 30 having the PCIe bus circuit. The technical scheme of the invention not only realizes the same data transmission rate as the 16-link bus output card containing PCIe2.x or PCIe3.0, but also reduces the development difficulty, shortens the development period and reduces the development cost.
In order to meet the transmission rate requirement of the data transmission device 30, the transmission rate at which the computer host 1 sends data to the data transmission device 30 through the display interface is not less than the transmission rate required by the data transmission device 30.
The following is a brief description of the working process of the universal data transmission system of the present invention, taking the plug-in type display card and the data transmission card as examples.
First, the system is constructed according to the transmission rate required by the external device to be connected. The rate of sending data to the data transmission card by the host computer 1 through the display interface should be not less than the transmission rate required by the external device, that is, the data transmission rate provided by the display card 20 is greater than or equal to the transmission rate required by the external device.
1. The data transmission rate of each display interface is set, that is, the data transmission rate of each output port of the graphics card 20 is set.
The data transmission rate of each output port on the graphics card 20 is related to the performance parameters of the graphics card itself, and mainly includes the display resolution, the display refresh rate, and the computer display mode. The specific calculation method of the transmission rate of each output port is as follows:
port transfer rate (byte/sec) = display resolution × screen refresh rate × (3 × bit depth/8). Wherein,
the display resolution refers to how many pixels can be displayed by the display.
The screen refresh rate is the number of times a screen is refreshed per second.
The bit depth refers to how many bits are used for each of the three RGB colors, for example, 8 bits, and the three RGB colors share 3 × 8 bits for representation. Since every 8 bits is a byte, it is divided by 8.
2. The number of display interfaces needed in the system, namely the number of required output ports of the display card, is determined.
After the data transmission rate of each output port is set, the number of the graphics cards 20 required by the system construction is determined according to the number of the output ports contained in the graphics cards 20 and the transmission rate required by the data transmission cards, specifically, the number of the output ports of the graphics cards required by the system is determined, and the sum of the data transmission rates of a plurality of output ports is ensured to be not less than the transmission rate required by the data transmission cards.
For example, a data transfer card for a 4K digital cinema player requires a transfer rate Y = (4096 × 2160) × (24 frames) × (5 bytes) =1061683200 (bytes/sec)
If each graphics card has four output ports, the transmission rates set by the four output ports are as follows:
X1= (1680 × 1050) × (60 frames) × (3 bytes) =317520000 (bytes/sec)
X2= (1680 × 1050) × (60 frames) × (3 bytes) =317520000 (bytes/sec)
X3= (1680 × 1050) × (60 frames) × (3 bytes) =317520000 (bytes/sec)
X4= (1680 × 1050) × (60 frames) × (3 bytes) =317520000 (bytes/sec)
The sum of the transmission rates of the four output ports is 1270080000 (bytes/sec), which is greater than 1061683200 (bytes/sec) required by the data transmission card, so that only one display card with the above performance can meet the requirements of the example, namely, a display card with the above performance is plugged on the mainboard of the computer host. In this example, in order to make the sum of the output rates of the output ports of the graphics card closer to the output rate required by the data transmission card, one or more of the parameters of the display resolution, the screen refresh rate, the bit depth, etc. of any of the output ports may be adjusted downward.
In summary, the transmission rate provided by the graphics card 20 is satisfied (X)1+X2+……+Xn) If the number of the output ports included in the graphics card 20 is greater than or equal to n, only one graphics card is needed, otherwise, a plurality of graphics cards are needed.
As described in the above example, the transmission rate of the output port of the graphics card may be set as follows.
Different output ports set different data transmission rates, so that the data transmission rate provided by the display card can be matched with the data transmission rate required by the data transmission card as much as possible.
Alternatively, the data transmission rates of different output ports may be set to uniform XsIf the data transfer card requires a transfer rate of exactly XsInteger multiple k, the video card 20 provides a transmission rate kXs(ii) a If the data transmission card requires a transmission rate between kXsAnd (k + 1) XsThe transmission rate provided by the display card 20 may be (k + 1) XsAt this time, the data transmission rate provided by the graphic card 20 is greater than the transmission rate required by the data transmission card.
Or, the data transmission rate X of a special port is set againtThe transmission rate provided by the graphic card 20 is kXs+XtAt this time, the data transmission rate provided by the graphics card 20 is closer to or even equal to the transmission rate required by the data transmission card.
Next, the data transmission device performs a high-speed data transmission operation using the data transmission system.
As shown in fig. 1, after the universal data transmission system of the present invention is constructed, high-speed data transmission can be realized by using the system. The plurality of display cards 20 receive the data sent by the central processing unit 10 in the computer host 1 and transmit the data to the data transmission device 30 at a high speed, the input interface of the data transmission device 30 should match with the output interface of the display cards 20, because the data transmission device 30 also converts the received data into the data form required by the external device, the output interface and the data form of the data transmission device 30 should match with the external device. The external equipment can be intelligent instruments, signal generators, audio-video players, computer printing plate making or large high-speed machine tools and other equipment which require the computer to keep high-speed continuous data transmission with the computer.
The computer host 1 drives the display card or the acceleration processor with the function of the display card to receive data and perform corresponding switching by adopting the following method. Firstly, the application program is programmed by using the multi-display driving function and the implementation mechanism provided by the operating system, so that the data of the user is transmitted to the data transmission device 30 after being transferred by the display card or the acceleration processor, and then the data is finally transmitted to the external equipment by the data transmission device 30. And secondly, according to a display card driver interface provided by a display card provider, writing application programs to call the driver programs to realize that data of a user is transmitted to the data transmission device 30 after being converted by the display card or the acceleration processor, and then the data is finally transmitted to external equipment by the data transmission device 30. Thirdly, writing the driver of the display card according to the requirement of the hardware interface provided by the provider of the display card, calling the driver by the application program to realize that the data of the user is transmitted to the data transmission device 30 after being transferred by the display card or the acceleration processor, and finally transmitting the data to the external equipment by the data transmission device 30.
The above description is only exemplary of the present invention and should not be taken as limiting, and any modifications, equivalents, improvements and the like that are within the spirit and principle of the present invention should be included in the present invention.