CN205103337U - Opto -coupler test circuit board - Google Patents
Opto -coupler test circuit board Download PDFInfo
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- CN205103337U CN205103337U CN201520858674.5U CN201520858674U CN205103337U CN 205103337 U CN205103337 U CN 205103337U CN 201520858674 U CN201520858674 U CN 201520858674U CN 205103337 U CN205103337 U CN 205103337U
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- optocoupler
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Abstract
The utility model discloses an opto -coupler test circuit board, include: 1 individual power module, 1 field programmable gate array (Field -Programmable gate array is called for short FPGA) minimum system and 1 at least opto -coupler test circuit, power module respectively with the minimum system of FPGA with opto -coupler test circuit connects, just the minimum system of FPGA with opto -coupler test circuit connects. Through being inserted on test circuit by the photometry coupling, testable a plurality of opto -coupler once not only, the plug is convenient moreover, and the secondary of the chip of being convenient for uses.
Description
Technical field
The utility model relates to optocoupler fields of measurement, is specifically related to a kind of optocoupler testing circuit board.
Background technology
Dynamically turning DC circuit is conventional safety control circuit, when there being dynamic pulse to apply, the negative voltage of circuit meeting stable output, to drive load circuit works, if because fault causes dynamic pulse to disappear, negative voltage exports and also can stop, and load will quit work, and ensure the safety of system with this.
Dynamically turning in DC circuit, optocoupler is absolutely necessary element, but due to technique, batch etc. reason, the different parameter slightly difference such as optocoupler frequency response, On current, just the output voltage of this circuit can be caused to change greatly, TJ04 point voltage is between-6V ~-8V under normal circumstances, finds that output voltage all has from-3V ~-12V after actual measurement.Brownout can cannot drive load, and overtension will burn rear class device.
Optocoupler test before usually direct being welded to by optocoupler on circuit board carries out functional test to veneer entirety, as found, loaded work piece is abnormal, then checks whether be optocoupler reason, so not only there is potential safety hazard, and efficiency is very low, and the optocoupler changed also zero defect itself, only therefore the higher ability of the coherence request of circuit to optocoupler is inapplicable, and it normally can work in other functional circuits, but Rewelding can cause these optocoupler pins and loses.
Therefore, need a kind of optocoupler testing circuit board, can test the function of optocoupler and performance quickly and easily, and the secondary not affecting optocoupler uses.
Utility model content
For optocoupler test in prior art usually direct optocoupler is welded on circuit board carry out functional test, cause there is potential safety hazard and the low problem of testing efficiency, the utility model provides a kind of optocoupler testing circuit board, can test the function of optocoupler and performance quickly and easily, and the secondary not affecting optocoupler uses.
The utility model proposes a kind of optocoupler testing circuit board, comprising: 1 power module, 1 field programmable gate array (Field-ProgrammableGateArray is called for short FPGA) minimum system and at least 1 optocoupler test circuit;
Described power module is connected with described FPGA minimum system and described optocoupler test circuit respectively, and described FPGA minimum system is connected with described optocoupler test circuit.
Preferably, 12 described optocoupler test circuits are comprised.
Preferably, also comprise 3 switches, the described optocoupler test circuit of each switch control rule 4.
Preferably, opto-coupler chip base is also comprised.
Preferably, the input voltage of described power module is 24V, and output voltage is 5V.
Preferably, described optocoupler test circuit comprises:
The first end of the first electric capacity is connected with described FPGA minimum system, and the second end of described first electric capacity is connected with the first end of tested optocoupler; The second resistance is connected with between second end of 5V input end and described tested optocoupler; Be parallel with the first resistance and the first diode between second end of described first electric capacity and 5V power supply, and the positive pole of described first diode is connected with 5V power supply;
3rd end of described tested optocoupler is held with ground wire GND and is connected, and the 4th end of described tested optocoupler is held with TJ101 and is connected; Described TJ101 end is connected with the base stage of the first triode and the second triode; Described GND end is connected with the first end of the second electric capacity, and is connected with the emitter of described second triode; Be in series with the 5th resistance and the second diode between second end of described second electric capacity and TJ101 hold, and the positive pole of described second diode is connected with the second end of described second electric capacity; Second end of described second electric capacity is all connected with 24V power supply with the positive pole of described second diode; Be parallel with the 3rd resistance and the 4th resistance between the collector of described first triode and 24V power supply, the emitter of described first triode is connected with the collector of described second triode; The emitter of described first triode is connected with the positive pole of the first electrochemical capacitor, and the negative pole of described first electrochemical capacitor is connected with the negative pole of the 3rd diode and the positive pole of the 4th diode respectively; The positive pole of described 3rd diode is connected with the negative pole of the second electrochemical capacitor and the output terminal TJ04 of described optocoupler test circuit respectively; The negative pole of described 4th diode is all connected with the emitter of described second triode with the positive pole of described second electrochemical capacitor.
Preferably, described first triode is NPN type, and described second triode is positive-negative-positive.
As shown from the above technical solution, the utility model carries out performance test by being inserted in chip pad by multiple tested optocoupler, not only once can test multiple optocoupler, and the secondary not affecting optocoupler uses.
Accompanying drawing explanation
In order to be illustrated more clearly in the utility model embodiment or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only embodiments more of the present utility model, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these figure.
The structural representation of a kind of optocoupler testing circuit board that Fig. 1 provides for the utility model one embodiment;
The optocoupler test circuit figure of a kind of optocoupler testing circuit board that Fig. 2 provides for the utility model one embodiment.
Embodiment
Below in conjunction with accompanying drawing, the embodiment of utility model is further described.Following examples only for clearly the technical solution of the utility model being described, and can not limit protection domain of the present utility model with this.
Fig. 1 shows the structural representation of a kind of optocoupler testing circuit board that the present embodiment provides, and comprising: 1 power module, 1,1 FPGA minimum system 2 and at least 1 optocoupler test circuit 3;
Described power module 1 is connected with described FPGA minimum system 2 and described optocoupler test circuit 3 respectively, and described FPGA minimum system 2 is connected with described optocoupler test circuit 3.
The optocoupler testing circuit board that the present embodiment provides carries out performance test by being inserted in chip pad by tested optocoupler, once can test multiple optocoupler.In optocoupler test, use this device to be screened by defective optocoupler in advance, ensure the optocoupler output voltage stabilization on formal circuit, dependable performance.Use through after a while shows, this frock can effectively be enhanced productivity.
As the preferred version of the present embodiment, comprise 12 described optocoupler test circuits 3, the performance of 12 optocouplers can be tested simultaneously.
Further, also comprise 3 switches, each switch control rule 1 group is totally 4 described optocoupler test circuits, can test flexibly.Such as when surveyed optocoupler is 7, then can close 1 group of test circuit with saving resource.
Further, also comprise opto-coupler chip base, directly optocoupler inserted base during test, plug is convenient, and chip under test pin can be protected not lost.
For example, described in the present embodiment, FPGA minimum system is for generating dynamic pulse, and the dynamic pulse that the voltage of described optocoupler test circuit is generated by described FPGA minimum system controls, and pulsed frequency can change as required; The output voltage of described optocoupler test circuit is-6V ~-8V; And the arbitrary component wear in described optocoupler test circuit, all can make whole Charger transfer chain interruption, make the current potential of output terminal be 0; In addition, the utility model adopts 24V to power, and the 24V power supply introduced from outside accesses optocoupler testing circuit board through DB9, is changed into 5V export to FPGA minimum system 2 and to power and accessory circuit is powered in inside by power module 1.
Fig. 2 shows the optocoupler test circuit figure of a kind of optocoupler testing circuit board that the present embodiment provides preferably, and described optocoupler test circuit comprises:
The first end of the first electric capacity C1 is connected with described FPGA minimum system 2, and second end of described first electric capacity C1 is connected with the first end of tested optocoupler TLP781 (GR-DIP4); The second resistance R2 is connected with between second end of 5VGND input end and described tested optocoupler TLP781 (GR-DIP4); Be parallel with the first resistance R1 and the first diode D1 between second end of described first electric capacity C1 and 5VGND power supply, and the positive pole of described first diode D1 is connected with 5VGND power supply;
3rd end of described tested optocoupler TLP781 (GR-DIP4) is held with ground wire GND and is connected, and the 4th end of described tested optocoupler TLP781 (GR-DIP4) is held with TJ101 and is connected; Described TJ101 end is connected with the base stage of the first triode N1 and the second triode P2; Described GND end is connected with the first end of the second electric capacity C2, and is connected with the emitter of described second triode P2; Be in series with the 5th resistance R5 and the second diode D2 between second end of described second electric capacity C2 and TJ101 hold, and the positive pole of described second diode D2 is connected with second end of described second electric capacity C2; Second end of described second electric capacity C2 is all connected with 24V power supply with the positive pole of described second diode D2; Be parallel with the 3rd resistance R3 and the 4th resistance R4 between the collector of described first triode N1 and 24V power supply, the emitter of described first triode N1 is connected with the collector of described second triode P2; The emitter of described first triode N1 is connected with the positive pole of the first electrochemical capacitor E1, and the negative pole of described first electrochemical capacitor E1 is connected with the negative pole of the 3rd diode D3 and the positive pole of the 4th diode D4 respectively; The positive pole of described 3rd diode D3 is connected with the negative pole of the second electrochemical capacitor E2 and the output terminal TJ04 of described optocoupler test circuit respectively; The negative pole of described 4th diode D4 is all connected with the emitter of described second triode P2 with the positive pole of described second electrochemical capacitor E2.
Wherein, described first triode N1 is NPN type, and described second triode P2 is positive-negative-positive.
The optocoupler test circuit that the present embodiment provides, for testing optocoupler performance, forms according to the principle design dynamically turning DC circuit, on device is selected with dynamically turn DC circuit and be consistent, accurately reliable to ensure the test result of optocoupler.Use through after a while shows, this frock can screen qualified optocoupler in batches, effectively raises production efficiency.
It should be noted that above-described embodiment is described the utility model instead of limits the utility model, and those skilled in the art can design alternative embodiment when not departing from the scope of claims.In the claims, any reference symbol between bracket should be configured to limitations on claims.Word " comprises " not to be got rid of existence and does not arrange element in the claims or step.Word "a" or "an" before being positioned at element is not got rid of and be there is multiple such element.The utility model can by means of including the hardware of some different elements and realizing by means of the computing machine of suitably programming.In the unit claim listing some devices, several in these devices can be carry out imbody by same hardware branch.Word first, second and third-class use do not represent any order.Can be title by these word explanations.
Above embodiment is only suitable for the utility model is described; and be not limitation of the utility model; the those of ordinary skill of relevant technical field; when not departing from spirit and scope of the present utility model; can also make a variety of changes and modification; therefore all equivalent technical schemes also belong to category of the present utility model, and scope of patent protection of the present utility model should be defined by the claims.
Claims (7)
1. an optocoupler testing circuit board, is characterized in that, comprising: 1 power module, 1 on-site programmable gate array FPGA minimum system and at least 1 optocoupler test circuit;
Described power module is connected with described FPGA minimum system and described optocoupler test circuit respectively, and described FPGA minimum system is connected with described optocoupler test circuit.
2. a kind of optocoupler testing circuit board according to claim 1, is characterized in that, comprises 12 described optocoupler test circuits.
3. a kind of optocoupler testing circuit board according to claim 2, is characterized in that, also comprises 3 switches, the described optocoupler test circuit of each switch control rule 4.
4. a kind of optocoupler testing circuit board according to claim 1, is characterized in that, also comprise opto-coupler chip base.
5. a kind of optocoupler testing circuit board according to claim 1, is characterized in that, the input voltage of described power module is 24V, and output voltage is 5V.
6. a kind of optocoupler testing circuit board according to claim 1, is characterized in that, described optocoupler test circuit comprises:
The first end of the first electric capacity is connected with described FPGA minimum system, and the second end of described first electric capacity is connected with the first end of tested optocoupler; The second resistance is connected with between second end of 5V input end and described tested optocoupler; Be parallel with the first resistance and the first diode between second end of described first electric capacity and 5V power supply, and the positive pole of described first diode is connected with 5V power supply;
3rd end of described tested optocoupler is held with ground wire GND and is connected, and the 4th end of described tested optocoupler is held with TJ101 and is connected; Described TJ101 end is connected with the base stage of the first triode and the second triode; Described GND end is connected with the first end of the second electric capacity, and is connected with the emitter of described second triode; Be in series with the 5th resistance and the second diode between second end of described second electric capacity and TJ101 hold, and the positive pole of described second diode is connected with the second end of described second electric capacity; Second end of described second electric capacity is all connected with 24V power supply with the positive pole of described second diode; Be parallel with the 3rd resistance and the 4th resistance between the collector of described first triode and 24V power supply, the emitter of described first triode is connected with the collector of described second triode; The emitter of described first triode is connected with the positive pole of the first electrochemical capacitor, and the negative pole of described first electrochemical capacitor is connected with the negative pole of the 3rd diode and the positive pole of the 4th diode respectively; The positive pole of described 3rd diode is connected with the negative pole of the second electrochemical capacitor and the output terminal TJ04 of described optocoupler test circuit respectively; The negative pole of described 4th diode is all connected with the emitter of described second triode with the positive pole of described second electrochemical capacitor.
7. a kind of optocoupler testing circuit board according to claim 6, is characterized in that, described first triode is NPN type, and described second triode is positive-negative-positive.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520858674.5U CN205103337U (en) | 2015-10-30 | 2015-10-30 | Opto -coupler test circuit board |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520858674.5U CN205103337U (en) | 2015-10-30 | 2015-10-30 | Opto -coupler test circuit board |
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| CN205103337U true CN205103337U (en) | 2016-03-23 |
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| CN201520858674.5U Active CN205103337U (en) | 2015-10-30 | 2015-10-30 | Opto -coupler test circuit board |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106124897A (en) * | 2016-07-11 | 2016-11-16 | 中国电子科技集团公司第四十四研究所 | Photoelectrical coupler can be carried out electricity aging test and the test system of parameter testing |
| CN108107301A (en) * | 2018-02-28 | 2018-06-01 | 广西玉柴机器股份有限公司 | Optocoupler test device |
-
2015
- 2015-10-30 CN CN201520858674.5U patent/CN205103337U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106124897A (en) * | 2016-07-11 | 2016-11-16 | 中国电子科技集团公司第四十四研究所 | Photoelectrical coupler can be carried out electricity aging test and the test system of parameter testing |
| CN108107301A (en) * | 2018-02-28 | 2018-06-01 | 广西玉柴机器股份有限公司 | Optocoupler test device |
| CN108107301B (en) * | 2018-02-28 | 2023-09-19 | 广西玉柴机器股份有限公司 | Optocoupler testing device |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
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| CP03 | Change of name, title or address |
Address after: 100070 Beijing science and Technology Park of Fengtai District Seahawks Hospital No. 6 2, No. 3 (Park) Patentee after: TRAFFIC CONTROL TECHNOLOGY Co.,Ltd. Address before: 100070 Beijing science and Technology Park of Fengtai District Haiying Road No. 6 hospital of Beijing, the headquarters of the International 2 Building No. 3 Patentee before: TRAFFIC CONTROL TECHNOLOGY Co.,Ltd. |