CN204991689U - Igbt模块 - Google Patents
Igbt模块 Download PDFInfo
- Publication number
- CN204991689U CN204991689U CN201520627353.4U CN201520627353U CN204991689U CN 204991689 U CN204991689 U CN 204991689U CN 201520627353 U CN201520627353 U CN 201520627353U CN 204991689 U CN204991689 U CN 204991689U
- Authority
- CN
- China
- Prior art keywords
- igbt
- pin
- chip
- copper base
- fin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L24/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
- H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
- H01L2224/37001—Core members of the connector
- H01L2224/37099—Material
- H01L2224/371—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/37138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/37147—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/83801—Soldering or alloying
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Abstract
本实用新型公开了一种IGBT模块,包括Pin-Fin铜基板、IGBT裸芯片;Pin-Fin铜基板底面及侧面烧结有一层绝缘层;IGBT裸芯片集电极面直接焊接在所述Pin-Fin铜基板的顶面上,发射极通过铜排或绑定线引出。本实用新型的IGBT模块,由于IGBT裸芯片直接跟一块很大的铜基板接触,铜层更厚,面积也更大,可以极大地提高IGBT的热容,因而能够显著地提高IGBT短时的峰值电流能力;同时由于减少了IGBT封装的层数,缩短了散热路径,并增大了热量扩散面积,热阻得到显著降低,大大地提高了IGBT的散热能力,使IGBT芯片的通流能力得到提升,从而在该封装下,只需使用更小的芯片面积即可实现相同的电流能力,降低了IGBT芯片成本。
Description
技术领域
本实用新型涉及半导体封装技术,特别涉及一种IGBT模块。
背景技术
IGBT(InsulatedGateBipolarTransistor,绝缘栅双极型晶体管),是由BJT(双极型三极管)和MOS(绝缘栅型场效应管)组成的复合全控型电压驱动式功率半导体器件,兼有MOSFET(Metal-Oxide-SemiconductorField-EffectTransistor,金氧半场效晶体管)的高输入阻抗和GTR(GiantTransistor,巨型晶体管)的低导通压降两方面的优点。GTR饱和压降低,载流密度大,但驱动电流较大;MOSFET驱动功率很小,开关速度快,但导通压降大,载流密度小。IGBT综合了以上两种器件的优点,驱动功率小而饱和压降低。非常适合应用于直流电压为600V及以上的变流系统如交流电机、变频器、开关电源、照明电路、牵引传动等领域。
IGBT模块应用在电动汽车驱动逆变器中,为了满足车辆驾驶过程中频繁的短时加速需求,需要IGBT有很强的峰值电流能力。一般来说,IGBT需要有2~30s的峰值电流能力,此时的电流能力是其额定电流能力的2~3倍甚至以上,而在车用的大部分时间里,对IGBT电流能力的要求又比较低。因此,为了满足车用逆变器这种特殊的应用条件,要求IGBT的额定电流较小,但同时有较大的峰值电流能力。
目前汽车级IGBT模块较为典型的设计方法是从工业级IGBT模块的DBC(directbondingcopper,直接键合铜)结构(薄铜+陶瓷+薄铜)改进而来的厚铜方案,如图1所示,通过增加IGBT铜基板的厚度(约2~5mm)来增大热容、降低热阻,从而提升IGBT的峰值电流能力。但是由于厚铜与芯片之间隔了一个DBC结构,导致厚铜对IGBT热容的提升效果非常有限,另外,该封装方法的层数比较多,芯片的实际散热路径为:芯片——焊接层——薄铜——陶瓷(AL2O3)——薄铜——焊接层——厚铜——导热硅脂——水冷板,导致芯片散热路径太长,影响其散热效果,而且散热路径中的陶瓷和导热硅脂的散热性能都非常差,这也使得IGBT的散热能力大打折扣。此外,IGBT的发射极通过绑定线引出,可靠性和寿命无法得到有效保证。而在典型DBC结构的基础上进行改进,集成Pin-Fin底板结构(如图2所示),可以避免DBC结构中的导热硅脂这一薄弱环节,可在一定程度上改善IGBT的热容和热阻,同时将绑定线改进为绑定带,可靠性得到提升,但是它仍无法解决IGBT芯片的散热路径太长的问题。
实用新型内容
本实用新型要解决的技术问题是增加IGBT模块的热容,提升IGBT模块的短时峰值电流能力;同时大大降低热阻,从而在相同的电流需求下,只需要使用更小的芯片面积即可满足要求,有效降低成本。
为解决上述技术问题,本实用新型提供的IGBT模块,包括Pin-Fin铜基板、IGBT裸芯片;
所述Pin-Fin铜基板,底面及侧面烧结有一层绝缘层;
所述IGBT裸芯片,集电极面直接焊接在所述Pin-Fin铜基板的顶面上,发射极通过铜排或绑定线引出。
较佳的,通过绑定线将IGBT裸芯片的控制极引出。
较佳的,所述Pin-Fin铜基板,厚度为2mm~5mm,Pin-Fin针长度为5mm~10mm。
较佳的,所述绝缘层为陶瓷,厚度为200μm~1000μm。
较佳的,所述铜排,厚度为0.5mm~3mm。
本实用新型的IGBT模块,直接将IGBT裸芯片C极焊接在Pin-Fin铜基板顶面上,同时在Pin-Fin铜基板底面及侧面覆盖一层绝缘层来保证绝缘性能,由于IGBT裸芯片直接跟一块很大的铜基板接触,铜层更厚,面积也更大,可以极大地提高IGBT的热容,因而能够显著地提高IGBT短时的峰值电流能力;同时由于减少了IGBT封装的层数,IGBT芯片的散热路径中只有芯片——铜基板——绝缘层,最大程度上减小了散热路径中的薄弱环节,缩短了散热路径,并增大了热量扩散面积,热阻得到显著降低,大大地提高了IGBT的散热能力;由于IGBT芯片可通过Pin-Fin铜基板快速将热量散发出去,IGBT芯片的通流能力得到提升,从而在相同的电流能力之下,该封装的IGBT模块可以使用更小面积的IGBT芯片即可满足要求,IGBT芯片成本得到降低。由于绝缘材料相对较低的热导率,它成为所有IGBT封装结构散热的短板,但是本实用新型提出的方案将绝缘层覆盖在铜基板外表面,这种处理方式的优势是:热量先通过Pin-Fin铜底板迅速向四周扩散,待到达绝缘层时热量的散热面积非常大,这在很大程度上弥补了绝缘材料低热导率的短板,从而在保证IGBT绝缘性能的同时不牺牲其优良的散热性能。
附图说明
为了更清楚地说明本实用新型的技术方案,下面对本实用新型所需要使用的附图作简单的介绍,显而易见地,下面描述中的附图仅仅是本实用新型的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1是汽车级IGBT模块的典型DBC封装方案示意图;
图2是现有一种改进的DBC结构并集成Pin-Fin底板示意图;
图3是本实用新型的IGBT模块一实施例示意图。
具体实施方式
下面将结合附图,对本实用新型中的技术方案进行清楚、完整的描述,显然,所描述的实施例是本实用新型的一部分实施例,而不是全部的实施例。基于本实用新型中的实施例,本领域普通技术人员在没有做出创造性劳动的前提下所获得的所有其它实施例,都属于本实用新型保护的范围。
实施例一
IGBT模块,如图3所示,包括Pin-Fin铜基板、IGBT裸芯片(die);
所述Pin-Fin铜基板,底面及侧面烧结有一层绝缘层;
所述IGBT裸芯片(die),C极(集电极)面直接焊接在所述Pin-Fin铜基板的顶面上,E极(发射极)通过铜排或绑定线引出。
实施例一的IGBT模块,直接将IGBT裸芯片C极焊接在Pin-Fin铜基板顶面上,同时在Pin-Fin铜基板底面及侧面覆盖一层绝缘层来保证绝缘性能,由于IGBT裸芯片直接跟一块很大的铜基板接触,铜层更厚,面积也更大,可以极大地提高IGBT的热容,因而能够显著地提高IGBT短时的峰值电流能力;同时由于减少了IGBT封装的层数,IGBT芯片的散热路径中只有芯片——铜基板——绝缘层,最大程度上减小了散热路径中的薄弱环节,缩短了散热路径,并增大了热量扩散面积,热阻得到显著降低,大大地提高了IGBT的散热能力;由于IGBT芯片可通过Pin-Fin铜基板快速将热量散发出去,IGBT芯片的通流能力得到提升,从而在相同的电流能力之下,该封装的IGBT模块可以使用更小面积的IGBT芯片即可满足要求,IGBT芯片成本得到降低。实施例一的IGBT模块,高热容低热阻,适用于电动汽车。
实施例一的IGBT模块,将绝缘层覆盖在Pin-Fin铜基板底面及侧面,热量先通过Pin-Fin铜基板迅速向底面及侧面扩散,待到达绝缘层时散热面积已非常大,这在很大程度上弥补了绝缘层材料低热导率的短板,从而在保证IGBT绝缘性能的同时不牺牲其优良的散热性能。
较佳的,所述IGBT裸芯片(die)上半桥的C极和下半桥的E极连接的铜排分别作为所述IGBT模块的正端子T+、负端子T-引出。
较佳的,通过绑定线将IGBT裸芯片(die)的控制极引出,如果IGBT裸芯片(die)有其他非功率管脚,也一并通过绑定线的方式引出。
较佳的,所述Pin-Fin铜基板,厚度为2mm~5mm,Pin-Fin针长度为5mm~10mm。
较佳的,所述绝缘层为厚度为200μm~1000μm的陶瓷,例如厚度为400μm陶瓷。
较佳的,所述铜排,厚度为0.5mm~3mm。
实施例二
实施例一的IGBT模块的封装方法,包括以下步骤:
一.在夹具上准备IGBT焊接所用的Pin-Fin铜基板;
二.在所述Pin-Fin铜基板的底面及侧面烧结一层绝缘层,以保证绝缘性能;
三.将IGBT裸芯片(die)的C极(集电极)面焊接在所述Pin-Fin铜基板的顶面上;
四.通过铜排或绑定线引出IGBT裸芯片的E极(发射极);
通过绑定线将IGBT裸芯片的控制极引出;如果IGBT裸芯片有其他非功率管脚,此时也一并通过绑定线的方式引出;
将上半桥的Pin-Fin铜基板与一铜排或绑定线的一端焊接在一起,该铜排或绑定线的另一端与IGBT模块的正端子T+相连;
将引出上半桥IGBT裸芯片的发射极的铜排或绑定线的另一端,同下半桥的Pin-Fin铜基板焊接在一起;
将引出将下半桥IGBT裸芯片发射极的铜排或绑定线的另一端,与IGBT模块的负端子T-连接;
五.对IGBT模块进行塑封;
六.一个IGBT模块封装完成。
较佳的,所述Pin-Fin铜基板,厚度为2mm~5mm,Pin-Fin针长度为5mm~10mm;
所述铜排,厚度为0.5mm~3mm。
较佳的,步骤一中的所述Pin-Fin铜基板,上表面进行防腐处理,以利于焊接。
较佳的,步骤二中,在所述Pin-Fin铜基板的底面及侧面烧结的一层厚度为200μm~1000μm(例如400um)的陶瓷作为绝缘层。
较佳的,步骤四中,焊接工艺采用超声波焊。
以上所述仅为本实用新型的较佳实施例而已,并不用以限制本实用新型,凡在本实用新型的精神和原则之内,所做的任何修改、等同替换、改进等,均应包含在本实用新型保护的范围之内。
Claims (5)
1.一种IGBT模块,包括Pin-Fin铜基板、IGBT裸芯片;其特征在于,
所述Pin-Fin铜基板,底面及侧面烧结有一层绝缘层;
所述IGBT裸芯片,集电极面直接焊接在所述Pin-Fin铜基板的顶面上,发射极通过铜排或绑定线引出。
2.根据权利要求1所述的IGBT模块,其特征在于,
通过绑定线将IGBT裸芯片的控制极引出。
3.根据权利要求1所述的IGBT模块,其特征在于,
所述Pin-Fin铜基板,厚度为2mm~5mm,Pin-Fin针长度为5mm~10mm。
4.根据权利要求1所述的IGBT模块,其特征在于,
所述绝缘层为陶瓷,厚度为200μm~1000μm。
5.根据权利要求1所述的IGBT模块,其特征在于,
所述铜排,厚度为0.5mm~3mm。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201520627353.4U CN204991689U (zh) | 2015-08-19 | 2015-08-19 | Igbt模块 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201520627353.4U CN204991689U (zh) | 2015-08-19 | 2015-08-19 | Igbt模块 |
Publications (1)
Publication Number | Publication Date |
---|---|
CN204991689U true CN204991689U (zh) | 2016-01-20 |
Family
ID=55126028
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201520627353.4U Active CN204991689U (zh) | 2015-08-19 | 2015-08-19 | Igbt模块 |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN204991689U (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN117253866A (zh) * | 2023-11-20 | 2023-12-19 | 深圳平创半导体有限公司 | 功率模块的三维封装结构、方法及车辆电驱装置 |
-
2015
- 2015-08-19 CN CN201520627353.4U patent/CN204991689U/zh active Active
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN117253866A (zh) * | 2023-11-20 | 2023-12-19 | 深圳平创半导体有限公司 | 功率模块的三维封装结构、方法及车辆电驱装置 |
CN117253866B (zh) * | 2023-11-20 | 2024-03-01 | 深圳平创半导体有限公司 | 功率模块的三维封装结构、方法及车辆电驱装置 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US9640460B2 (en) | Semiconductor device with a heat-dissipating plate | |
CN103745962B (zh) | 适用于电动汽车逆变器的igbt模块及封装方法和使用方法 | |
US10361174B2 (en) | Electronic device | |
US20220028794A1 (en) | Semiconductor device, power converter, method for manufacturing semiconductor device, and method for manufacturing power converter | |
CN105679750A (zh) | 压接式半导体模块及其制作方法 | |
US9627350B2 (en) | Method for manufacturing semiconductor device | |
CN113130455B (zh) | 一种高热可靠性的多单元功率集成模块及其加工工艺 | |
CN101819970B (zh) | 一种基于焊接型igbt与压接型二极管的串联结构模块 | |
WO2020215737A1 (zh) | 一种功率器件封装结构及其方法 | |
Wang et al. | Status and trend of power semiconductor module packaging for electric vehicles | |
CN114914235A (zh) | 多芯片并联非对称碳化硅模块的封装结构及封装方法 | |
CN204991689U (zh) | Igbt模块 | |
CN111584443A (zh) | 双面散热功率模块及其双面平行度的控制方法 | |
KR102100859B1 (ko) | 양면 냉각 파워 모듈 및 이의 제조방법 | |
CN104659011A (zh) | 一种igbt模块的芯片焊接结构 | |
CN208015601U (zh) | 一种三相全桥电路及智能功率模块 | |
Wang et al. | A reliable double-sided 1200-V/600-A multichip half-bridge Insulated Gate Bipolar Transistor (IGBT) module with high power density | |
CN216354202U (zh) | 功率器件 | |
CN104465605A (zh) | 一种半导体芯片封装结构 | |
CN212342605U (zh) | 双面散热功率模块 | |
CN203760452U (zh) | 适用于电动汽车逆变器的igbt模块 | |
CN113035787B (zh) | 一种逆导型功率半导体模块封装结构及其封装方法 | |
JP2019067976A (ja) | 半導体装置 | |
CN216123064U (zh) | 一种采用电镀塞孔的智能功率模块 | |
CN204204845U (zh) | 一种半导体芯片封装结构 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant |