CN204857732U - MOS field effect transistor - Google Patents

MOS field effect transistor Download PDF

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Publication number
CN204857732U
CN204857732U CN201520462615.6U CN201520462615U CN204857732U CN 204857732 U CN204857732 U CN 204857732U CN 201520462615 U CN201520462615 U CN 201520462615U CN 204857732 U CN204857732 U CN 204857732U
Authority
CN
China
Prior art keywords
silicon chip
effect transistor
drain electrode
copper sheet
mos field
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn - After Issue
Application number
CN201520462615.6U
Other languages
Chinese (zh)
Inventor
屠小慧
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JIANGSU YOURUN MICROELECTRONICS CO., LTD.
Original Assignee
屠小慧
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 屠小慧 filed Critical 屠小慧
Priority to CN201520462615.6U priority Critical patent/CN204857732U/en
Application granted granted Critical
Publication of CN204857732U publication Critical patent/CN204857732U/en
Withdrawn - After Issue legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

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  • Electrodes Of Semiconductors (AREA)

Abstract

The utility model relates to a MOS field effect transistor, include: source electrode, drain electrode copper sheet, grid and PCB copper foil, the source electrode below is provided with the PCB copper foil, the source electrode top is provided with the silicon chip, the silicon chip below is provided with the grid, the silicon chip top is provided with the drain electrode copper sheet, the drain electrode copper sheet binds the material with the nude film and is connected. The beneficial effects of the utility model are that: the effectual conduction efficiency that has improved of this MOS field effect transistor has promoted stability greatly, is favorable to going on of work, has had good radiating effect, does not have the pin, has avoided the frequent cracked condition of pin, simple structure, reasonable in design.

Description

A kind of MOS field-effect transistor
Technical field
The utility model relates to MOS technology field, specifically a kind of MOS field-effect transistor.
Background technology
Metal-Oxide Semiconductor field-effect transistor, being called for short metal-oxide half field effect transistor is a kind of field-effect transistor that can be widely used in analog circuit and digital circuit.Traditional metal-oxide-semiconductor conversion efficiency is low, and heating is serious, and thermal diffusivity is bad, and stability is bad.
Based on above reason, need a kind of MOS field-effect transistor, can effectively promote phase service behaviour, have good heat dispersion, be beneficial to the conduction of electric current, greatly reduce induction reactance and impedance.
Utility model content
In order to solve the technical problem that above-mentioned prior art exists, the utility model provides a kind of MOS field-effect transistor.
The utility model solves the technical scheme that its technical problem adopts:
A kind of MOS field-effect transistor, comprise: source electrode, drain electrode copper sheet, grid and PCB Copper Foil, described PCB Copper Foil is provided with below described source electrode, silicon chip is provided with above described source electrode, described grid is provided with below described silicon chip, be provided with described drain electrode copper sheet above described silicon chip, described drain electrode copper sheet is connected with nude film bonding material.
As preferred version of the present utility model, described source electrode is connected with described silicon chip with described PCB Copper Foil.
As preferred version of the present utility model, be connected with described grid below described silicon chip, be connected with described drain electrode copper sheet above described silicon chip.
As preferred version of the present utility model, described drain electrode copper sheet is binded with described silicon chip mutually by described nude film bonding material.
The beneficial effects of the utility model are: this MOS field-effect transistor effectively raises conduction efficiency, greatly improves stability, is conducive to the carrying out of work, be provided with good radiating effect, there is no pin, avoid the situation that pin often ruptures, structure is simple, reasonable in design.
Accompanying drawing explanation
Below in conjunction with drawings and Examples, the utility model is further illustrated.
Fig. 1 is structure chart of the present utility model.
1, source electrode, 2, PCB Copper Foil, 3, grid, 4, drain electrode copper sheet, 5, silicon chip, 6, nude film bonding material.
Embodiment
In order to make the purpose of this utility model, technical scheme and advantage clearly understand, below in conjunction with drawings and Examples, the utility model is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the utility model, and be not used in restriction the utility model.
As shown in Figure 1, a kind of MOS field-effect transistor, comprise: source electrode 1, drain electrode copper sheet 4, grid 3 and PCB Copper Foil 2, PCB Copper Foil 2 is provided with below source electrode 1, silicon chip 5 is provided with above source electrode 1, be provided with grid 3 below silicon chip 5, be provided with drain electrode copper sheet 4 above silicon chip 5, drain electrode copper sheet 4 is connected with nude film bonding material 6.
As the utility model preferred embodiment, as shown in Figure 1, source electrode 1 is connected with silicon chip 5 with PCB Copper Foil 2, electric current flows to Copper Foil by the large pad on both sides and then directly flows to PCB by the pad of source electrode 1, large area is relied on to connect the loss greatly reducing electric current, its performance is effectively improved, be connected with grid 3 below silicon chip 5, integrated a large amount of transistor on silicon chip 5, computing can be carried out fast and accurately, improve its operating efficiency, grid 3 input resistance is high, noise is little, low in energy consumption, safety operation area is wide, be conducive to the stability of work, be connected with drain electrode copper sheet 4 above silicon chip 5, drain electrode copper sheet 4 is binded with silicon chip mutually by nude film bonding material 6, bind firmly, be conducive to the conduction of electric current, and outer setting has copper metal shell to cover, conversion efficiency is high, caloric value is low, directly can bind with equipment, be conducive to conduction current, good heat dissipation effect.
More than show and describe general principle of the present utility model, principal character and advantage of the present utility model.The technical staff of the industry should understand; the utility model is not restricted to the described embodiments; what describe in above-described embodiment and specification just illustrates principle of the present utility model; under the prerequisite not departing from the utility model spirit and scope; the utility model also has various changes and modifications, and these changes and improvements all fall within the scope of claimed the utility model.The claimed scope of the utility model is defined by appending claims and equivalent thereof.

Claims (4)

1. a MOS field-effect transistor, comprise: source electrode (1), drain electrode copper sheet (4), grid (3) and PCB Copper Foil (2), described source electrode (1) below is provided with described PCB Copper Foil (2), described source electrode (1) top is provided with silicon chip (5), described silicon chip (5) below is provided with described grid (3), described silicon chip (5) top is provided with described drain electrode copper sheet (4), and described drain electrode copper sheet (4) is connected with nude film bonding material (6).
2. a kind of MOS field-effect transistor according to claim 1, is characterized in that: described source electrode (1) is connected with described silicon chip (5) with described PCB Copper Foil (2).
3. a kind of MOS field-effect transistor according to claim 1, is characterized in that: described silicon chip (5) below is connected with described grid (3), and described silicon chip (5) top is connected with described drain electrode copper sheet (4).
4. a kind of MOS field-effect transistor according to claim 1, is characterized in that: described drain electrode copper sheet (4) is binded with described silicon chip mutually by described nude film bonding material (6).
CN201520462615.6U 2015-06-27 2015-06-27 MOS field effect transistor Withdrawn - After Issue CN204857732U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201520462615.6U CN204857732U (en) 2015-06-27 2015-06-27 MOS field effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201520462615.6U CN204857732U (en) 2015-06-27 2015-06-27 MOS field effect transistor

Publications (1)

Publication Number Publication Date
CN204857732U true CN204857732U (en) 2015-12-09

Family

ID=54748258

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201520462615.6U Withdrawn - After Issue CN204857732U (en) 2015-06-27 2015-06-27 MOS field effect transistor

Country Status (1)

Country Link
CN (1) CN204857732U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112152484A (en) * 2019-06-28 2020-12-29 万国半导体国际有限合伙公司 Ultra-fast transient response AC-DC converter applied to high-power density charging

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112152484A (en) * 2019-06-28 2020-12-29 万国半导体国际有限合伙公司 Ultra-fast transient response AC-DC converter applied to high-power density charging
CN112152484B (en) * 2019-06-28 2023-12-05 万国半导体国际有限合伙公司 Ultra-fast transient response AC/DC converter applied to high power density charging

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Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
C41 Transfer of patent application or patent right or utility model
CB03 Change of inventor or designer information

Inventor after: Shi Huaping

Inventor after: Chen Delin

Inventor after: Fan Rongrong

Inventor after: Chen Tingting

Inventor before: Tu Xiaohui

COR Change of bibliographic data
TR01 Transfer of patent right

Effective date of registration: 20160714

Address after: 225008 Jiangsu province Yangzhou City Ping Road East (Jiangyang Industrial Park Development and Construction Co., Ltd.)

Patentee after: JIANGSU YOURUN MICROELECTRONICS CO., LTD.

Address before: Tu Jia Bu Cun, Zhejiang city of Shaoxing Province town village 312400 Shengzhou City, Pukou No. 8

Patentee before: Tu Xiaohui

AV01 Patent right actively abandoned

Granted publication date: 20151209

Effective date of abandoning: 20190828

AV01 Patent right actively abandoned