CN206480618U - Integrated circuit applied to power device - Google Patents
Integrated circuit applied to power device Download PDFInfo
- Publication number
- CN206480618U CN206480618U CN201720142119.1U CN201720142119U CN206480618U CN 206480618 U CN206480618 U CN 206480618U CN 201720142119 U CN201720142119 U CN 201720142119U CN 206480618 U CN206480618 U CN 206480618U
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- CN
- China
- Prior art keywords
- power device
- pole
- substrate
- pin
- electrically connected
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
The utility model discloses a kind of integrated circuit applied to power device, including power device, control module and lead frame, described lead frame includes substrate and several pins, described power device and control module is respectively positioned in the substrate of lead frame, first pole of power device is electrically connected with substrate, second pole of power device is electrically connected by metal tape with least one pin, the control module is electrically connected with power device control pole and the second pole, and control module is electrically connected with least one pin.Power device of the present utility model is connected by least one metal tape with pin, to reduce impedance and reduce energy consumption, so as to reduce chip temperature, by being reasonably electrically connected and pin layout, the utility model further improves the performance of electrical connection on the basis of energy-saving cool-down.
Description
Technical field
The utility model is related to technical field of integrated circuits, and in particular to a kind of integrated circuit applied to power device.
Background technology
Power device can be used as discrete component, but the miniaturization with electronic component and multifunction, power device
Part is usually integrated in piece, wherein, power MOSFET is one of power device main Types.For example, by power MOS and control
Module is integrated in piece, and power MOS each pole and control module are realized electrically by lead (for example, copper cash) and lead frame
Connection, and according to physical circuit, power MOS at least grid and control module are connected using lead.
Based on above-mentioned prior art, due to power device would generally be in bearing integrated high current, using existing skill
In art lead connection, because the impedance of lead it is larger thus heating and consume energy it is larger, be unfavorable for radiating and the energy-conservation of chip.
Utility model content
In view of this, the utility model provides a kind of perfect heat-dissipating, is conducive to the collection applied to power device of energy-conservation
Into circuit, heating and the larger technical problem of power consumption to solve prior art presence, to improve chip performance.
Technical solution of the present utility model is to provide a kind of integrated electricity applied to power device of following structure
Road, including power device, control module and lead frame, described lead frame include substrate and several pins, described
Power device and control module are respectively positioned in the substrate of lead frame, and the first pole of power device is electrically connected with substrate, power device
Second pole of part is electrically connected by metal tape with least one pin, the control module and power device control pole and the second pole
Electrical connection, control module is electrically connected with least one pin.
Alternatively, the first pole of the power device and the electrical connection of substrate pass through at least one pin for being connected with substrate
Draw.
Alternatively, the second pole of the power device is electrically connected by the first metal tape and the second metal tape with multiple pins
Connect, electrically connected between the plurality of pin.
Alternatively, the first pole of the power device is located at the back side of power device, and is affixed with the conductive layer in substrate
Close, the second pole of power device and control pole are located at its front.
Alternatively, described control module is electrically connected with substrate, the second pole of power device and control pole respectively by lead
Connect.
Alternatively, the pin output that the electrical connection of the first pole of power device and substrate is drawn is characterized into the power device
The sampled signal of state, the pin that the second pole of power device is drawn is used as earth terminal.
Alternatively, the power device is power MOSFET, and its first order is drain electrode, its second extremely source electrode, and it is controlled
Extremely grid.
Using structure of the present utility model, compared with prior art, with advantages below：The utility model is by power device
It is placed in substrate and is integrated in piece with control module, because power device needs to carry larger current, passes through at least one
Metal tape is connected with pin, to reduce impedance and reduce energy consumption, so that chip temperature is reduced, by being reasonably electrically connected and drawing
Pin is laid out, and the utility model further improves the performance of electrical connection on the basis of energy-saving cool-down.
Brief description of the drawings
Fig. 1 is the structural representation for the integrated circuit that the utility model is applied to power device；
Fig. 2 is the circuit diagram of application power-switching circuit of the present utility model.
Shown in figure：1st, power device, 2, control module, 3.1, substrate, 3.2, pin, the 4.1, first metal tape, 4.2,
Second metal tape, 5, lead.
Embodiment
Preferred embodiment of the present utility model is described in detail below in conjunction with accompanying drawing, but the utility model is not merely
It is limited to these embodiments.The utility model covers any replacement made in spirit and scope of the present utility model, modification, equivalent
Method and scheme.
Thoroughly understand in order that the public has to the utility model, in following the utility model preferred embodiment specifically
Understand concrete details, and description without these details can also understand that this practicality is new completely for a person skilled in the art
Type.
The utility model is more specifically described by way of example referring to the drawings in the following passage.It should be noted that, accompanying drawing
Use using more simplified form and non-accurately ratio, only to it is convenient, lucidly aid in illustrating the utility model
The purpose of embodiment.
With reference to shown in Fig. 1, structure of the utility model applied to the integrated circuit of power device, including power device are illustrated
Part 1, control module 2 and lead frame, described lead frame include substrate 3.1 and several pins 3.2, described power device
Part 1 and control module 2 are respectively positioned in the substrate 3.1 of lead frame, and the present embodiment uses tile mode, compared to the mode of stacking,
Tile mode reliability is higher.The first pole (lower surface for being located at power device) of power device 1 is electrically connected with substrate 3.1, and
Drawn by least one pin SW being connected with substrate.Second pole S of power device 1 is electrically connected by metal tape with pin GND
Connect, the control module 2 is electrically connected with the control pole G of power device 1 and the second pole S, and control module 2 is electrically connected with pin VCC.
Second pole S of the power device is electrically connected by the first metal tape 4.1 and the second metal tape 4.2 with multiple pins
Connect, electrically connected between the plurality of pin, i.e., pin GND shown in Fig. 1., can be according to encapsulating structure for the quantity of metal tape
Space, the combined factors such as target of the quantity of pin and temperature rise control consider and set.Described metal tape is typically adopted
With aluminium strip, but it is not limited to this material.On processing step, using first playing metal tape, then lead is played.
First pole of the power device 1 is located at the back side of power device 1, and is fitted with the conductive layer in substrate, work(
Second pole of rate device and control pole are located at its front.Comparatively it, is not absolute concept that the described back side is with front,
In fig. 1, the back side of power device refers to its lower surface, and front refers to its upper surface.
Described control module 2 is electrically connected with substrate 3.1, the second pole S of power device 1 and control pole G respectively by lead
Connect, because the first order of power device 1 is electrically connected with substrate 3.1, set conducting resinl to realize the electrical links of the two between,
Therefore the first order of the control module 2 also with power device 1 is connected.Above electrical links are generally lead connection, and the material of lead is
Plate palladium copper wire.
The pin SW outputs that the electrical connection of first pole of power device 1 and substrate 3.1 is drawn characterize the power device
The sampled signal of state, regard the second pole S of power device 1 pin GND drawn as earth terminal.
With reference to shown in Fig. 2, the circuit structure using power-switching circuit of the present utility model is illustrated, described power supply turns
Circuit is changed by taking Boost topologys as an example, the utility model is applied to the integrated circuit of power device to include main power tube M and control
The chip of module, chip of the present utility model includes main power tube M and controls circuit, described main work(for controlling switch pipe M
Rate pipe M is power device 1 of the present utility model, and described controls circuit to be control module 2 of the present utility model.The power device
The first order of part 1 is drain electrode, its second extremely source electrode, and it controls extremely grid OR gate pole.
During the Boost circuit output high voltage of low pressure input, input current is very big, flows through main power tube M electric current very
Greatly, main power tube M generally requires carrying larger current, therefore is electrically connected using metal tape with pin GND realizations, so as to reduce
The impedance of connection, it is possible to reduce chip generates heat, can preferably control chip temperature rise, and contribute to the lifting of chip efficiency.
The application of above-mentioned use Boost topology only an applicating example of the present utility model, it is necessary to which explanation is Fig. 1
Connection and non-fully one-to-one relation with Fig. 2, can be according to application the need for, adjustment metal tape, lead and pin
Electrical connection.Also there are other application modes in the utility model, for example, as synchronous rectification chip application in inverse-excitation type
Among topological, power device therein is synchronous rectifier, and control module is the synchronous commutating control circuit of synchronous rectifier.
In addition, although embodiment is separately illustrated and illustrated above, but it is related to the common technology in part, in this area
Those of ordinary skill apparently, can be replaced and integrate between the embodiments, be related to one of embodiment and record is not known
Content, then refer to another embodiment on the books.
Embodiments described above, does not constitute the restriction to the technical scheme protection domain.It is any in above-mentioned implementation
Modifications, equivalent substitutions and improvements made within the spirit and principle of mode etc., should be included in the protection model of the technical scheme
Within enclosing.
Claims (7)
1. a kind of integrated circuit applied to power device, including power device, control module and lead frame, described lead
Framework includes substrate and several pins, it is characterised in that：Described power device and control module is respectively positioned on lead frame
In substrate, the first pole of power device is electrically connected with substrate, and the second pole of power device passes through metal tape and at least one pin
Electrical connection, the control module is electrically connected with power device control pole and the second pole, and control module is electrically connected with least one pin
Connect.
2. the integrated circuit according to claim 1 applied to power device, it is characterised in that：The of the power device
The electrical connection of one pole and substrate is drawn by least one pin being connected with substrate.
3. the integrated circuit according to claim 1 applied to power device, it is characterised in that：The of the power device
Two poles are electrically connected by the first metal tape and the second metal tape with multiple pins, are electrically connected between the plurality of pin.
4. the integrated circuit according to claim 3 applied to power device, it is characterised in that：The of the power device
One pole is located at the back side of power device, and is fitted with the conductive layer in substrate, and the second pole of power device and control pole are located at
Its front.
5. the integrated circuit according to claim 2 applied to power device, it is characterised in that：Described control module is led to
Lead is crossed to electrically connect with substrate, the second pole of power device and control pole respectively.
6. the integrated circuit according to claim 4 applied to power device, it is characterised in that：By the first of power device
The pin output that the electrical connection of pole and substrate is drawn characterizes the sampled signal of the power device state, by the second of power device
The pin that pole is drawn is used as earth terminal.
7. the integrated circuit applied to power device according to claim 1-6 any one, it is characterised in that：The work(
Rate device is power MOSFET, and its first order is drain electrode, its second extremely source electrode, and it controls extremely grid.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720142119.1U CN206480618U (en) | 2017-02-16 | 2017-02-16 | Integrated circuit applied to power device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720142119.1U CN206480618U (en) | 2017-02-16 | 2017-02-16 | Integrated circuit applied to power device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN206480618U true CN206480618U (en) | 2017-09-08 |
Family
ID=59748831
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201720142119.1U Active CN206480618U (en) | 2017-02-16 | 2017-02-16 | Integrated circuit applied to power device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN206480618U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107808868A (en) * | 2017-10-13 | 2018-03-16 | 矽力杰半导体技术(杭州)有限公司 | Chip-packaging structure and its manufacture method |
-
2017
- 2017-02-16 CN CN201720142119.1U patent/CN206480618U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107808868A (en) * | 2017-10-13 | 2018-03-16 | 矽力杰半导体技术(杭州)有限公司 | Chip-packaging structure and its manufacture method |
| CN107808868B (en) * | 2017-10-13 | 2020-03-10 | 矽力杰半导体技术(杭州)有限公司 | Chip packaging structure and manufacturing method thereof |
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|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CP03 | Change of name, title or address | ||
| CP03 | Change of name, title or address |
Address after: Room 901-23, 9 / F, west 4 building, Xigang development center, 298 Zhenhua Road, Sandun Town, Xihu District, Hangzhou City, Zhejiang Province, 310030 Patentee after: Jiehuate Microelectronics Co.,Ltd. Address before: Room 424, building 1, 1500 Wenyi West Road, Cangqian street, Yuhang District, Hangzhou City, Zhejiang Province Patentee before: JOULWATT TECHNOLOGY (HANGZHOU) Co.,Ltd. |