CN204733271U - A kind of miniaturized high-speed realtime graphic is gathered and edited and storage device - Google Patents
A kind of miniaturized high-speed realtime graphic is gathered and edited and storage device Download PDFInfo
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- CN204733271U CN204733271U CN201520028095.8U CN201520028095U CN204733271U CN 204733271 U CN204733271 U CN 204733271U CN 201520028095 U CN201520028095 U CN 201520028095U CN 204733271 U CN204733271 U CN 204733271U
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Abstract
The utility model relates to technical field of image processing, is specifically related to a kind of miniaturized high-speed realtime graphic and gathers and edits and storage device, and object is that to solve the image temporal of existing high speed camera record shorter, and there is bulky, that complex structure, reliability are low problem.It is characterized in that, comprise image and to gather and edit unit and data storage cell; The gather and edit input of unit of image is connected with camera, and output is connected with the input of data storage cell by LVDS data wire; The output of data storage cell is connected with host computer.The utility model adopts monolithic SATA interface solid hard disk to store, and average storage speed can reach 90MB/s, can realize the image storage reaching 60 minutes that resolution is 644x484, frame per second is 240 frames/s.Compared with IMAQ memory device in the past, this image gather and edit to have with storage device that storage speed is fast, data speed of download is fast, volume is little, low in energy consumption, shock resistance, the feature such as anti-vibration.
Description
Technical field
The utility model relates to technical field of image processing, is specifically related to a kind of miniaturized high-speed realtime graphic and gathers and edits and storage device.
Background technology
In recent years, in some Spacecraft Flight Test, need to carry out long-time collection and storage to high speed image, require device miniaturization, low-power consumption simultaneously, and HI high impact and vibration environment can be adapted to.But along with the frame frequency of high speed camera improves constantly, its data volume exported also constantly increases, and brings very large challenge to the transmission of high speed image and storage.
Current most of high speed camera adopts Camera Link interface, conventional high-speed image sampling method is the large buffer memory first image being stored to high speed camera or computer-internal, and then the image in buffer memory is recorded in hard disc of computer, but due to the restriction of buffer memory capacity, this mode can only record the image of very short time.High speed image real non-destructive record stores playback reproducer (patent No. CN 102098562B), very high memory bandwidth can be reached, but bulky, complex structure, still depends on computer, miniaturization, low-power consumption and anti-vibration, shock proof requirement cannot be realized.
Utility model content
The purpose of this utility model is that to solve the image temporal of existing high speed camera record shorter, and there is bulky, that complex structure, reliability are low problem, provide a kind of can by Camera Link interface high speed camera export image carry out long-time high speed and real time sampling, coding with storage, afterwards by gigabit ethernet interface by data upload to computer, and miniaturization, low-power consumption, the miniaturized high-speed realtime graphic that can adapt to HI high impact and vibration environment are gathered and edited and storage device.
The utility model is achieved in that
A kind of miniaturized high-speed realtime graphic is gathered and edited and storage device, comprises image and to gather and edit unit and data storage cell; The gather and edit input of unit of image is connected with camera, and output is connected with the input of data storage cell by LVDS data wire; The output of data storage cell is connected with host computer.
Image as above unit of gathering and editing comprises Camera Link interface module, image coding module and LVDS data transmission blocks; The input of Camera Link interface module is connected with camera, and output is connected with the input of image coding module; The output of image coding module is connected with the input of LVDS data transmission blocks; The input of LVDS data transmission blocks is connected with the input of data storage cell.
Image as above gather and edit unit adopt XILINX company manufacture XC6SLX45T type FPGA realize.
Data storage cell as above comprises kernel processor chip, Flash configuring chip, the first cache chip, the second cache chip, connect chip, SATA interface solid hard disk, gigabit ethernet interface and spare communication port; The gather and edit output of unit of kernel processor chip and image is connected, and gigabit ethernet interface is connected with host computer respectively with spare communication port; Flash configuring chip, the first cache chip, the second cache chip, connect chip, gigabit ethernet interface and spare communication port are connected to the outside of kernel processor chip; Connect chip is also connected with SATA interface solid hard disk.
The XC6SLX45T type FPGA that kernel processor chip as above adopts XILINX company to manufacture realizes; The W25Q64BVF chip that Flash configuring chip adopts WINBOND company to produce realizes; The MT41J64M16 type DDR3SDRAM chip that first cache chip and the second cache chip all adopt MICRON company to produce realizes; Connect chip adopts JMH330S chip to realize; The 840PRO hard disk that SATA interface solid hard disk adopts Samsung to produce realizes; The 88E1111 chip that gigabit ethernet interface adopts RJ45 interface and MARVELL company to produce realizes jointly; Spare communication port adopts RS422 Interface realization.
The beneficial effects of the utility model are:
The utility model comprises image and to gather and edit unit and data storage cell.The utility model adopts monolithic SATA interface solid hard disk to store, and average storage speed can reach 90MB/s, can realize the image storage reaching 60 minutes that resolution is 644x484, frame per second is 240 frames/s.Compared with IMAQ memory device in the past, this image gather and edit to have with storage device that storage speed is fast, data speed of download is fast, volume is little, low in energy consumption, shock resistance, the feature such as anti-vibration, can be applicable to the image record field of the high speeds such as Aeronautics and Astronautics, high reliability request, have broad application prospects and good economic benefit.
Accompanying drawing explanation
Fig. 1 is that a kind of miniaturized high-speed realtime graphic of the present utility model is gathered and edited and the structure chart of storage device;
Fig. 2 is that a kind of miniaturized high-speed realtime graphic of the utility model is gathered and edited the structure chart of unit of gathering and editing with the image of storage device;
Fig. 3 is that a kind of miniaturized high-speed realtime graphic of the utility model is gathered and edited and the structure chart of the data storage cell of storage device.
Embodiment
Below in conjunction with drawings and Examples, the utility model is described further.
As shown in Figure 1, a kind of miniaturized high-speed realtime graphic is gathered and edited and storage device, comprises image and to gather and edit unit and data storage cell.The gather and edit input of unit of image is connected with camera, and output is connected with the input of data storage cell by LVDS data wire.The output of data storage cell is connected with host computer.Image gathers and edits unit for gathering the view data of camera transmission, view data is converted to the data format of data storage cell identification, sends the data to data storage cell subsequently.Data storage cell receive image gather and edit unit send view data, data are stored, subsequently by store after data send to host computer.
As shown in Figure 2, image unit of gathering and editing comprises Camera Link interface module, image coding module and LVDS data transmission blocks.The input of Camera Link interface module is connected with camera, and output is connected with the input of image coding module.The output of image coding module is connected with the input of LVDS data transmission blocks.The input of LVDS data transmission blocks is connected with the input of data storage cell.CameraLink interface module receives the LVDS high speed serialization viewdata signal that camera exports, and LVDS high speed serialization viewdata signal is converted to Parallel image data signal, Parallel image data signal is sent to image coding module.Image coding module receives the Parallel image data signal that Camera Link interface module sends, picture frame coding and Frame coding are carried out to Parallel image data signal, for the data format of matched data memory cell, and conveniently image is recovered, the data-signal after coding is sent to LVDS data transmission blocks. afterwardsLVDS data transmission blocks receives the data-signal after the coding of image coding module transmission, by the data-signal serialization after coding, the coded data signal after serialization is sent to data storage cell.
In the present embodiment, image gather and edit unit adopt XILINX company manufacture XC6SLX45T type FPGA realize.
As shown in Figure 3, data storage cell comprises kernel processor chip, Flash configuring chip, the first cache chip, the second cache chip, connect chip, SATA interface solid hard disk, gigabit ethernet interface and spare communication port.The gather and edit output of unit of kernel processor chip and image is connected, and gigabit ethernet interface is connected with host computer respectively with spare communication port.Flash configuring chip, the first cache chip, the second cache chip, connect chip, gigabit ethernet interface and spare communication port are connected to the outside of kernel processor chip.Connect chip is also connected with SATA interface solid hard disk.Kernel processor chip loads and starts from Flash configuring chip, enters operating state.Kernel processor chip is connected with host computer with spare communication port respectively by gigabit ethernet interface, can receive instruction data storage and data download instruction that host computer sends.When data store, kernel processor chip receive image gather and edit unit send serialization after coded data signal, this signal is converted to parallel data signal, by parallel data signal buffer memory to the first cache chip.Kernel processor chip reads the parallel data signal in the first cache chip, and parallel data signal is sent to connect chip.Connect chip receives the parallel data signal that kernel processor chip sends, and parallel data signal is write SATA interface solid hard disk.When data are downloaded, connect chip reads the parallel data signal in SATA interface solid hard disk, and parallel data signal is sent to kernel processor chip.Kernel processor chip inside realizes the soft core of Microblaze, uses the second cache chip to perform space as the program of the soft core of Microblaze and data, runs Transmission Control Protocol and receives the command signal that host computer sends.Kernel processor chip sends command signal according to data and parallel data signal is sent to gigabit ethernet interface according to Transmission Control Protocol.Gigabit ethernet interface receives the parallel data signal that kernel processor chip sends, and parallel data signal is sent to host computer.When gigabit ethernet interface operating state is abnormal, parallel data signal is sent to spare communication port by kernel processor chip.The parallel data signal that spare communication port accepts kernel processor chip sends, sends to host computer by parallel data signal.
In the present embodiment, the XC6SLX45T type FPGA that kernel processor chip adopts XILINX company to manufacture realizes; The W25Q64BVF chip that Flash configuring chip adopts WINBOND company to produce realizes; The MT41J64M16 type DDR3SDRAM chip that first cache chip and the second cache chip all adopt MICRON company to produce realizes; Connect chip adopts JMH330S chip to realize; The 840PRO hard disk that SATA interface solid hard disk adopts Samsung to produce realizes; The 88E1111 chip that gigabit ethernet interface adopts RJ45 interface and MARVELL company to produce realizes jointly; Spare communication port adopts RS422 Interface realization.
The utility model comprises image and to gather and edit unit and data storage cell.The utility model storage speed is fast, and memory capacity is large.Adopt monolithic SATA interface solid hard disk to store, average storage speed can reach 90MB/s.The highest solid state hard disc adopting 512G capacity, can realize longer time high-speed high capacity image and gather and edit and store.
Make full use of FPGA internal resource, reduce costs, volume and power consumption.Directly realizing CameraLink interface by FPGA, without the need to adopting special Camera Link interface chip, reducing volume, cost and power consumption.Image is gathered and edited between unit and data storage cell and is adopted two pairs of LVDS data line transfer data, and interface rate is high, and line is simple, highly versatile.
Data speed of download is fast.Data storage cell part adopts gigabit ethernet interface and upper machine communication, and adopts Transmission Control Protocol as data communication protocol, and average speed of download is 24MB/s, and applicability is strong, and reliability is high.
Volume is little, low in energy consumption.Image unit of gathering and editing is made up of the circuit board of one piece of 2.5 cun of size, data storage cell is by the circuit board of one piece of 2.5 cun of size and one piece of 2.5 cun of solid state hard disc composition, circuit board size and location hole are all consistent with 2.5 cun of solid state hard discs, copper post is used two pieces of circuit boards and solid state hard disc to be installed together, the shell sizes of whole device is only 110mm × 80mm × 40mm, and when data store, power consumption is 5.2 watts.
Shock resistance, anti-vibration, has power-down protection, and reliability is high.The advantages such as solid state hard disc itself has shock resistance, anti-vibration, and between solid state hard disc and the SATA interface of circuit board, adopt low noise difference cable directly to weld, improve anti-seismic performance.
Claims (5)
1. miniaturized high-speed realtime graphic is gathered and edited and a storage device, it is characterized in that: it comprises image and to gather and edit unit and data storage cell; The gather and edit input of unit of image is connected with camera, and output is connected with the input of data storage cell by LVDS data wire; The output of data storage cell is connected with host computer.
2. miniaturized high-speed realtime graphic according to claim 1 is gathered and edited and storage device, it is characterized in that: described image unit of gathering and editing comprises Camera Link interface module, image coding module and LVDS data transmission blocks; The input of Camera Link interface module is connected with camera, and output is connected with the input of image coding module; The output of image coding module is connected with the input of LVDS data transmission blocks; The input of LVDS data transmission blocks is connected with the input of data storage cell.
3. miniaturized high-speed realtime graphic according to claim 1 is gathered and edited and storage device, it is characterized in that: described image gather and edit unit adopt XILINX company manufacture XC6SLX45T type FPGA realize.
4. miniaturized high-speed realtime graphic according to claim 1 is gathered and edited and storage device, it is characterized in that: described data storage cell comprises kernel processor chip, Flash configuring chip, the first cache chip, the second cache chip, connect chip, SATA interface solid hard disk, gigabit ethernet interface and spare communication port; The gather and edit output of unit of kernel processor chip and image is connected, and gigabit ethernet interface is connected with host computer respectively with spare communication port; Flash configuring chip, the first cache chip, the second cache chip, connect chip, gigabit ethernet interface and spare communication port are connected to the outside of kernel processor chip; Connect chip is also connected with SATA interface solid hard disk.
5. miniaturized high-speed realtime graphic according to claim 4 is gathered and edited and storage device, it is characterized in that: the XC6SLX45T type FPGA that described kernel processor chip adopts XILINX company to manufacture realizes; The W25Q64BVF chip that Flash configuring chip adopts WINBOND company to produce realizes; The MT41J64M16 type DDR3SDRAM chip that first cache chip and the second cache chip all adopt MICRON company to produce realizes; Connect chip adopts JMH330S chip to realize; The 840PRO hard disk that SATA interface solid hard disk adopts Samsung to produce realizes; The 88E1111 chip that gigabit ethernet interface adopts RJ45 interface and MARVELL company to produce realizes jointly; Spare communication port adopts RS422 Interface realization.
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| CN201520028095.8U CN204733271U (en) | 2015-01-15 | 2015-01-15 | A kind of miniaturized high-speed realtime graphic is gathered and edited and storage device |
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| CN201520028095.8U CN204733271U (en) | 2015-01-15 | 2015-01-15 | A kind of miniaturized high-speed realtime graphic is gathered and edited and storage device |
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