CN204633586U - A kind of switch tube driving circuit and multi-level circuit - Google Patents
A kind of switch tube driving circuit and multi-level circuit Download PDFInfo
- Publication number
- CN204633586U CN204633586U CN201520394804.4U CN201520394804U CN204633586U CN 204633586 U CN204633586 U CN 204633586U CN 201520394804 U CN201520394804 U CN 201520394804U CN 204633586 U CN204633586 U CN 204633586U
- Authority
- CN
- China
- Prior art keywords
- switching tube
- driving circuit
- drive chip
- isolation drive
- termination
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Abstract
This application discloses a kind of switch tube driving circuit and multi-level circuit, the output of described switch tube driving circuit connects the control pole of the first switching tube; The input of described switch tube driving circuit connects the drive singal pin of described first switching tube and the drive singal pin of N number of second switch pipe; Wherein, described first switching tube is 1 switching tube in multi-level circuit, and described N number of second switch pipe is the whole switching tubes needing to meet with described first switching tube interlocked relationship in described multi-level circuit, N >=1; Described switch tube driving circuit is used for when detecting that the drive singal pin of described first switching tube is setting level, the drive singal pin of described N number of second switch pipe is the inverting level of described setting level, generate and export the signal for controlling described first switching tube conducting, preventing in multi-level circuit the switching tube conducting simultaneously needing to interlock.
Description
Technical field
The utility model relates to electric and electronic technical field, more particularly, relates to a kind of switch tube driving circuit and multi-level circuit.
Background technology
In multi-level circuit, in order to prevent, circuit is straight-through requires that switching tube drive singal interlocks, but may because of reasons such as control logic mistake, line-hits when practical application, cause the switching tube drive singal needing interlocking simultaneously effective, and then make the switching tube conducting simultaneously needing interlocking, form straight circuit, the short-circuit impact electric current occurred in straight circuit very easily burns switching tube.
Utility model content
In view of this, the utility model provides a kind of switch tube driving circuit and multi-level circuit, to prevent the switching tube conducting simultaneously needing in multi-level circuit to interlock.
A kind of switch tube driving circuit, concrete:
The output of described switch tube driving circuit connects the control pole of the first switching tube;
The input of described switch tube driving circuit connects the drive singal pin of described first switching tube and the drive singal pin of N number of second switch pipe;
Wherein, described first switching tube is 1 switching tube in multi-level circuit, and described N number of second switch pipe is the whole switching tubes needing to meet with described first switching tube interlocked relationship in described multi-level circuit, N >=1;
Described switch tube driving circuit is used for, when detecting that the drive singal pin of described first switching tube is setting level, the drive singal pin of described N number of second switch pipe is the inverting level of described setting level, generating and exporting the signal for controlling described first switching tube conducting.
Wherein, described switch tube driving circuit comprises 1 isolation drive chip, 1 DC source and N+2 resistance, concrete:
The control pole of the first switching tube described in the output termination of described isolation drive chip;
The positive input terminal of isolation drive chip described in one termination of the 1st described resistance, DC source described in another termination;
The negative input end of isolation drive chip described in one termination of the 2nd described resistance, the drive singal pin of the first switching tube described in another termination;
One end of all the other N number of resistance and the drive singal pin of described N number of second switch pipe connect one to one, and the other end connects the positive input terminal of described isolation drive chip simultaneously.
Wherein, when N >=2, described switch tube driving circuit also comprises N number of diode, concrete:
Described N number of diode and all the other N number of resistance one_to_one corresponding described, connected in series, and the anode of diode described in each all connects the positive input terminal of described isolation drive chip.
Wherein, described isolation drive chip is the driving chip of current mode input or the driving chip of voltage-type input.
Wherein, described switch tube driving circuit 1 isolation drive chip, 1 DC source, a N+3 resistance and N+1 the 3rd switching tube, concrete:
The control pole of the first switching tube described in the output termination of described isolation drive chip;
The positive input terminal of isolation drive chip described in one termination of the 1st described resistance, DC source described in another termination;
The negative input end of isolation drive chip described in one termination of the 2nd described resistance, DC source described in another termination;
The control pole of described 3rd switching tube of one termination the 1st of the 3rd described resistance, the drive singal pin of the first switching tube described in another termination; The input pole of the 1st described 3rd switching tube connects the negative input end of described isolation drive chip, its output stage ground connection;
One end of all the other N number of resistance and the drive singal pin of described N number of second switch pipe connect one to one, and the control pole of the other end and all the other N number of 3rd switching tubes connects one to one; The input pole of all the other N number of 3rd switching tubes described connects the positive input terminal of described isolation drive chip simultaneously, and its output stage is ground connection simultaneously.
Wherein, described isolation drive chip is the driving chip of current mode input or the driving chip of voltage-type input.
Wherein, described N+1 the 3rd switching tube is MOSFET or triode.
A kind of multi-level circuit, comprising: multiple switching tube, and any one switch tube driving circuit above-mentioned disclosed connected one to one with switching tube described in each.
Wherein, described multiple switching tube is IGBT or MOSFET.
As can be seen from above-mentioned technical scheme, the utility model is to set the useful signal of level as each way switch pipe drive singal, and the switching tube drive singal with interlocking logic is focused in same switch tube driving circuit, the break-make of each switching tube constrained each other, so when multi-level circuit is unified adopt switch tube driving circuit disclosed in the utility model to drive the switching tube needing interlocking time, would not occur because of needs interlocking switching tube drive singal simultaneously for useful signal and make the switching tube that should interlock while conducting situation.Further, after trouble shooting, can recover normal at once, not affect multi-level circuit and continue normal operation.
Accompanying drawing explanation
In order to be illustrated more clearly in the utility model embodiment or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only embodiments more of the present utility model, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is a kind of switch tube driving circuit pin function schematic diagram disclosed in the utility model embodiment;
Fig. 2 a is a kind of T font tri-level circuit structural representation disclosed in prior art;
Fig. 2 b is a kind of I font tri-level circuit structural representation disclosed in prior art;
The driving circuit structure schematic diagram of Fig. 3 a a kind of switching tube Q1 disclosed in the utility model embodiment;
The driving circuit structure schematic diagram of Fig. 3 b a kind of switching tube Q2 disclosed in the utility model embodiment;
The driving circuit structure schematic diagram of Fig. 3 c a kind of switching tube Q3 disclosed in the utility model embodiment;
The driving circuit structure schematic diagram of Fig. 3 d a kind of switching tube Q4 disclosed in the utility model embodiment;
Fig. 4 a is the driving circuit structure schematic diagram of disclosed another switching tube Q1 of the utility model embodiment;
Fig. 4 b is the driving circuit structure schematic diagram of disclosed another switching tube Q4 of the utility model embodiment.
Fig. 5 a is the driving circuit structure schematic diagram of disclosed another switching tube Q1 of the utility model embodiment;
Fig. 5 b is the driving circuit structure schematic diagram of disclosed another switching tube Q2 of the utility model embodiment;
Fig. 5 c is the driving circuit structure schematic diagram of disclosed another switching tube Q3 of the utility model embodiment;
Fig. 5 d is the driving circuit structure schematic diagram of disclosed another switching tube Q4 of the utility model embodiment.
Embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, be clearly and completely described the technical scheme in the utility model embodiment, obviously, described embodiment is only the utility model part embodiment, instead of whole embodiments.Based on the embodiment in the utility model, those of ordinary skill in the art are not making the every other embodiment obtained under creative work prerequisite, all belong to the scope of the utility model protection.
See Fig. 1, the utility model embodiment discloses a kind of switch tube driving circuit, to prevent the switching tube conducting simultaneously needing in multi-level circuit to interlock, specific as follows:
The output of described switch tube driving circuit connects the control pole of the first switching tube;
The input of described switch tube driving circuit connects the drive singal pin of described first switching tube and the drive singal pin of N number of second switch pipe;
Wherein, described first switching tube is 1 switching tube in multi-level circuit, and described N number of second switch pipe is the whole switching tubes needing to meet with described first switching tube interlocked relationship in described multi-level circuit, N >=1;
Described switch tube driving circuit is used for, when detecting that the drive singal pin of described first switching tube is setting level, the drive singal pin of described N number of second switch pipe is the inverting level of described setting level, generating and exporting the signal for controlling described first switching tube conducting.
The utility model using set level as each way switch pipe drive singal useful signal (that is, the drive singal of this switching tube corresponding during any one switching tube conducting is all described setting level), and the switching tube drive singal with interlocking logic is focused in same switch tube driving circuit, the break-make of each switching tube constrained each other, during the switching tube so adopting switch tube driving circuit disclosed in the utility model to drive needs to interlock when multi-level circuit is unified, the situation of the switching tube conducting simultaneously that simultaneously should interlock for useful signal and making because of the switching tube drive singal of needs interlocking would not be there is.Further, after trouble shooting, can recover normal at once, not affect multi-level circuit and continue normal operation.
Wherein, the utility model can useful signal using low level as each way switch pipe drive singal, also can useful signal using high level as each way switch pipe drive singal, the topological structure of described switch tube driving circuit corresponding under both of these case exists different, specifically describes as follows:
1) when using low level as the useful signal of each way switch pipe drive singal, described switch tube driving circuit comprises 1 isolation drive chip, 1 DC source and N+2 resistance, wherein:
The control pole of the first switching tube described in the output termination of described isolation drive chip;
The positive input terminal of isolation drive chip described in one termination of the 1st described resistance, DC source described in another termination;
The negative input end of isolation drive chip described in one termination of the 2nd described resistance, the drive singal pin of the first switching tube described in another termination;
One end of all the other N number of resistance and the drive singal pin of described N number of second switch pipe connect one to one, and the other end connects the positive input terminal of described isolation drive chip simultaneously.
Wherein, the former limit input of described isolation drive chip is high level effectively, and when the voltage difference of former limit IN+ and IN-reaches certain threshold value, secondary Vout exports the signal for controlling described first switching tube conducting.Described isolation drive chip can be the driving chip of current mode input, also can be the driving chip of voltage-type input, not limit to.
For the switching tube needing in multi-level circuit to interlock, its drive circuit that correspondence connects separately all builds according to the topological structure as above provided, and can prevent the switching tube conducting simultaneously needing in multi-level circuit to interlock.For tri-level circuit, (described tri-level circuit can be the T font tri-level circuit shown in Fig. 2 a, also can be the I font tri-level circuit shown in Fig. 2 b; Fig. 2 a or the tri-level circuit shown in Fig. 2 b have four switching tube Q1 ~ Q4, the drive singal of Q1 ~ Q4 is designated as PWM1 ~ PWM4 respectively, because the needs of main circuit mode of operation, require to meet PWM1 and PWM3 interlocking, PWM1 and PWM4 interlocking, PWM2 and PWM4 interlocking simultaneously, that is, need to meet Q1 and Q3 interlocking, Q1 and Q4 interlocking, Q2 and Q4 interlocking simultaneously):
See Fig. 3 a, the switch tube driving circuit that switching tube Q1 correspondence connects, comprises isolation drive chip U1, DC source Vcc and resistance R1 ~ R4, wherein:
The output end vo ut of isolation drive chip U1 connects the control pole of switching tube Q1;
The positive input terminal IN+ of R1 mono-termination isolation drive chip U1, another termination DC source Vcc;
The negative input end IN-of R2 mono-termination isolation drive chip U1, another termination PWM1 pin;
R3 mono-termination PWM3 pin, the positive input terminal IN+ of another termination isolation drive chip U1;
R4 mono-termination PWM4 pin, the positive input terminal IN+ of another termination isolation drive chip U1.
The operation principle of switch tube driving circuit shown in Fig. 3 a is: under normal circumstances, when PWM1 is low level, PWM3, PWM4 of interlocking with PWM1 correspond to high level, and now IN-is dragged down, IN+ is elevated, and Vout exports the signal being used for control switch pipe Q1 conducting; When causing PWM3 and/or PWM4 to occur low level because of reasons such as control logic mistake, line-hits, then IN+ can be dragged down, even if now PWM1 is low level, Vout is still in disarmed state, switching tube Q1 not conducting.
See Fig. 3 b, the switch tube driving circuit that switching tube Q2 correspondence connects, comprises isolation drive chip U2, DC source Vcc and resistance R5 ~ R7, wherein:
The output end vo ut of isolation drive chip U2 connects the control pole of switching tube Q2;
The positive input terminal IN+ of R5 mono-termination isolation drive chip U2, another termination DC source Vcc;
The negative input end IN-of R6 mono-termination isolation drive chip U2, another termination PWM2 pin;
R7 mono-termination PWM4 pin, the positive input terminal IN+ of another termination isolation drive chip U2.
The operation principle of switch tube driving circuit shown in Fig. 3 b is: under normal circumstances, and when PWM2 is low level, the PWM4 interlocked with PWM2 corresponds to high level, and now IN-is dragged down, IN+ is elevated, and Vout exports the signal being used for control switch pipe Q2 conducting; When causing PWM4 to occur low level because of reasons such as control logic mistake, line-hits, then IN+ can be dragged down, even if now PWM2 is low level, Vout is still in disarmed state, switching tube Q2 not conducting.
See Fig. 3 c, the switch tube driving circuit that switching tube Q3 correspondence connects, comprises isolation drive chip U3, DC source Vcc and resistance R8 ~ R10, wherein:
The output end vo ut of isolation drive chip U3 connects the control pole of switching tube Q3;
The positive input terminal IN+ of R8 mono-termination isolation drive chip U3, another termination DC source Vcc;
The negative input end IN-of R9 mono-termination isolation drive chip U3, another termination PWM3 pin;
R10 mono-termination PWM1 pin, the positive input terminal IN+ of another termination isolation drive chip U3.
The operation principle of switch tube driving circuit shown in Fig. 3 c is: under normal circumstances, and when PWM3 is low level, the PWM1 interlocked with PWM3 corresponds to high level, and now IN-is dragged down, IN+ is elevated, and Vout exports the signal being used for control switch pipe Q3 conducting; When causing PWM1 to occur low level because of reasons such as control logic mistake, line-hits, then IN+ can be dragged down, even if now PWM3 is low level, Vout is still in disarmed state, switching tube Q3 not conducting.
See Fig. 3 d, the switch tube driving circuit that switching tube Q4 correspondence connects, comprises isolation drive chip U4, DC source Vcc and resistance R11 ~ R14, wherein:
The output end vo ut of isolation drive chip U4 connects the control pole of switching tube Q4;
The positive input terminal IN+ of R11 mono-termination isolation drive chip U4, another termination DC source Vcc;
The negative input end IN-of R12 mono-termination isolation drive chip U4, another termination PWM4 pin;
R13 mono-termination PWM1 pin, the positive input terminal IN+ of another termination isolation drive chip U4;
R14 mono-termination PWM2 pin, the positive input terminal IN+ of another termination isolation drive chip U4.
The operation principle of switch tube driving circuit shown in Fig. 3 d is: under normal circumstances, when PWM4 is low level, PWM1, PWM2 of interlocking with PWM4 correspond to high level, and now IN-is dragged down, IN+ is elevated, and Vout exports the signal being used for control switch pipe Q4 conducting; When causing PWM1 and/or PWM2 to occur low level because of reasons such as control logic mistake, line-hits, then IN+ can be dragged down, even if now PWM4 is low level, Vout is still in disarmed state, switching tube Q4 not conducting.
Shown in complex chart 3a ~ Fig. 3 d, the associated description of topology is known, described tri-level circuit is using low level as the useful signal of PWM1 ~ PWM4, and the switching tube drive singal with interlocking logic is focused in same switch tube driving circuit, the break-make of each switching tube constrained each other, comprise: focusing in the drive circuit of Q1 by there is drive singal PWM3, PWM4 of interlocking logic with PWM1, retraining the break-make of Q1; Focusing in the drive circuit of Q2 by there is the drive singal PWM4 interlocking logic with PWM2, retraining the break-make of Q2, focusing in the drive circuit of Q3 by there is the drive singal PWM1 interlocking logic with PWM3, retraining the break-make of Q3; And focus in the drive circuit of Q4 by there is drive singal PWM1, PWM2 of interlocking logic with PWM4, retrain the break-make of Q4, thus the situation of conducting and Q2 and Q4 conducting simultaneously while of avoiding occurring Q1 and Q3 conducting simultaneously, Q1 and Q4.
As preferably, when N >=2, switch tube driving circuit disclosed in the present embodiment also comprises N number of diode, and wherein: described N number of diode and all the other N number of resistance one_to_one corresponding described, connected in series, and the anode of diode described in each all connects the positive input terminal of described isolation drive chip.Still for tri-level circuit, then:
See Fig. 4 a, the switch tube driving circuit that switching tube Q1 correspondence connects also comprises 2 diode D1 ~ D2, wherein: diode D1 and R3 connects; Diode D2 and R4 connects; The anode of diode D1 ~ D2 all connects the positive input terminal IN+ of isolation drive chip U1.
See Fig. 4 b, the switch tube driving circuit that switching tube Q4 correspondence connects also comprises 2 diode D3 ~ D4, wherein: diode D3 and R13 connects; Diode D4 and R14 connects; The anode of diode D3 ~ D4 all connects the positive input terminal IN+ of isolation drive chip U4.
The characteristic of diode D1 ~ D2 forward conduction, oppositely cut-off, can prevent from forming loop between PWM3 and PWM4 input pin and mutually disturbing.The effect of diode D3 ~ D4 in like manner, repeats no more.
2) when using high level as the useful signal of each way switch pipe drive singal, described switch tube driving circuit comprises 1 isolation drive chip, 1 DC source, a N+3 resistance and N+1 the 3rd switching tube, wherein:
The control pole of the first switching tube described in the output termination of described isolation drive chip;
The positive input terminal of isolation drive chip described in one termination of the 1st described resistance, DC source described in another termination;
The negative input end of isolation drive chip described in one termination of the 2nd described resistance, DC source described in another termination;
The control pole of described 3rd switching tube of one termination the 1st of the 3rd described resistance, the drive singal pin of the first switching tube described in another termination; The input pole of the 1st described 3rd switching tube connects the negative input end of described isolation drive chip, its output stage ground connection;
One end of all the other N number of resistance and the drive singal pin of described N number of second switch pipe connect one to one, and the control pole of the other end and all the other N number of 3rd switching tubes connects one to one; The input pole of all the other N number of 3rd switching tubes described connects the positive input terminal of described isolation drive chip simultaneously, and its output stage is ground connection simultaneously.
Wherein, described N+1 the 3rd switching tube can be triode, also can be MOSFET (Metal Oxide Semiconductor FET, mos field effect transistor), not limit to.
For the switching tube needing in multi-level circuit to interlock, its drive circuit that correspondence connects separately all builds according to the topological structure as above provided, and can prevent the switching tube conducting simultaneously needing in multi-level circuit to interlock.Still for tri-level circuit (described tri-level circuit can be the T font tri-level circuit shown in Fig. 2 a, also can be the I font tri-level circuit shown in Fig. 2 b):
See Fig. 5 a, the switch tube driving circuit that switching tube Q1 correspondence connects, comprises isolation drive chip U1, DC source Vcc, resistance R1 ~ R5 and switching tube S1 ~ S3, wherein:
The output end vo ut of isolation drive chip U1 connects the control pole of switching tube Q1;
R1 connects the positive input terminal of isolation drive chip U1, another termination DC source Vcc;
The negative input end of R2 mono-termination isolation drive chip U1, another termination DC source Vcc;
The control pole of R3 mono-termination switching tube S1, another termination PWM1 pin; The input pole of switching tube S1 connects the negative input end of isolation drive chip U1, its output stage ground connection;
R4 one end is connected with PWM3 pin, and the other end is connected with the control pole of switching tube S2; The input pole of switching tube S2 connects the positive input terminal of isolation drive chip U1, its output head grounding;
R5 one end is connected with PWM4 pin, and the other end is connected with the control pole of switching tube S3; The input pole of switching tube S3 connects the positive input terminal of isolation drive chip U1, its output head grounding.
The operation principle of switch tube driving circuit shown in Fig. 5 a is: under normal circumstances, when PWM1 is high level, PWM3, PWM4 of interlocking with PWM1 correspond to low level, now S1 conducting makes that IN-is dragged down, S2 ~ S3 cut-off makes IN+ be elevated, and Vout exports the signal being used for control switch pipe Q1 conducting; When causing PWM3 and/or PWM4 to occur high level because of reasons such as control logic mistake, line-hits, then IN+ can be dragged down, even if now PWM1 is high level, Vout is still in disarmed state, switching tube Q1 not conducting.
See Fig. 5 b, the switch tube driving circuit that switching tube Q2 correspondence connects, comprises isolation drive chip U2, DC source Vcc, resistance R6 ~ R9 and switching tube S4 ~ S5, wherein:
The output end vo ut of isolation drive chip U2 connects the control pole of switching tube Q2;
R6 connects the positive input terminal of isolation drive chip U2, another termination DC source Vcc;
The negative input end of R7 mono-termination isolation drive chip U2, another termination DC source Vcc;
The control pole of R8 mono-termination switching tube S4, another termination PWM2 pin; The input pole of switching tube S4 connects the negative input end of isolation drive chip U2, its output stage ground connection;
R9 one end is connected with PWM4 pin, and the other end is connected with the control pole of switching tube S5; The input pole of switching tube S5 connects the positive input terminal of isolation drive chip U2, its output head grounding.
The operation principle of switch tube driving circuit shown in Fig. 5 b is: under normal circumstances, when PWM2 is high level, the PWM4 interlocked with PWM2 corresponds to low level, and now S1 conducting makes that IN-is dragged down, S2 cut-off makes IN+ be elevated, and Vout exports the signal being used for control switch pipe Q2 conducting; When causing PWM4 to occur high level because of reasons such as control logic mistake, line-hits, then IN+ can be dragged down, even if now PWM2 is high level, Vout is still in disarmed state, switching tube Q2 not conducting.
See Fig. 5 c, the switch tube driving circuit that switching tube Q3 correspondence connects, comprises isolation drive chip U3, DC source Vcc, resistance R10 ~ R13 and switching tube S6 ~ S7, wherein:
The output end vo ut of isolation drive chip U3 connects the control pole of switching tube Q3;
R10 connects the positive input terminal of isolation drive chip U3, another termination DC source Vcc;
The negative input end of R11 mono-termination isolation drive chip U3, another termination DC source Vcc;
The control pole of R12 mono-termination switching tube S6, another termination PWM3 pin; The input pole of switching tube S6 connects the negative input end of isolation drive chip U3, its output stage ground connection;
R13 one end is connected with PWM1 pin, and the other end is connected with the control pole of switching tube S7; The input pole of switching tube S7 connects the positive input terminal of isolation drive chip U3, its output head grounding.
The operation principle of switch tube driving circuit shown in Fig. 5 c is: under normal circumstances, when PWM3 is high level, the PWM1 interlocked with PWM3 corresponds to low level, and now S6 conducting makes that IN-is dragged down, S7 cut-off makes IN+ be elevated, and Vout exports the signal being used for control switch pipe Q3 conducting; When causing PWM1 to occur high level because of reasons such as control logic mistake, line-hits, then IN+ can be dragged down, even if now PWM3 is high level, Vout is still in disarmed state, switching tube Q3 not conducting.
See Fig. 5 d, the switch tube driving circuit that switching tube Q4 correspondence connects, comprises isolation drive chip U4, DC source Vcc, resistance R14 ~ R17 and switching tube S8 ~ S10, wherein:
The output end vo ut of isolation drive chip U4 connects the control pole of switching tube Q4;
R14 connects the positive input terminal of isolation drive chip U4, another termination DC source Vcc;
The negative input end of R15 mono-termination isolation drive chip U4, another termination DC source Vcc;
The control pole of R16 mono-termination switching tube S8, another termination PWM4 pin; The input pole of switching tube S8 connects the negative input end of isolation drive chip U4, its output stage ground connection;
R17 one end is connected with PWM1 pin, and the other end is connected with the control pole of switching tube S9; The input pole of switching tube S9 connects the positive input terminal of isolation drive chip U4, its output head grounding;
R18 one end is connected with PWM2 pin, and the other end is connected with the control pole of switching tube S10; The input pole of switching tube S10 connects the positive input terminal of isolation drive chip U4, its output head grounding.
The operation principle of switch tube driving circuit shown in Fig. 5 d is: under normal circumstances, when PWM4 is high level, PWM1, PWM2 of interlocking with PWM4 correspond to low level, now S8 conducting makes that IN-is dragged down, S9 ~ S10 cut-off makes IN+ be elevated, and Vout exports the signal being used for control switch pipe Q4 conducting; When causing PWM1 and/or PWM2 to occur high level because of reasons such as control logic mistake, line-hits, then IN+ can be dragged down, even if now PWM4 is high level, Vout is still in disarmed state, switching tube Q4 not conducting.
Shown in complex chart 5a ~ Fig. 5 d, the associated description of topology is known, described tri-level circuit is using high level as the useful signal of PWM1 ~ PWM4, and the switching tube drive singal with interlocking logic is focused in same switch tube driving circuit, the break-make of each switching tube constrained each other, thus the situation of conducting and Q2 and Q4 conducting simultaneously while of avoiding occurring Q1 and Q3 conducting simultaneously, Q1 and Q4.
In addition, the utility model embodiment also discloses a kind of multi-level circuit, comprising: multiple switching tube, and any one switch tube driving circuit above-mentioned connected one to one with switching tube described in each.
Wherein, described switching tube can be IGBT (Insulated Gate Bipolar Transistor, igbt), can be also MOSFET, not limit to.
In sum, the utility model is to set the useful signal of level as each way switch pipe drive singal, and the switching tube drive singal with interlocking logic is focused in same switch tube driving circuit, the break-make of each switching tube constrained each other, so when multi-level circuit is unified adopt switch tube driving circuit disclosed in the utility model to drive the switching tube needing interlocking time, would not occur because of needs interlocking switching tube drive singal simultaneously for useful signal and make the switching tube that should interlock while conducting situation.Further, after trouble shooting, can recover normal at once, not affect multi-level circuit and continue normal operation.
In this specification, each embodiment adopts the mode of going forward one by one to describe, and what each embodiment stressed is the difference with other embodiments, between each embodiment identical similar portion mutually see.
To the above-mentioned explanation of the disclosed embodiments, professional and technical personnel in the field are realized or uses the utility model.To be apparent for those skilled in the art to the multiple amendment of these embodiments, General Principle as defined herein when not departing from spirit or scope of the present utility model, can realize in other embodiments.Therefore, the utility model can not be restricted to these embodiments shown in this article, but will meet the widest scope consistent with principle disclosed herein and features of novelty.
Claims (9)
1. a switch tube driving circuit, is characterized in that:
The output of described switch tube driving circuit connects the control pole of the first switching tube;
The input of described switch tube driving circuit connects the drive singal pin of described first switching tube and the drive singal pin of N number of second switch pipe;
Wherein, described first switching tube is 1 switching tube in multi-level circuit, and described N number of second switch pipe is the whole switching tubes needing to meet with described first switching tube interlocked relationship in described multi-level circuit, N >=1;
Described switch tube driving circuit is used for, when detecting that the drive singal pin of described first switching tube is setting level, the drive singal pin of described N number of second switch pipe is the inverting level of described setting level, generating and exporting the signal for controlling described first switching tube conducting.
2. switch tube driving circuit according to claim 1, is characterized in that, described switch tube driving circuit comprises 1 isolation drive chip, 1 DC source and N+2 resistance, wherein:
The control pole of the first switching tube described in the output termination of described isolation drive chip;
The positive input terminal of isolation drive chip described in one termination of the 1st described resistance, DC source described in another termination;
The negative input end of isolation drive chip described in one termination of the 2nd described resistance, the drive singal pin of the first switching tube described in another termination;
One end of all the other N number of resistance and the drive singal pin of described N number of second switch pipe connect one to one, and the other end connects the positive input terminal of described isolation drive chip simultaneously.
3. switch tube driving circuit according to claim 2, is characterized in that, when N >=2, described switch tube driving circuit also comprises N number of diode, wherein:
Described N number of diode and all the other N number of resistance one_to_one corresponding described, connected in series, and the anode of diode described in each all connects the positive input terminal of described isolation drive chip.
4. the switch tube driving circuit according to Claims 2 or 3, is characterized in that, described isolation drive chip is the driving chip of current mode input or the driving chip of voltage-type input.
5. switch tube driving circuit according to claim 1, is characterized in that, described switch tube driving circuit 1 isolation drive chip, 1 DC source, a N+3 resistance and N+1 the 3rd switching tube, wherein:
The control pole of the first switching tube described in the output termination of described isolation drive chip;
The positive input terminal of isolation drive chip described in one termination of the 1st described resistance, DC source described in another termination;
The negative input end of isolation drive chip described in one termination of the 2nd described resistance, DC source described in another termination;
The control pole of described 3rd switching tube of one termination the 1st of the 3rd described resistance, the drive singal pin of the first switching tube described in another termination; The input pole of the 1st described 3rd switching tube connects the negative input end of described isolation drive chip, its output stage ground connection;
One end of all the other N number of resistance and the drive singal pin of described N number of second switch pipe connect one to one, and the control pole of the other end and all the other N number of 3rd switching tubes connects one to one; The input pole of all the other N number of 3rd switching tubes described connects the positive input terminal of described isolation drive chip simultaneously, and its output stage is ground connection simultaneously.
6. switch tube driving circuit according to claim 5, is characterized in that, described isolation drive chip is the driving chip of current mode input or the driving chip of voltage-type input.
7. the switch tube driving circuit according to claim 5 or 6, is characterized in that, described N+1 the 3rd switching tube is MOSFET or triode.
8. a multi-level circuit, is characterized in that, comprising: multiple switching tube, and the switch tube driving circuit according to any one of the claim 1-7 connected one to one with switching tube described in each.
9. multi-level circuit according to claim 8, is characterized in that, described multiple switching tube is IGBT or MOSFET.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520394804.4U CN204633586U (en) | 2015-06-09 | 2015-06-09 | A kind of switch tube driving circuit and multi-level circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520394804.4U CN204633586U (en) | 2015-06-09 | 2015-06-09 | A kind of switch tube driving circuit and multi-level circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204633586U true CN204633586U (en) | 2015-09-09 |
Family
ID=54052570
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201520394804.4U Active CN204633586U (en) | 2015-06-09 | 2015-06-09 | A kind of switch tube driving circuit and multi-level circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN204633586U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107612359A (en) * | 2017-10-13 | 2018-01-19 | 华中科技大学 | A kind of AC synchronous sampling major loop based on the level of MOSFET tri- |
-
2015
- 2015-06-09 CN CN201520394804.4U patent/CN204633586U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107612359A (en) * | 2017-10-13 | 2018-01-19 | 华中科技大学 | A kind of AC synchronous sampling major loop based on the level of MOSFET tri- |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN205725436U (en) | Gate driver circuit and include the bridge circuit of gate driver circuit | |
| CN105186902B (en) | A kind of ANPC types three-level inverter, modulator approach and electrical equipment | |
| CN204886405U (en) | Two power isolation circuit | |
| CN201533295U (en) | IGBT drive and protection circuit | |
| CN104269997B (en) | A kind of adjustable transformer isolation complementary drive circuit in dead band | |
| CN103178694A (en) | Insulated gate bipolar transistor gate driving push-pull circuit | |
| CN105790554A (en) | IGBT circuit having dual-isolation characteristic and control method thereof | |
| CN103715871A (en) | High-power MOSFET driving circuit | |
| EP2698911A1 (en) | Power electronic circuit | |
| CN109004813A (en) | A kind of metal-oxide-semiconductor driving circuit inhibiting driving voltage spike | |
| CN102868143B (en) | A kind of overcurrent protection circuit of push-pull converter | |
| CN204633586U (en) | A kind of switch tube driving circuit and multi-level circuit | |
| CN105406692B (en) | IGBT drive circuit | |
| CN203859674U (en) | MOS tube negative voltage driving circuit and switch power source | |
| CN103401218B (en) | A kind of phase-shifting full-bridge overcurrent self-protection circuit based on CPLD and control method thereof | |
| CN209134378U (en) | Low-cost and high-performance switch tube driving circuit | |
| CN106452044A (en) | Signal interlock circuit for preventing short circuit of APF (active power filter) driving circuits | |
| CN208094431U (en) | A kind of ACRCD clamp circuits preventing single-phase photovoltaic inversion topology power pipe over-voltage breakdown | |
| CN109167592A (en) | Low-cost and high-performance switch tube driving circuit | |
| CN103595286A (en) | Dead-time compensation method and circuit used for bipolar modulation inverter bridge | |
| CN203574624U (en) | Switch control circuit | |
| CN205304597U (en) | Direct protection circuit of upper and lower bridge arm of H -bridge inverter | |
| CN202888808U (en) | Push-pull converter current foldback circuit | |
| CN205430189U (en) | Gate driving signal transmission circuit suitable for IGBT | |
| CN204886132U (en) | Prevent voltage pulse circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |