CN204517769U - A kind of extremely low power dissipation quartz crystal oscillator circuit - Google Patents

A kind of extremely low power dissipation quartz crystal oscillator circuit Download PDF

Info

Publication number
CN204517769U
CN204517769U CN201520315978.7U CN201520315978U CN204517769U CN 204517769 U CN204517769 U CN 204517769U CN 201520315978 U CN201520315978 U CN 201520315978U CN 204517769 U CN204517769 U CN 204517769U
Authority
CN
China
Prior art keywords
oxide
type metal
semiconductor
grid
operational amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201520315978.7U
Other languages
Chinese (zh)
Inventor
林美玉
王晓飞
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Guangzhou Li Chi Microelectronics Science And Technology Ltd
Original Assignee
Guangzhou Li Chi Microelectronics Science And Technology Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Guangzhou Li Chi Microelectronics Science And Technology Ltd filed Critical Guangzhou Li Chi Microelectronics Science And Technology Ltd
Priority to CN201520315978.7U priority Critical patent/CN204517769U/en
Application granted granted Critical
Publication of CN204517769U publication Critical patent/CN204517769U/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Oscillators With Electromechanical Resonators (AREA)

Abstract

A kind of extremely low power dissipation quartz crystal oscillator circuit, comprise 4 P type metal-oxide-semiconductors, 4 N-type metal-oxide-semiconductors, 1 inverter, 1 delay cell, 1 operational amplifier, 2 current sources, two switches, the work of circuit is divided into two stages, the power consumption of starting of oscillation stage circuit is comparatively large, completing circuit in the starting of oscillation of various complex condition, after treating that circuit normally works, the power consumption of circuit is by controlling the amplitude of tail current and oscillator, reduce circuit power consumption, the operating current of oscillator can be reduced to below 200nA, the normal work of holding circuit; Structure is simple, for the reference voltage source with high-order compensation that cost during chip manufacturing is low, can divide respectively and compensate, obtain the reference voltage of a low-temperature coefficient, effectively improve the precision of reference voltage source the high temperature of reference voltage, low-temp. portion.

Description

A kind of extremely low power dissipation quartz crystal oscillator circuit
Technical field
The utility model relates to the technical field of quartz crystal oscillator circuits, a quartz crystal oscillator circuits for low power consumption high-precision specifically, is mainly used in the correlation technique in real-time clock vibration, time measurement circuit, clock system etc. and real-time clock field.
Background technology
Quartz real-time clock is the time measurement system generally applied in actual life, has the advantages such as time precision is high, consistency good, cost advantage is obvious.The fields such as application widely and various wrist-watch, time showing, metered, standard time, time-sharing measurement.Along with the high speed development of reduction and the semiconductor technology gradually of quartzy cost, quartz concussion clock system becomes the real-time clock metering system of main flow by replacing traditional clock system gradually.The crystal resonant circuit that current employing aluminum gate process is made, its timing consistency is poor, circuit adjustment scarce capacity, power consumption are higher, becomes the bottleneck of current real-time clock metering system.
Summary of the invention
In order to overcome the deficiencies in the prior art, the utility model provides a kind of circuit and the method that reduce quartz crystal vibration power consumption, makes quartz crystal receive stable oscillation stationary vibration under peace level work electric current.Integrated various auxiliary clocking capability simultaneously, reduces system cost, improves integrated level and the consistency of system.
The technical solution of the utility model is:
A kind of extremely low power dissipation quartz crystal oscillator circuit, comprises 4 P type metal-oxide-semiconductors, 4 N-type metal-oxide-semiconductors, 1 inverter, 1 delay cell, 1 operational amplifier, 2 current sources, two switches, and 2 described current sources comprise maintenance current source I hwith latching current source I l, it is characterized in that, its circuit connecting mode is:
Maintain current source I hlower end be connected with the upper end of the first switch S 1; Latching current source I llower end be connected with the upper end of second switch S2; The drain electrode of the lower end of the first switch S 1 and the lower end of second switch S2, the first N-type metal-oxide-semiconductor NM1, the grid of the first N-type metal-oxide-semiconductor NM1, the grid of the second N-type metal-oxide-semiconductor NM2 are connected; The drain electrode of the drain electrode of the second N-type metal-oxide-semiconductor NM2 and the reverse input end of operational amplifier, a P type metal-oxide-semiconductor PM1, the grid of a P type metal-oxide-semiconductor PM1, the grid of the 2nd P type metal-oxide-semiconductor PM2 are connected; The drain electrode of the 2nd P type metal-oxide-semiconductor PM2 is connected with the biased section of operational amplifier; The grid of the 3rd P type metal-oxide-semiconductor PM3 is connected with the grid of the left end of quartz crystal oscillator, the 4th N-type metal-oxide-semiconductor NM4; The drain electrode of the 3rd P type metal-oxide-semiconductor PM3 is connected with the right-hand member of quartz crystal oscillator, the drain electrode of the 4th N-type metal-oxide-semiconductor NM4, delay cell left end; The source class of the 4th N-type metal-oxide-semiconductor NM4 is connected with the leakage level of the positive input of operational amplifier, the 3rd N-type metal-oxide-semiconductor NM3; The grid of the 3rd N-type metal-oxide-semiconductor NM3 is connected with the leakage level of the output of operational amplifier, the 4th P type metal-oxide-semiconductor PM4; The grid of the 4th P type metal-oxide-semiconductor PM4 is connected with the right-hand member of delay cell, the input of inverter, the control end of the first switch S 1; The output of inverter is connected with the control end of second switch S2;
Maintain current source I hupper end, latching current source I lupper end, the source class of a P type metal-oxide-semiconductor PM1, the source class of the 2nd P type metal-oxide-semiconductor PM2, the source class of the 3rd P type metal-oxide-semiconductor PM3, the source class of the 4th P type metal-oxide-semiconductor PM4 be connected with power vd D;
The source class of the source class of the first N-type metal-oxide-semiconductor NM1, the source class of the second N-type metal-oxide-semiconductor NM2, the 3rd N-type metal-oxide-semiconductor NM3 is connected with ground GND.
Described operational amplifier is Folded-cascode amplifier, and comprise 3 P type metal-oxide-semiconductors, 2 N-type metal-oxide-semiconductors, its circuit connecting mode is:
The grid of the first N-type metal-oxide-semiconductor NM1 is connected with the grid of the leakage level of the first N-type metal-oxide-semiconductor NM1, the second N-type metal-oxide-semiconductor NM2, the drain electrode of the 2nd P type metal-oxide-semiconductor PM2; The drain electrode of the second N-type metal-oxide-semiconductor NM2 and the drain electrode of the 3rd P type metal-oxide-semiconductor PM3, the output V of this operational amplifier oUTconnect; The grid of the 2nd P type metal-oxide-semiconductor PM2 is connected with the positive input VIP of operational amplifier; The grid of the 3rd P type metal-oxide-semiconductor PM3 is connected with the reverse input end VIN of operational amplifier; The source class of the 2nd P type metal-oxide-semiconductor PM2 is connected with the leakage level of the source class of the 3rd P type metal-oxide-semiconductor PM3, a P type metal-oxide-semiconductor PM1; The grid of the one P type metal-oxide-semiconductor PM1 is connected with bias voltage VBP;
The source electrode power vd D of the one P type metal-oxide-semiconductor MP1 connects;
The source electrode of the first N-type metal-oxide-semiconductor NM1, the source electrode ground GND of the second N-type metal-oxide-semiconductor NM2 connect.
Its operation principle is as follows:
Quartz crystal in the starting of oscillation stage with larger current work.When after quartz crystal stable oscillation stationary vibration certain hour, by reducing the tail current of quartz crystal monofier, quartz crystal is made to receive stable oscillation stationary vibration under peace level work electric current.
1. the oscillator-amplification circuit of quartz crystal is made up of PM3 and NM4 pipe, and the operating current of these two pipes is determined by the drain current of NM3 pipe and drain voltage;
2., in the starting of oscillation stage of quartz crystal, the drain current of NM1 pipe is by the larger current source I of electric current hsupply;
3., in the starting of oscillation stage of quartz crystal, VC1 end is low level, the conducting of PM4 pipe, and at this moment the grid voltage of NM3 pipe is VDD, thus under making the oscillator-amplification circuit of quartz crystal be operated in larger operating current;
4.NM1 pipe and NM2 manage and PM1 manages and PM2 pipe formation current mirror provides bias current to operational amplifier OPA;
5. operational amplifier OPA and NM3 pipe form negative feedback, the grid of the output termination NM3 pipe of operational amplifier OPA;
6., when after quartz crystal stable oscillation stationary vibration certain hour, VC1 end becomes high level, and PM4 pipe ends; The grid voltage of NM3 pipe is determined by the output of operational amplifier OPA;
7., when after quartz crystal stable oscillation stationary vibration certain hour, the drain current of NM1 pipe is by the very little current source I of electric current lsupply, thus the negative input voltage of operational amplifier OPA is raised, this causes the grid voltage of NM3 pipe to reduce, and drain voltage raises;
The drain voltage of 8.NM3 pipe raises and causes the operating current of oscillator-amplification circuit PM3 and NM4 pipe to reduce, thus quartz crystal oscillator circuit is worked under very low operation electric current.
The beneficial effects of the utility model are:
Structure is simple, for the reference voltage source with high-order compensation that cost during chip manufacturing is low, can divide respectively and compensate, obtain the reference voltage of a low-temperature coefficient, effectively improve the precision of reference voltage source the high temperature of reference voltage, low-temp. portion.
Compared with prior art, tool has the following advantages the utility model:
1) quartz crystal oscillator circuits of a kind of low power consumption high-precision described in the utility model, provide a kind of control technology of low-power consumption, the work of circuit is divided into two stages, the power consumption of starting of oscillation stage circuit is comparatively large, completing circuit in the starting of oscillation of various complex condition, after treating that circuit normally works, the power consumption of circuit is by controlling the amplitude of tail current and oscillator, reduce circuit power consumption, the operating current of oscillator can be reduced to below 200nA, the normal work of holding circuit;
2) the utility model inner integrated operational amplifier simultaneously, delay cell, high-precision current source and quartzy start-oscillation circuit substantially reduce the device expense of system.
Accompanying drawing explanation
Fig. 1 is the utility model circuit diagram;
Fig. 2 is operation amplifier circuit figure described in the utility model.
Embodiment
Below in conjunction with accompanying drawing, embodiment of the present utility model is described further:
As shown in Figure 1, a kind of extremely low power dissipation quartz crystal oscillator circuit, comprises 4 P type metal-oxide-semiconductors, 4 N-type metal-oxide-semiconductors, 1 inverter, 1 delay cell (Delay), 1 operational amplifier (OPA), 2 current source (I h, I l), two switches (S1, S2), is characterized in that, its circuit connecting mode is:
Current source I hlower end be connected with the upper end of switch S 1; Current source I llower end be connected with the upper end of switch S 2; The drain electrode of the lower end of switch S 1 and the lower end of switch S 2, the first N-type metal-oxide-semiconductor NM1, the grid of the first N-type metal-oxide-semiconductor NM1, the grid of the second N-type metal-oxide-semiconductor NM2 are connected; The drain electrode of the drain electrode of the second N-type metal-oxide-semiconductor NM2 and the reverse input end of operational amplifier (OPA), a P type metal-oxide-semiconductor PM1, the grid of a P type metal-oxide-semiconductor PM1, the grid of the 2nd P type metal-oxide-semiconductor PM2 are connected; The drain electrode of the 2nd P type metal-oxide-semiconductor PM2 is connected with the biased section of operational amplifier; The grid of the 3rd P type metal-oxide-semiconductor PM3 is connected with the grid of the left end of quartz crystal oscillator, the 4th N-type metal-oxide-semiconductor NM4; The drain electrode of the 3rd P type metal-oxide-semiconductor PM3 is connected with the right-hand member of quartz crystal oscillator, the drain electrode of the 4th N-type metal-oxide-semiconductor NM4, delay cell left end; The source class of the 4th N-type metal-oxide-semiconductor NM4 is connected with the leakage level of the positive input of operational amplifier, the 3rd N-type metal-oxide-semiconductor NM3; The grid of the 3rd N-type metal-oxide-semiconductor NM3 is connected with the leakage level of the output of operational amplifier, the 4th P type metal-oxide-semiconductor PM4; The grid of the 4th P type metal-oxide-semiconductor PM4 is connected with the right-hand member of delay cell, the input of inverter, the control end of switch S 1; The output of inverter is connected with the control end of switch S 2;
Current source I hupper end, current source I lupper end, the source class of a P type metal-oxide-semiconductor PM1, the source class of the 2nd P type metal-oxide-semiconductor PM2, the source class of the 3rd P type metal-oxide-semiconductor PM3, the source class of the 4th P type metal-oxide-semiconductor PM4 be connected with power vd D;
The source class of the source class of the first N-type metal-oxide-semiconductor NM1, the source class of the second N-type metal-oxide-semiconductor NM2, the 3rd N-type metal-oxide-semiconductor NM3 is connected with ground GND.
As shown in Figure 2, described operational amplifier is Folded-cascode amplifier, and comprise 3 P type metal-oxide-semiconductors, 2 N-type metal-oxide-semiconductors, its circuit connecting mode is:
The grid of the first N-type metal-oxide-semiconductor NM1 is connected with the grid of the leakage level of the first N-type metal-oxide-semiconductor NM1, the second N-type metal-oxide-semiconductor NM2, the drain electrode of the 2nd P type metal-oxide-semiconductor PM2; The drain electrode of the second N-type metal-oxide-semiconductor NM2 and the drain electrode of the 3rd P type metal-oxide-semiconductor PM3, the output V of this operational amplifier oUTconnect; The grid of the 2nd P type metal-oxide-semiconductor PM2 is connected with the positive input VIP of operational amplifier; The grid of the 3rd P type metal-oxide-semiconductor PM3 is connected with the reverse input end VIN of operational amplifier; The source class of the 2nd P type metal-oxide-semiconductor PM2 is connected with the leakage level of the source class of the 3rd P type metal-oxide-semiconductor PM3, a P type metal-oxide-semiconductor PM1; The grid of the one P type metal-oxide-semiconductor PM1 is connected with bias voltage VBP;
The source electrode power vd D of the one P type metal-oxide-semiconductor MP1 connects;
The source electrode of the first N-type metal-oxide-semiconductor NM1, the source electrode ground GND of the second N-type metal-oxide-semiconductor NM2 connect.
What describe in above-described embodiment and specification just illustrates principle of the present utility model and most preferred embodiment; under the prerequisite not departing from the utility model spirit and scope; the utility model also has various changes and modifications, and these changes and improvements all fall within the scope of claimed the utility model.

Claims (2)

1. an extremely low power dissipation quartz crystal oscillator circuit, comprises 4 P type metal-oxide-semiconductors, 4 N-type metal-oxide-semiconductors, 1 inverter, 1 delay cell, 1 operational amplifier, 2 current sources, two switches, and 2 described current sources comprise maintenance current source (I h) and latching current source (I l), it is characterized in that, its circuit connecting mode is:
Maintain current source (I h) lower end is connected with the upper end of the first switch (S1); Latching current source (I l) lower end be connected with the upper end of second switch (S2); The drain electrode of the lower end of the first switch (S1) and the lower end of second switch (S2), the first N-type metal-oxide-semiconductor (NM1), the grid of the first N-type metal-oxide-semiconductor (NM1), the grid of the second N-type metal-oxide-semiconductor (NM2) are connected; The drain electrode of the drain electrode of the second N-type metal-oxide-semiconductor (NM2) and the reverse input end of operational amplifier, a P type metal-oxide-semiconductor (PM1), the grid of a P type metal-oxide-semiconductor (PM1), the grid of the 2nd P type metal-oxide-semiconductor (PM2) are connected; The drain electrode of the 2nd P type metal-oxide-semiconductor (PM2) is connected with the biased section of operational amplifier; The grid of the 3rd P type metal-oxide-semiconductor (PM3) is connected with the grid of the left end of quartz crystal oscillator, the 4th N-type metal-oxide-semiconductor (NM4); The drain electrode of the 3rd P type metal-oxide-semiconductor (PM3) is connected with the right-hand member of quartz crystal oscillator, the drain electrode of the 4th N-type metal-oxide-semiconductor (NM4), delay cell left end; The source class of the 4th N-type metal-oxide-semiconductor (NM4) is connected with the leakage level of the positive input of operational amplifier, the 3rd N-type metal-oxide-semiconductor (NM3); The grid of the 3rd N-type metal-oxide-semiconductor (NM3) is connected with the leakage level of the output of operational amplifier, the 4th P type metal-oxide-semiconductor (PM4); The grid of the 4th P type metal-oxide-semiconductor (PM4) is connected with the input of the right-hand member of delay cell, inverter, the control end of the first switch (S1); The output of inverter is connected with the control end of second switch (S2);
Maintain current source (I h) upper end, latching current source (I l) upper end, the source class of a P type metal-oxide-semiconductor (PM1), the source class of the 2nd P type metal-oxide-semiconductor (PM2), the source class of the 3rd P type metal-oxide-semiconductor (PM3), the source class of the 4th P type metal-oxide-semiconductor (PM4) be connected with power supply (VDD);
The source class of the source class of the first N-type metal-oxide-semiconductor (NM1), the source class of the second N-type metal-oxide-semiconductor (NM2), the 3rd N-type metal-oxide-semiconductor (NM3) is connected with ground (GND).
2. a kind of extremely low power dissipation quartz crystal oscillator circuit according to claim 1, is characterized in that: described operational amplifier is Folded-cascode amplifier, and comprise 3 P type metal-oxide-semiconductors, 2 N-type metal-oxide-semiconductors, its circuit connecting mode is:
The grid of the first N-type metal-oxide-semiconductor (NM1) is connected with the grid of the leakage level of the first N-type metal-oxide-semiconductor (NM1), the second N-type metal-oxide-semiconductor (NM2), the drain electrode of the 2nd P type metal-oxide-semiconductor (PM2); The drain electrode of the second N-type metal-oxide-semiconductor (NM2) and the drain electrode of the 3rd P type metal-oxide-semiconductor (PM3), the output (V of this operational amplifier oUT) connect; The grid of the 2nd P type metal-oxide-semiconductor (PM2) is connected with the positive input (VIP) of operational amplifier; The grid of the 3rd P type metal-oxide-semiconductor (PM3) is connected with the reverse input end (VIN) of operational amplifier; The source class of the 2nd P type metal-oxide-semiconductor (PM2) is connected with the leakage level of the source class of the 3rd P type metal-oxide-semiconductor (PM3), a P type metal-oxide-semiconductor (PM1); The grid of the one P type metal-oxide-semiconductor (PM1) is connected with bias voltage (VBP);
The source electrode power supply (VDD) of the one P type metal-oxide-semiconductor (MP1) connects;
The source electrode of the first N-type metal-oxide-semiconductor (NM1), source electrode ground (GND) of the second N-type metal-oxide-semiconductor (NM2) connect.
CN201520315978.7U 2015-05-18 2015-05-18 A kind of extremely low power dissipation quartz crystal oscillator circuit Active CN204517769U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201520315978.7U CN204517769U (en) 2015-05-18 2015-05-18 A kind of extremely low power dissipation quartz crystal oscillator circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201520315978.7U CN204517769U (en) 2015-05-18 2015-05-18 A kind of extremely low power dissipation quartz crystal oscillator circuit

Publications (1)

Publication Number Publication Date
CN204517769U true CN204517769U (en) 2015-07-29

Family

ID=53715697

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201520315978.7U Active CN204517769U (en) 2015-05-18 2015-05-18 A kind of extremely low power dissipation quartz crystal oscillator circuit

Country Status (1)

Country Link
CN (1) CN204517769U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107990992A (en) * 2017-11-27 2018-05-04 电子科技大学 Temperature sensors of high precision and precision adjusting method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107990992A (en) * 2017-11-27 2018-05-04 电子科技大学 Temperature sensors of high precision and precision adjusting method
CN107990992B (en) * 2017-11-27 2019-10-11 电子科技大学 Temperature sensors of high precision and precision adjusting method

Similar Documents

Publication Publication Date Title
CN101630173B (en) CMOS band-gap reference source circuit with low flash noise
CN102386848B (en) Annular voltage-controlled oscillator
CN102289243B (en) Complementary metal oxide semiconductor (CMOS) band gap reference source
CN100559688C (en) The undervoltage lockout circuit of band temperature-compensating
CN101227184B (en) High speed duty ratio correcting circuit
CN103401544B (en) For the drive circuit of charging management chip external high pressure NMOS pipe
CN202889288U (en) High-precision on-chip clock oscillator realized based on CMOS technology
CN103412509A (en) Low-power-consumption self-cutting-off circuit and level switching circuit thereof
CN101916128A (en) Method and corresponding circuit for improving output power supply rejection ratio of band-gap reference source
CN104836544A (en) Quartz crystal oscillating circuit with extreme-low power consumption
CN204517769U (en) A kind of extremely low power dissipation quartz crystal oscillator circuit
CN203492007U (en) High-precision ring oscillator and frequency calibration circuit thereof
CN201000586Y (en) CMOS reference source circuit
CN102904432B (en) Drive control circuit of synchronous switch power switching system
CN115664383B (en) Amplitude debugging method of current control oscillator ICO
CN109274334A (en) A kind of extremely low power dissipation quartz crystal oscillator circuit
CN105897230A (en) Gated power circuit and generation method of gated power supply
CN104993816A (en) Voltage doubling circuit
CN112859995B (en) Voltage reference circuit and adjusting method
CN105278322B (en) Analog electronic clock
CN102594343B (en) Numerically controlled oscillator with high tuning precision
CN204068867U (en) Low Drift Temperature low-power consumption 32.768KHz crystal oscillator
CN202748694U (en) Real-time clock circuit
CN106712469A (en) Gate drive circuit used for charge pump
CN108768362B (en) Pure enhancement type MOS tube static power consumption-free power-on reset circuit

Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
CP02 Change in the address of a patent holder

Address after: 510663 C2, building 182, science Road, Science Town, Guangzhou hi tech Industrial Development Zone, Guangdong 1003, China

Patentee after: GUANGZHOU REACH MICRO-ELECTRONICS TECHNOLOGY Co.,Ltd.

Address before: No. 3 international business incubator G 510663 area in Guangdong city of Guangzhou province Luogang District Science City Moon road 209

Patentee before: GUANGZHOU REACH MICRO-ELECTRONICS TECHNOLOGY Co.,Ltd.

CP02 Change in the address of a patent holder