CN204090267U - A kind of second etch double-sided PCB - Google Patents
A kind of second etch double-sided PCB Download PDFInfo
- Publication number
- CN204090267U CN204090267U CN201420595960.2U CN201420595960U CN204090267U CN 204090267 U CN204090267 U CN 204090267U CN 201420595960 U CN201420595960 U CN 201420595960U CN 204090267 U CN204090267 U CN 204090267U
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Abstract
The utility model discloses a kind of second etch double-sided PCB, comprise: GTL line layer, insulation PP layer and GBL line layer, it is characterized in that: described GBL line layer is made up of GBL layer within the circuit and GBL layer outside the circuit, described GTL line layer and GBL layer within the circuit are connected with insulation PP layer simultaneously, described GBL layer outside the circuit covers on GBL layer within the circuit, the size of described GBL layer outside the circuit is greater than the size of GBL layer within the circuit, and the line map of described GBL layer outside the circuit, GBL layer within the circuit and GTL line layer have passed through cam and compensates.Double-sided wiring board second etch of the present utility model can complete, and processing is simple, and cost is low, and production efficiency is high, with short production cycle.
Description
Technical field
The utility model relates to a kind of circuit board, is specifically related to a kind of second etch double-sided PCB.
Background technology
In current board production technique, there is the double-sided PCB of GTL line layer, GBL layer within the circuit and GBL layer outside the circuit, all adopt and make for three times, the circuit that completes successively makes, and the accumulated error of making is very large, product quality can not get management and control, its duty cycle is longer, and the cycle period of production is longer, and the production friendship phase can not get improving, cost drops into also very large simultaneously, can not meet customer requirement.In order to solve the problem, develop a kind of novel stacked wiring board and circuit making renewal technology, to improve the unfailing performance of pcb board part, yet reduce PCB cost of manufacture in a large number and the manufacture craft cycle of place short 30% simultaneously, improve the qualification rate of product and meet the demand of numerous clients.
Utility model content
The purpose of this utility model is the above problem overcoming prior art existence, a kind of second etch double-sided PCB is provided, improve the unfailing performance of pcb board part, the utility model is compensated by cam and the circuit manufacturing method that originally need carry out three etchings subtracts into twice by three times by new etch process, the minimizing that human resources drop into, simplify production procedure and task difficulty greatly, decrease product and cause the generation of defective products because repeatedly etching causes accumulated error to increase, a large amount of minimizing PCB cost of manufacture the manufacture craft cycle of place short 30%, the friendship phase requirement of client can be met better, remarkable in economical benefits.
For realizing above-mentioned technical purpose, reach above-mentioned technique effect, the utility model is achieved through the following technical solutions:
A kind of second etch double-sided PCB, comprise: GTL line layer, insulation PP layer and GBL line layer, it is characterized in that: described GBL line layer is made up of GBL layer within the circuit and GBL layer outside the circuit, described GTL line layer and GBL layer within the circuit are connected with insulation PP layer simultaneously, described GBL layer outside the circuit covers on GBL layer within the circuit, the size of described GBL layer outside the circuit is greater than the size of GBL layer within the circuit, and the line map of described GBL layer outside the circuit, GBL layer within the circuit and GTL line layer have passed through cam and compensates.
Further, the size of described GBL layer outside the circuit is compared with the large 0.05mm of the size of GBL layer within the circuit.
Further, the offset that described cam compensates is 0.05mm.
The beneficial effects of the utility model are:
It is that second etch completes that the utility model compensates road plate by cam, improves the unfailing performance of pcb board, improves production efficiency, reduce production cost, decrease product fraction defective, shorten the production cycle of product.
Accompanying drawing explanation
Fig. 1 is the utility model circuit board schematic diagram that circuit is shaping for the first time.
Fig. 2 is the utility model circuit board schematic diagram that circuit is shaping for the second time.
Fig. 3 is the utility model circuit board final structure schematic diagram.
Number in the figure illustrates: 1, GTL line layer, 2, insulation PP layer, 3, GBL layer within the circuit, 4, GBL layer outside the circuit.
Embodiment
Below with reference to the accompanying drawings and in conjunction with the embodiments, describe the utility model in detail.
With reference to shown in Fig. 3, a kind of second etch double-sided PCB, comprise: GTL line layer 1, insulation PP layer 2 and GBL line layer, it is characterized in that: described GBL line layer is made up of GBL layer within the circuit 3 and GBL layer outside the circuit 4, described GTL line layer 1 and GBL layer within the circuit 3 are connected with insulation PP layer 2 simultaneously, described GBL layer outside the circuit 4 covers on GBL layer within the circuit 3, the size of described GBL layer outside the circuit 4 is greater than the size of GBL layer within the circuit 3, and the line map of described GBL layer outside the circuit 4, GBL layer within the circuit 3 and GTL line layer 1 have passed through cam and compensates.
The size of described GBL layer outside the circuit 4 is compared with the large 0.05mm of the size of GBL layer within the circuit 3.The offset that described cam compensates is 0.05mm
With reference to shown in Fig. 1 ~ Fig. 3, cam compensation is done to the circuit drawing of GTL line layer 1 and GBL layer within the circuit 3, free size value is 0.05mm, then GTL line layer 1 and GBL layer within the circuit 3 circuit are developed, check the development quality of the circuit that develops, to checking that the GTL line layer 1 after OK and GBL layer within the circuit 3 carry out acid etching shaping (first time acid etching is shaping), completing first time circuit etching and shapingly rear etching reprocessing being carried out to PCB surface; Then second time compensates the line map of GBL layer outside the circuit 4 with cam, free size value is also 0.05mm, then GBL layer outside the circuit 4 is developed, check the development quality of the circuit that develops, acid etching shaping (second time acid etching is shaping) is carried out to the GBL layer outside the circuit 4 after checking OK, etching reprocessing is carried out to the surface of the shaping rear circuit board of second time circuit etching; And adopt testing jig special testing circuit plate, revise non-conducting and produce short circuit problem point; Circuit board is made finished product, enters non-defective unit shipment later process.The foregoing is only preferred embodiment of the present utility model, be not limited to the utility model, for a person skilled in the art, the utility model can have various modifications and variations.All within spirit of the present utility model and principle, any amendment done, equivalent replacement, improvement etc., all should be included within protection range of the present utility model.
Claims (3)
1. a second etch double-sided PCB, comprise: GTL line layer, insulation PP layer and GBL line layer, it is characterized in that: described GBL line layer is made up of GBL layer within the circuit and GBL layer outside the circuit, described GTL line layer and GBL layer within the circuit are connected with insulation PP layer simultaneously, described GBL layer outside the circuit covers on GBL layer within the circuit, the size of described GBL layer outside the circuit is greater than the size of GBL layer within the circuit, and the line map of described GBL layer outside the circuit, GBL layer within the circuit and GTL line layer have passed through cam and compensates.
2. a kind of second etch double-sided PCB according to claim 1, is characterized in that: the size of described GBL layer outside the circuit is compared with the large 0.05mm of the size of GBL layer within the circuit.
3. a kind of second etch double-sided PCB according to claim 1, is characterized in that: the offset that described cam compensates is 0.05mm.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201420595960.2U CN204090267U (en) | 2014-10-15 | 2014-10-15 | A kind of second etch double-sided PCB |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201420595960.2U CN204090267U (en) | 2014-10-15 | 2014-10-15 | A kind of second etch double-sided PCB |
Publications (1)
Publication Number | Publication Date |
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CN204090267U true CN204090267U (en) | 2015-01-07 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN201420595960.2U Expired - Fee Related CN204090267U (en) | 2014-10-15 | 2014-10-15 | A kind of second etch double-sided PCB |
Country Status (1)
Country | Link |
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CN (1) | CN204090267U (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104851958A (en) * | 2015-05-28 | 2015-08-19 | 成都斯科泰科技有限公司 | Structure for raising highly reflective material LED light source luminous flux output |
TWI548314B (en) * | 2015-10-30 | 2016-09-01 | 環維電子(上海)有限公司 | Circuit board |
CN113613414A (en) * | 2021-09-30 | 2021-11-05 | 江门市和美精艺电子有限公司 | Packaging substrate of four-layer Nano SIM cards and manufacturing method thereof |
-
2014
- 2014-10-15 CN CN201420595960.2U patent/CN204090267U/en not_active Expired - Fee Related
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104851958A (en) * | 2015-05-28 | 2015-08-19 | 成都斯科泰科技有限公司 | Structure for raising highly reflective material LED light source luminous flux output |
TWI548314B (en) * | 2015-10-30 | 2016-09-01 | 環維電子(上海)有限公司 | Circuit board |
CN113613414A (en) * | 2021-09-30 | 2021-11-05 | 江门市和美精艺电子有限公司 | Packaging substrate of four-layer Nano SIM cards and manufacturing method thereof |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150107 Termination date: 20171015 |
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CF01 | Termination of patent right due to non-payment of annual fee |