CN203984393U - Push away-push controlled oscillator based on loop configuration two - Google Patents
Push away-push controlled oscillator based on loop configuration two Download PDFInfo
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- CN203984393U CN203984393U CN201420440989.3U CN201420440989U CN203984393U CN 203984393 U CN203984393 U CN 203984393U CN 201420440989 U CN201420440989 U CN 201420440989U CN 203984393 U CN203984393 U CN 203984393U
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Abstract
The utility model discloses and a kind ofly push away-push controlled oscillator based on loop configuration two.Utilize the phase relation between output signal in the ring oscillator that level Four inverting amplifier forms, extract the four-time harmonic in each output signal in conjunction with harmonic wave selectors, again the wherein signal synthetic rear difference output that forms of power between two of homophase, what build difference output twoly pushes away-pushes controlled oscillator, this structure is in the limited situation of technique, can effectively improve frequency and the power of difference local oscillator output signal, for millimeter wave, submillimeter wave, particularly Terahertz frequency range receiving and transmitting front end provide high-quality difference local oscillation signal.
Description
Technical field
The utility model belongs to microelectronics technical field, relates to a kind ofly pushing away-push controlled oscillator based on loop configuration two.
Background technology
Terahertz (TeraHertz, THz) ripple refers to the electromagnetic wave of frequency in 0.1～10THz (wavelength 0.03-3mm) scope, its wave band, between microwave and far red light, is last spectral window requiring study in electromagnetic spectrum.THz wave combines the plurality of advantages of microwave and infrared waves, there is a lot of special character, as transient state, broadband property, coherence and good penetrability etc., therefore Terahertz frequency range has great application prospect and unique advantage in fields such as medical imaging, high-speed radiocommunication, radar remote sensing detection, anti-terrorism drug law enforcement.THz source is the bottleneck of realizing Terahertz application, is also the most urgent problem of fundamental sum in Terahertz research.THz source based on photonic propulsion and vacuum electronics has output wave length, radiant power advantages of higher, is applied in fields such as remote imaging and non-destruction high-penetration POP researchs; But bulky, the shortcoming such as energy consumption is high, output stability is poor that have equipment needed thereby, application is restricted.Along with the progress of semiconductor technology and the quick raising of device performance, Terahertz monolithic integrated circuit (TeraHertz Monolithic Integrated Circuits, TMIC) becomes the effective means that realizes high stable, tunable, miniaturization THz source.The III-IV compounds of group techniques such as relative GaAs, InP, silicon base CMOS technique has more the advantages such as cost is low, integrated level is high, low in energy consumption.Therefore, research is launched in silicon base CMOS terahertz signal source and there is important scientific meaning and wide application prospect.
?voltage controlled oscillator is the Key Circuit that realizes terahertz signal source, and the performance of voltage controlled oscillator is determining output frequency, power output and the power consumption etc. in terahertz signal source.Wherein, the terahertz signal source that CMOS technique is realized, due to the restriction of active device cut-off frequency, the output frequency of voltage controlled oscillator is limited, and the highest output frequency of the oscillator of realizing based on CMOS technique of having reported for work is at present less than 400GHz.In order to realize the output of higher frequency under given technique, can adopt the mode that pushes away-push away to extract the second harmonic component in oscillator output signal, as shown in Figure 1.In this structure, the active device in oscillator is operated in 1/2 place of output signal frequency, and therefore under identical process condition, the output frequency of oscillator can improve twice.The another kind of circuit that produces higher frequency oscillator signal pushes away-pushes controlled oscillator for two, as shown in Figure 2.This oscillator extracts the four-time harmonic component in oscillator output signal, and the active device in oscillator is operated in 1/4 place of output signal frequency, and therefore under identical process condition, the output frequency of oscillator can improve four times.But the shortcoming of above-mentioned pushing away-push controlled oscillator or two pushing away-push controlled oscillator is to export single-ended signal, and needing, the occasion of differential signal is inapplicable.On the other hand, puncture voltage, the substrate loss etc. that cmos device is lower also causes the power output in CMOS terahertz signal source lower.Concerning pushing away-push controlled oscillator, due to the second harmonic that output signal is oscillator signal, output signal power is very low; To two pushing away-push controlled oscillator, the power of its output signal is lower.
Summary of the invention
The purpose of this utility model is for the deficiencies in the prior art, proposes a kind ofly to push away-push controlled oscillator based on loop configuration two.Utilize the phase relation between output signal in the ring oscillator that level Four inverting amplifier forms, extract the four-time harmonic in each output signal in conjunction with harmonic wave selectors, again the signal of homophase wherein between two power form difference output after synthetic, what build difference output twoly pushes away-pushes controlled oscillator;
The utility model is a kind of to be pushed away-pushes controlled oscillator based on loop configuration two and comprise level Four delay cell and two harmonic wave selected cells, the first output of first order delay cell connects the in-phase input end of second level delay cell, and the second output of first order delay cell connects the inverting input of second level delay cell; The first output of second level delay cell connects the in-phase input end of third level delay cell, and the second output of second level delay cell connects the inverting input of third level delay cell; The first output of third level delay cell connects the in-phase input end of fourth stage delay cell, and the second output of third level delay cell connects the inverting input of fourth stage delay cell; The first output of fourth stage delay cell connects the inverting input of first order delay cell, and the second output of fourth stage delay cell connects the in-phase input end of first order delay cell; The external voltage control end of the external voltage control end of first order delay cell, the external voltage control end of second level delay cell, third level delay cell, the external voltage control end of fourth stage delay cell connect, as two pushing away-the push voltage controling end of controlled oscillator; The 3rd output of first order delay cell connects the first input end of first harmonic selected cell; The 3rd output of second level delay cell connects the second input of second harmonic selected cell; The 3rd output of third level delay cell connects the second input of first harmonic selected cell; The 3rd output of fourth stage delay cell connects the first input end of second harmonic selected cell.The 3rd input of first harmonic selected cell, the 3rd input termination power vd D of second harmonic selected cell.
Every grade of delay cell comprises four NMOS pipe, two varactors and two inductance.The drain electrode of the grid of the one NMOS pipe, the drain electrode of the 2nd NMOS pipe, the 4th NMOS pipe, one end of the second varactor are connected with one end of the second inductance, as the second output of delay cell; The drain electrode of the grid of the 2nd NMOS pipe, the drain electrode of a NMOS pipe, the 3rd NMOS pipe, one end of the first varactor are connected with one end of the first inductance, as the first output of delay cell; The grid of the 3rd NMOS pipe connects the in-phase input end of delay cell; The grid of the 4th NMOS pipe connects the inverting input of delay cell; The other end of the first inductance is connected with the other end of the second inductance, the most the 3rd output of delay cell; The other end of the first varactor is connected with the other end of the second varactor, as the external voltage control end of delay cell;
Each harmonic wave selected cell comprises three sections of transmission lines, and one end of the first transmission line is as the first input end of harmonic wave selected cell; One end of the second transmission line is as the second input of harmonic wave selected cell; One end of the 3rd transmission line is as the 3rd input of harmonic wave selected cell; The other end of the first transmission line, the other end of the second transmission line are connected with the other end of the 3rd transmission line, as the output of harmonic wave selected cell;
1/4 of the oscillator signal four-time harmonic frequency place wavelength that the length of described the first transmission line, the second transmission line and the 3rd transmission line is level Four loop that delay cell forms.
The utility model improves on the basis of output signal frequency at output four-time harmonic, has realized the increase of output signal power and the output form of difference.
Brief description of the drawings
Fig. 1 is that a kind of Single-end output pushes away-push controlled oscillator structure;
Fig. 2 is that a kind of Single-end output pair pushes away-push controlled oscillator structure;
To be the utility model push away-push controlled oscillator structure based on loop configuration two to Fig. 3;
Fig. 4 is the structure of delay cell in Fig. 3;
Fig. 5 is the structure of harmonic wave selected cell in Fig. 3.
Embodiment
Below in conjunction with the drawings and specific embodiments, the utility model is further described.
As shown in Figure 3, the utility model is a kind of to be pushed away-pushes controlled oscillator based on loop configuration two and comprise level Four delay cell and two harmonic wave selected cells, the first output end vo ut+ of first order delay cell D1 connects the in-phase input end Vin+ of second level delay cell D2, and the second output end vo ut-of first order delay cell D1 connects the inverting input Vin-of second level delay cell D2; The first output end vo ut+ of second level delay cell D2 connects the in-phase input end Vin+ of third level delay cell D3, and the second output end vo ut-of second level delay cell D2 connects the inverting input Vin-of third level delay cell D3; The first output end vo ut+ of third level delay cell D3 connects the in-phase input end Vin+ of fourth stage delay cell D4, and the second output end vo ut-of third level delay cell D3 connects the inverting input Vin-of fourth stage delay cell D4; The first output end vo ut+ of fourth stage delay cell D4 connects the inverting input Vin-of first order delay cell D1, and the second output end vo ut-of fourth stage delay cell D4 connects the in-phase input end Vin+ of first order delay cell D1; The external voltage control end Vtune of the external voltage control end Vtune of first order delay cell D1, the external voltage control end Vtune of second level delay cell D2, third level delay cell D3, the external voltage control end Vtune of fourth stage delay cell D4 connect, as two pushing away-the push voltage controling end Vctrl of controlled oscillator; The 3rd output end vo ut of first order delay cell D1 connects the first input end Vin1 of first harmonic selected cell S1; The 3rd output end vo ut of second level delay cell D2 connects the second input Vin2 of second harmonic selected cell S2; The 3rd output end vo ut of third level delay cell D3 connects the second input Vin2 of first harmonic selected cell S1; The 3rd output end vo ut of fourth stage delay cell D4 connects the first input end Vin1 of second harmonic selected cell S2.The 3rd input VDC of first harmonic selected cell S1, the 3rd input VDC of second harmonic selected cell S2 meet power vd D.
As shown in Figure 4, every grade of delay cell comprises four NMOS pipe, two varactors and two inductance.The grid of the one NMOS pipe MN1, the drain electrode of the 2nd NMOS pipe MN2, the drain electrode of the 4th NMOS pipe MN4, one end of the second varactor Cvar1 are connected with one end of the second inductance L 2, as the second output end vo ut-of delay cell; The grid of the 2nd NMOS pipe MN2, the drain electrode of a NMOS pipe MN1, the drain electrode of the 3rd NMOS pipe MN3, one end of the first varactor Cvar1 are connected with one end of the first inductance L 1, as the first output end vo ut+ of delay cell; The grid of the 3rd NMOS pipe MN3 meets the in-phase input end Vin+ of delay cell; The grid of the 4th NMOS pipe MN4 meets the inverting input Vin-of delay cell; The other end of the first inductance L 1 is connected with the other end of the second inductance L 2, the most the 3rd output VDC of delay cell; The other end of the first varactor Cvar1 is connected with the other end of the second varactor Cvar2, as the external voltage control end Vtune of delay cell;
As shown in Figure 5, each harmonic wave selected cell comprises three sections of transmission lines, and one end of the first transmission line T1 is as the first input end Vin1 of harmonic wave selected cell; One end of the second transmission line T2 is as the second input Vin2 of harmonic wave selected cell; One end of the 3rd transmission line T3 is as the 3rd input VDC of harmonic wave selected cell; The other end of the first transmission line T1, the other end of the second transmission line T2 are connected with the other end of the 3rd transmission line T3, as the output end vo ut of harmonic wave selected cell;
In the utility model, the first inductance L 1, the second inductance L 2, the first varactor Cvar1, the second varactor Cvar2, a NMOS pipe MN1 and the 2nd NMOS pipe MN2 in delay cell form a capacitor and inductor type voltage controlled oscillator; The 3rd NMOS pipe MN3, the 4th NMOS pipe MN4 be as the input of delay cell, realizes interconnected to form loop between each delay cell;
In the utility model, the phase of output signal of the each delay cell of loop structure as shown in Figure 3.According to the feature of loop, the phase difference between delay cell output signal and input signal is 180
o+ 45
o, the phase place of each delay cell output signal is (N-1) x (180
o+ 45
o), the progression that wherein N is delay cell.Again according to the phase relation between four-time harmonic component and fundametal compoment in delay cell output signal, the phase place that can obtain four-time harmonic component in the output signal of each delay cell the 3rd output port is (N-1) x180
o, the progression that wherein N is delay cell.Like this, in the 3rd output port signal of the first delay cell four-time harmonic component, the 3rd delay cell the 3rd output port signal in four-time harmonic component phase identical (phase place is 0
o); In the 3rd output port signal of the second delay cell four-time harmonic component, the 4th delay cell the 3rd output port signal in four-time harmonic component phase identical (phase place is 180
o).
In the utility model, the length of the first transmission line T1 of harmonic wave selected cell, the second transmission line T2 and the 3rd transmission line T3 is 4f
01/4 of frequency place signal wavelength, wherein f
0for the concussion frequency by the first delay cell D1, the second delay cell D2, the 3rd delay cell D3 and the 4th delay cell loop that D4 forms; The total length of T1/T3 and the total length of T2/T3 are 4f
01/2 of frequency place signal wavelength, the impedance that four-time harmonic signal is seen from input to ground is zero, is conducive to effective input of four-time harmonic; Because four-time harmonic component in two-way input signal Vin1 and Vin2 is in-phase signal, the stack of two-way in-phase signal amplitude is exported from Vout; Meanwhile, the length of T3 is 4f
01/4 of frequency place signal wavelength, the impedance that four-time harmonic is seen to ground from three transmission lines common ports, for infinitely great, is conducive to effective output of four-time harmonic; This harmonic wave selected cell is realized the extraction of four-time harmonic component in four-time harmonic component in the first input signal Vin1, the second input signal Vin2 and synthesizing of above-mentioned two-way four-time harmonic signal power.Due to the phase relation of input signal in loop configuration, the phase of output signal of two harmonic wave selected cell S1, S2 is contrary; Therefore, the utility model improves on the basis of output signal frequency at output four-time harmonic, has realized the increase of output signal power and the output form of difference.
Although content of the present utility model has been done detailed introduction by above preferred embodiment, will be appreciated that above-mentioned description should not be considered to restriction of the present utility model.Having read after foregoing those skilled in the art, will be all apparent for multiple amendment of the present utility model and replacement.Therefore, protection range of the present utility model should be limited to the appended claims.
Claims (4)
1. push away-push controlled oscillator based on loop configuration two, it is characterized in that: comprise level Four delay cell and two harmonic wave selected cells, the first output of first order delay cell connects the in-phase input end of second level delay cell, and the second output of first order delay cell connects the inverting input of second level delay cell; The first output of second level delay cell connects the in-phase input end of third level delay cell, and the second output of second level delay cell connects the inverting input of third level delay cell; The first output of third level delay cell connects the in-phase input end of fourth stage delay cell, and the second output of third level delay cell connects the inverting input of fourth stage delay cell; The first output of fourth stage delay cell connects the inverting input of first order delay cell, and the second output of fourth stage delay cell connects the in-phase input end of first order delay cell; The external voltage control end of the external voltage control end of first order delay cell, the external voltage control end of second level delay cell, third level delay cell, the external voltage control end of fourth stage delay cell connect, as two pushing away-the push voltage controling end of controlled oscillator; The 3rd output of first order delay cell connects the first input end of first harmonic selected cell; The 3rd output of second level delay cell connects the second input of second harmonic selected cell; The 3rd output of third level delay cell connects the second input of first harmonic selected cell; The 3rd output of fourth stage delay cell connects the first input end of second harmonic selected cell; The 3rd input of first harmonic selected cell, the 3rd input termination power vd D of second harmonic selected cell.
2. according to claim 1ly push away-push controlled oscillator based on the two of loop configuration, it is characterized in that: each delay cell comprises four NMOS pipe, two varactors and two inductance; The drain electrode of the grid of the one NMOS pipe, the drain electrode of the 2nd NMOS pipe, the 4th NMOS pipe, one end of the second varactor are connected with one end of the second inductance, as the second output of delay cell; The drain electrode of the grid of the 2nd NMOS pipe, the drain electrode of a NMOS pipe, the 3rd NMOS pipe, one end of the first varactor are connected with one end of the first inductance, as the first output of delay cell; The grid of the 3rd NMOS pipe connects the in-phase input end of delay cell; The grid of the 4th NMOS pipe connects the inverting input of delay cell; The other end of the first inductance is connected with the other end of the second inductance, the most the 3rd output of delay cell; The other end of the first varactor is connected with the other end of the second varactor, as the external voltage control end of delay cell.
3. according to claim 1ly push away-push controlled oscillator based on the two of loop configuration, it is characterized in that: described harmonic wave selected cell comprises three sections of transmission lines, and one end of the first transmission line is as the first input end of harmonic wave selected cell; One end of the second transmission line is as the second input of harmonic wave selected cell; One end of the 3rd transmission line is as the 3rd input of harmonic wave selected cell; The other end of the first transmission line, the other end of the second transmission line are connected with the other end of the 3rd transmission line, as the output of harmonic wave selected cell.
4. according to claim 3ly push away-push controlled oscillator based on the two of loop configuration, it is characterized in that: 1/4 of the oscillator signal four-time harmonic frequency place wavelength that the length of described the first transmission line, the second transmission line and the 3rd transmission line is level Four loop that delay cell forms.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104184468A (en) * | 2014-08-06 | 2014-12-03 | 杭州电子科技大学 | Double-push-push voltage controlled oscillator based on annular structure |
| CN106953598A (en) * | 2017-03-16 | 2017-07-14 | 杭州电子科技大学 | A kind of orthogonal voltage-controlled vibrator circuit based on second harmonic Cross-injection locking technology |
| CN110708017A (en) * | 2019-09-25 | 2020-01-17 | 天津大学 | Novel Triple-push cross-coupled oscillator |
| CN112557761A (en) * | 2019-09-25 | 2021-03-26 | 天津大学 | High-resolution simple terahertz near-field imaging array unit |
-
2014
- 2014-08-06 CN CN201420440989.3U patent/CN203984393U/en not_active Expired - Fee Related
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104184468A (en) * | 2014-08-06 | 2014-12-03 | 杭州电子科技大学 | Double-push-push voltage controlled oscillator based on annular structure |
| CN104184468B (en) * | 2014-08-06 | 2017-10-31 | 杭州电子科技大学 | A kind of double pushing controlled oscillators based on loop configuration |
| CN106953598A (en) * | 2017-03-16 | 2017-07-14 | 杭州电子科技大学 | A kind of orthogonal voltage-controlled vibrator circuit based on second harmonic Cross-injection locking technology |
| CN106953598B (en) * | 2017-03-16 | 2023-07-07 | 杭州电子科技大学 | Quadrature voltage controlled oscillator circuit based on second harmonic cross injection locking technology |
| CN110708017A (en) * | 2019-09-25 | 2020-01-17 | 天津大学 | Novel Triple-push cross-coupled oscillator |
| CN112557761A (en) * | 2019-09-25 | 2021-03-26 | 天津大学 | High-resolution simple terahertz near-field imaging array unit |
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| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20141203 Termination date: 20180806 |