CN203930814U - A kind of CPU board card based on PCIE interface and configurable switch - Google Patents
A kind of CPU board card based on PCIE interface and configurable switch Download PDFInfo
- Publication number
- CN203930814U CN203930814U CN201420308871.5U CN201420308871U CN203930814U CN 203930814 U CN203930814 U CN 203930814U CN 201420308871 U CN201420308871 U CN 201420308871U CN 203930814 U CN203930814 U CN 203930814U
- Authority
- CN
- China
- Prior art keywords
- cpu
- board card
- interface
- storer
- cpu board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 230000015654 memory Effects 0.000 description 9
- 238000012360 testing method Methods 0.000 description 8
- 230000005540 biological transmission Effects 0.000 description 5
- 238000012545 processing Methods 0.000 description 3
- 238000004891 communication Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000008358 core component Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 230000037361 pathway Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 230000010181 polygamy Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000013519 translation Methods 0.000 description 1
Abstract
The utility model discloses a kind of CPU board card based on PCIE interface and configurable switch, belong to CPU board card, the technical problems to be solved in the utility model is: the CPU board card of prior art does not have the CPU board card of modular configurable switch.Technical scheme is: its structure comprises CPU, 2 PHY chips, Flash storer, RAM storer, jtag interface, RTC, EEPROM, power supply, clock chip, golden finger, CPU interconnects with 2 PHY chips, Flash storer, RAM storer, jtag interface, RTC, EEPROM, power supply, clock chip respectively, CPU is connected respectively to 2 PHY chips by MII, 2 PHY chips are connected to golden finger through Transformer, and CPU is connected to golden finger by PCIE bus and UART bus.
Description
Technical field
The utility model relates to a kind of CPU board card, specifically a kind of CPU board card based on PCIE interface and configurable switch.
Background technology
Central processing unit (CPU, English: Central Processing Unit), is one of major equipment of robot calculator, the core part in computer.Its function is mainly the data in interpretive machine instruction and process computer software.In computer, all operations is all responsible for reading command by CPU, to Instruction decoding and carry out the core component of instruction.
Switch (English: Switch means " switch ") is a kind of network equipment forwarding for electric signal.It can provide the pathway for electrical signals exclusively enjoying for any two network nodes of access switch.
PCIE is PCI-Express, is up-to-date bus and interface standard.Its main advantage is exactly that message transmission rate is high, and the highest 16X 2.0 versions can reach 10GB/s at present, and also have sizable development potentiality.
In computer realm, mainboard and sound card, video card etc. are collectively referred to as to board.The CPU board card of prior art does not have the CPU board card of modular configurable switch, uses quite inconvenient.
Utility model content
Technical assignment of the present utility model is for above weak point, a kind of standardization, modularization is provided and is easy to install a kind of CPU board card based on PCIE interface and configurable switch of switch.
The utility model solves the technical scheme that its technical matters adopts: a kind of CPU board card based on PCIE interface and configurable switch, comprise CPU, 2 PHY chips, Flash storer, RAM storer, jtag interface, RTC, EEPROM, power supply, clock chip, golden finger, CPU respectively with 2 PHY chips, Flash storer, RAM storer, jtag interface, RTC, EEPROM, power supply, clock chip interconnection, CPU is connected respectively to 2 PHY chips by MII, 2 PHY chips are connected to golden finger through Transformer, CPU is connected to golden finger by PCIE bus and UART bus.
CPU is connected respectively to 2 PHY chips by SGMII.
Flash storer is the Flash storer of 2 128M, all interconnects with CPU.
RAM storer is the RAM storer of 2 256M, all interconnects with CPU.
CPU is by I2C bus and RTC, EEPROM interconnection.
Noun is resolved:
The English full name of RTC is Real-Time Clock, and it is real-time timepiece chip that translation is come.RTC is the production burst of the clock circuit of crystal oscillator on CPU board card and interlock circuit composition,
EEPROM(Electrically Erasable Programmable ROM, Electrically Erasable Read Only Memory), be the modifiable ROM (read-only memory) of user (ROM), its can by higher than common voltage be used for wipe and reprogrammed.
I2C bus: English full name Inter-Integrated Circuit, is translated as IC bus, for connecting micro-CPU and peripheral chip thereof.
JTAG is also a kind of international standard test protocol (IEEE 1149.1 compatibilities), is mainly used in chip internal test.The jtag interface of standard is 4 lines: JTAG[1] TMS, TCK, TDI, TDO, be respectively model selection, clock, data input and DOL Data Output Line.Relevant JTAG pin is defined as: TCK is test clock input; TDI is test data input, and data are by TDI pin input jtag interface; TDO is test data output, and data are exported from jtag interface by TDO pin; TMS is that test pattern is selected, and TMS is used for arranging jtag interface in certain specific test pattern; TRST is test reset, input pin, Low level effective.
Flash storer is the one of storage chip, can revise the data of the inside by specific program.In FLASH electronics and semiconductor applications, often represent the meaning of Flash Memory, i.e. said " flash memory " at ordinary times, is named as Flash EEPROM Memory entirely.
RAM storer: English full name random access memory, i.e. random access memory.The content of storage unit can arbitrarily take out as required or deposit in, and the location-independent storer of the speed of access and storage unit.Sort memory will be lost its storage content in the time of power-off, therefore be mainly used in storing the program that the short time is used.
PHY chip (Physical Layer chip, i.e. physical chip): refer to the chip with external signal interface.Physical layer provides transmission medium and interconnect equipment for the data communication between equipment, for data transmission provides reliable environment.
Golden finger (connecting finger) is the link on memory bar and between memory bank, and all signals all transmit by golden finger.Golden finger is made up of numerous flavous conductive contact blades, because its surface gold-plating and conductive contact blade are arranged as finger-shaped, so be called " golden finger ".Golden finger is actually in copper-clad plate and is covered with layer of gold by special process again, because the inoxidizability of gold is extremely strong, and conduction is also very strong.
PCIE bus: be a kind of general bus specification, do not only include display interface, also included the multiple application interfaces such as CPU, PCI, HDD, Network.
UART bus: UART(Universal Asynchronous Receiver/Transmitter, universal asynchronous reception/transmission) as the one of asynchronous serial communication agreement, principle of work is one of each character of transmission data to be connect to one transmit.
The abbreviation of SGMII:Serial Gigabit Media Independent Interface, i.e. serial kilomegabit Media Independent Interface.
MII, or be called Media Independent Interface, it is the Ethernet industry standard of IEEE-802.3 definition.It comprises a data-interface, and management interface between MAC and PHY.Data-interface comprises two independent channels that are respectively used to transmitter and receiver.Every channel has data, clock and the control signal of oneself.MII data-interface needs 16 signals altogether.Management interface is a dual signal interface: one is clock signal, and another is data-signal.By management interface, upper strata can monitoring and controlling PHY.
Transformer: transformer.
Compared to the prior art a kind of CPU board card based on PCIE interface and configurable switch of the present utility model, has the following advantages:
1, two PHY chips of configuration can provide the network interface of 2 100M, are easy to install switch;
2, the Flash storer of 2 128M and the RAM storer of 2 256M, for system processing provides enough internal memories;
3, also comprise one group of PCIE bus and UART bus, provide more polygamy to put selection with this to user;
4, not only in cost and dirigibility, possess advantage, and can use at multiple platforms, reduce the Project-developing time.
Brief description of the drawings
Below in conjunction with accompanying drawing, the utility model is further illustrated.
Accompanying drawing 1 is that a kind of structure of the CPU board card based on PCIE interface and configurable switch connects block diagram.
Embodiment
Below in conjunction with the drawings and specific embodiments, the utility model is described in further detail.
Embodiment 1:
A kind of CPU board card based on PCIE interface and configurable switch of the present utility model, its structure comprises CPU, 2 PHY chips, Flash storer, RAM storer, jtag interface, RTC, EEPROM, power supply, clock chip, golden finger, CPU respectively with 2 PHY chips, Flash storer, RAM storer, jtag interface, RTC, EEPROM, power supply, clock chip interconnection, CPU is connected respectively to 2 PHY chips by MII, 2 PHY chips are connected to golden finger through Transformer, CPU is connected to golden finger by PCIE bus and UART bus.
Embodiment 2:
A kind of CPU board card based on PCIE interface and configurable switch of the present utility model, its structure comprises CPU, 2 PHY chips, Flash storer, RAM storer, jtag interface, RTC, EEPROM, power supply, clock chip, golden finger, CPU respectively with 2 PHY chips, Flash storer, RAM storer, jtag interface, RTC, EEPROM, power supply, clock chip interconnection, CPU is connected respectively to 2 PHY chips by MII, 2 PHY chips are connected to golden finger through Transformer, CPU is connected to golden finger by PCIE bus and UART bus.
CPU is connected respectively to 2 PHY chips by SGMII.
Flash storer is the Flash storer of 2 128M, all interconnects with CPU.
RAM storer is the RAM storer of 2 256M, all interconnects with CPU.
CPU is by I2C bus and RTC, EEPROM interconnection.
By embodiment above, described those skilled in the art can be easy to realize the utility model.But should be appreciated that the utility model is not limited to 2 kinds of above-mentioned embodiments.On the basis of disclosed embodiment, described those skilled in the art can the different technical characterictic of combination in any, thereby realizes different technical schemes.
Claims (5)
1. the CPU board card based on PCIE interface and configurable switch, it is characterized in that comprising CPU, 2 PHY chips, Flash storer, RAM storer, jtag interface, RTC, EEPROM, power supply, clock chip, golden finger, CPU interconnects with 2 PHY chips, Flash storer, RAM storer, jtag interface, RTC, EEPROM, power supply, clock chip respectively, CPU is connected respectively to 2 PHY chips by MII, 2 PHY chips are connected to golden finger through Transformer, and CPU is connected to golden finger by PCIE bus and UART bus.
2. a kind of CPU board card based on PCIE interface and configurable switch according to claim 1, is characterized in that CPU is connected respectively to 2 PHY chips by SGMII.
3. a kind of CPU board card based on PCIE interface and configurable switch according to claim 1, is characterized in that Flash storer is the Flash storer of 2 128M, all interconnects with CPU.
4. a kind of CPU board card based on PCIE interface and configurable switch according to claim 1, is characterized in that RAM storer is the RAM storer of 2 256M, all interconnects with CPU.
5. a kind of CPU board card based on PCIE interface and configurable switch according to claim 1, is characterized in that CPU passes through I2C bus and RTC, EEPROM interconnection.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420308871.5U CN203930814U (en) | 2014-06-11 | 2014-06-11 | A kind of CPU board card based on PCIE interface and configurable switch |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420308871.5U CN203930814U (en) | 2014-06-11 | 2014-06-11 | A kind of CPU board card based on PCIE interface and configurable switch |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203930814U true CN203930814U (en) | 2014-11-05 |
Family
ID=51826592
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420308871.5U Expired - Fee Related CN203930814U (en) | 2014-06-11 | 2014-06-11 | A kind of CPU board card based on PCIE interface and configurable switch |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203930814U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105512058A (en) * | 2015-11-27 | 2016-04-20 | 浪潮(北京)电子信息产业有限公司 | High-end storage PCIE interchanger and management module thereof |
| CN111142630A (en) * | 2019-12-02 | 2020-05-12 | 杭州迪普科技股份有限公司 | Processor board card |
-
2014
- 2014-06-11 CN CN201420308871.5U patent/CN203930814U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105512058A (en) * | 2015-11-27 | 2016-04-20 | 浪潮(北京)电子信息产业有限公司 | High-end storage PCIE interchanger and management module thereof |
| CN111142630A (en) * | 2019-12-02 | 2020-05-12 | 杭州迪普科技股份有限公司 | Processor board card |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103136138B (en) | Chip, chip debugging method and communication method for chip and external devices | |
| CN103248537B (en) | FC-AE-1553 based mixed avionics system tester | |
| CN206920978U (en) | A kind of high-speed type Signal transacting board analysis | |
| CN104021107A (en) | Design method for system supporting non-volatile memory express peripheral component interface express solid state disc (NVMe PCIE SSD) | |
| CN103559152A (en) | Device and method for CPU (central processing unit) to access local bus on basis of PCIE (peripheral component interface express) protocol | |
| CN102833002A (en) | Data transmission device and method supporting fibre channel protocol | |
| CN205450909U (en) | BMC based on FPGA realizes | |
| CN106970894A (en) | A kind of FPGA isomery accelerator cards based on Arria10 | |
| CN208044591U (en) | A kind of switching device and server that SATA and PCIE is shared | |
| CN208188815U (en) | BMC module system | |
| CN205692166U (en) | Core board based on PowerPC framework central processing unit | |
| CN203930814U (en) | A kind of CPU board card based on PCIE interface and configurable switch | |
| CN104484303A (en) | 1553B node circuit based on SoC (system on a chip) chip | |
| CN102880235B (en) | Single-board computer based on loongson 2F central processing unit (CPU) as well as reset management and using method of single-board computer | |
| CN102222056A (en) | Electronic equipment with embedded system | |
| CN203858630U (en) | Pcie interface switching device | |
| CN208141371U (en) | A kind of multi-functional UART debugging board | |
| CN203588122U (en) | Master controller based on OpenVPX standard | |
| CN111949464A (en) | CPU network interface adaptability test board card, test system and test method | |
| CN202406141U (en) | Fire wall | |
| CN108156099A (en) | Srio switching system | |
| CN203178870U (en) | Internet access switching card | |
| CN202617157U (en) | PCI express (PCIE) switched circuit | |
| CN202404483U (en) | Embedded network server equipment | |
| CN208000578U (en) | A kind of blade type data processing equipment |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20141105 Termination date: 20160611 |