CN203871311U - Security chip anti-attack structure - Google Patents

Security chip anti-attack structure Download PDF

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Publication number
CN203871311U
CN203871311U CN201420289731.8U CN201420289731U CN203871311U CN 203871311 U CN203871311 U CN 203871311U CN 201420289731 U CN201420289731 U CN 201420289731U CN 203871311 U CN203871311 U CN 203871311U
Authority
CN
China
Prior art keywords
cover plate
chip
resistance
protection structure
attack protection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CN201420289731.8U
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Chinese (zh)
Inventor
王冬冬
张洪柳
石易明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shandong Sinochip Semiconductors Co Ltd
Original Assignee
Shandong Sinochip Semiconductors Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shandong Sinochip Semiconductors Co Ltd filed Critical Shandong Sinochip Semiconductors Co Ltd
Priority to CN201420289731.8U priority Critical patent/CN203871311U/en
Application granted granted Critical
Publication of CN203871311U publication Critical patent/CN203871311U/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements

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  • Investigating Or Analyzing Materials By The Use Of Electric Means (AREA)
  • Vehicle Waterproofing, Decoration, And Sanitation Devices (AREA)

Abstract

The utility model discloses a security chip anti-attack structure. A cover plate with conductivity is covered on an active surface of a chip. A first detection point matching a resistor with the preset length is arranged on the preset length of at least the first direction of the cover plate. Output of the first detection point is connected with a first comparison circuit, and output of the first comparison circuit drives an execution circuit. A filling gap is reserved between the cover plate and the chip. Particularly, the cover plate is a rectangular cover plate, and the first direction is matched with one of diagonal lines of the rectangular cover plate and provided with a first resistor; further, a second direction is formed on the other diagonal line of the rectangular cover plate, a second resistor, a second detection point and a second comparator are matched, and output of the second comparator also drives the execution circuit. Anti-attack capability of the security chip can be enhanced by the security chip anti-attack structure.

Description

A kind of safety chip attack protection structure
Technical field
The utility model relates to a kind of safety chip attack protection structure.
Background technology
Safety chip greatly strengthens the fail safe of information, be widely used in information security field, yet the development along with technology, attack strategies for safety chip also emerges in an endless stream, thereby the attack strategies that need to face for safety chip and in the future issuable attack strategies are made research or beforehand research.
About safety chip; in early days; generally believe and adopt complicated identifying algorithm, key etc. to get final product protected data; even circuit structure is avoided undelegated use; such as IC(integrated circuit, integrated circuit) card, there is higher fail safe; yet to the mid-90 in last century, the chip on most IC-card can both successfully be implemented reverse engineering.
In some attack strategies, safety chip is carried out to physical level attack method, by certain mode, open the packaging body of chip, circuit structure is come out, then by carry out the image of taking pictures and the mating processing of circuit structure as high-power microscope, camera, circuit is carried out to destructing.
For above-mentioned attack strategies of dissecting by physics, after traditional die encapsulation, lack and prevent other people experiment of uncapping, thereby easily cause chip information leakage.
The measure that prevents of safety chip at present, to do circuit at chip internal, as can be at built-in chip type photosensitive detection circuit, voltage detecting circuit, the circuit unit such as temperature sensing circuit and frequency detection circuit is monitored the operational environment of chip, when suffering to dissect, chip re-powers or when operational environment is not ideal enough, produce the safe precaution measure of warning message or coupling, to prevent that assailant from analyzing, but the progress along with present science and technology, can take scanning, the means such as energy spectrometer, the in the situation that of can chip not being produced to damage after uncapping, grasp chip internal general arrangement.
Utility model content
For this reason, the utility model object is to provide a kind of method of safety chip attack protection structure and attack protection, so as to improving the anti-attack ability of safety chip.
According to an aspect of the present utility model, a kind of safety chip attack protection structure, is coated with the cover plate with conductivity in the active face of chip, and in cover plate at least the predetermined length on first direction be provided with the first test point of this predetermined length resistance of coupling;
Wherein, the first test point output is connected with the first comparison circuit, and the first comparison circuit output promotes executive circuit;
Cover plate and chip chamber leave fills gap.
Particularly, described cover plate is rectangle cover plate, and wherein first direction mates one of this rectangle cover plate diagonal, and has the first resistance;
And then also at another diagonal of this rectangle cover plate, be formed with second direction, and coupling has the second resistance, and coupling has the second test point and the second comparator, the second comparator also to export to promote described executive circuit.
Further, described the first comparison circuit, the second comparison circuit, and executive circuit is positioned at the inside of chip, and on chip, be provided with the pad for being connected with cover plate coupling.
Preferably, described pad is distributed in four jiaos of chip, to mate four jiaos of rectangle cover plate.
Preferably, at rectangle cover plate four jiaos, be respectively provided with a paster, correspondingly, be respectively formed with a conductive contact piece with this paster laminating below paster, each conductive contact piece is connected with the pad matched of respective corners.
Preferably, between pad and conductive contact piece, be connected to being connected by metallic bond zygonema.
Preferably, described cover plate is coated by packaging body.
Preferably, described the first comparison circuit is a comparator.
According to the utility model, adopt cover plate, to protect chip; uncap again while attacking, can cause the distortion of cover plate, and cause its resistance to change; carry out accordingly the collection of the signal intensity that produces because of resistance variations, thereby effectively prevent by the leakage of the caused chip information of uncapping.
Accompanying drawing explanation
Fig. 1 is the plan structure schematic diagram according to a kind of safety chip attack protection device of the present utility model.
Fig. 2 is the side structure schematic diagram after a kind of chip routing.
Fig. 3 is a kind of covering plate structure configuration schematic diagram.
Fig. 4 is a kind of testing circuit schematic diagram.
Fig. 5 is a kind of testing circuit schematic diagram.
In figure: 1. chip, 21-24. voltage acquisition weld pad, 31-34. conductive contact piece, 4. bonding line, 5. encapsulation datum level, 6. cover plate, 71-74. paster.
Embodiment
Chip 1 is generally plates, is generally rectangular configuration, and chip 1 will form pin or other syndetons with external linkage, the structure being connected with external equipment as represented in double dot dash line in Fig. 1.
Chip 1 will encapsulate, to obtain needed structural strength and to inner protection.
In some attack strategies, packaging body is uncapped, to expose the internal circuit of chip 1, then carry out the destructing of chip 1 internal circuit.
Loss for the produced chip data of effectively avoiding uncapping, according to preferred embodiment, referring to Figure of description 1-5, a safety chip attack protection structure, is coated with the cover plate 6 with conductivity in the active face of chip 1, and cover plate 6 has certain resistance, the metallic cover plate of general employing, as the sheet material of steel plate, aluminium sheet, copper coin or other metal materials, can also adopt other conductive material plate, as electric conducting materials such as graphite.
It is noted that plate does not represent that it has thicker thickness, cover plate 6 self also can be called cover plate, and its essence is to provide a kind of conductive sheet metal with certain resistance, by being out of shape the resistance variations producing, improves fail safe.
Accordingly, can, according to the reasonable material of deformation response is made, in addition, the response of varied in thickness also can be verified and be drawn by a small amount of experiment.
The resistance variations of cover plate 6 can be collected under powering state, the variation of resistance often shows as the variation of electric current or voltage, and the variation of these two amounts and the variation of resistance have direct relation, thereby, can utilize this matching, gather the variation of electric current or voltage.
Structure shown in Fig. 4 is the potentiometric detection that A is ordered, and the structure shown in Fig. 5 is the potentiometric detection that B is ordered.
Suppose that the two diagonal couplings for the cover plate of rectangle have the first resistance and the second resistance, Rc1 in Fig. 4 is the first resistance, Rc2 is the second resistance, the first resistance and the second resistance are respectively connected in series a resistance (R1 and R2), for the initial setting of A point voltage and B point voltage with when the first resistance or the second resistance change, A point voltage and B point voltage also can change.
Thereby, when configuration, as the first resistance is connected in series with resistance R 1, be used for setting A point current potential, and the second resistance is connected in series with R2 and is used for setting B point current potential, the first resistance is connected in series to the branch road forming with resistance R 1 and regards the unit of a predetermined length resistance as, be defined as resistance unit, also can assist more complicated configuration.
Some application persons, the first resistance and the second resistance also can be configured in a loop.
Further, in cover plate 6 at least the predetermined length on first direction be provided with the first test point of this predetermined length resistance of coupling, when resistance changes, can cause changing in this ohmically voltage drop, or the electric current by this resistance changes, thereby can carry out the collection of voltage or electric current.
Due to as the first resistance and the second resistance can be linked in other loops, therefore, resistance R 1 and resistance R 2 can not arrange separately.
Quantity about direction is selected, general no more than 4, during as 4, by producing a plurality of resistance variations, thereby better judgement is the distortion that damage type produces, or other distortion, and slight deformation is had to better detection effect, and distortion may not occur in the loop of a certain resistance unit, and therefore, more quantity and reasonable layout thereof contribute to the complete detection to cover plate 6.
In a preferred embodiment, described cover plate 6 is rectangle cover plate, and wherein first direction mates one of this rectangle cover plate diagonal, and has the first resistance;
And then also at another diagonal of this rectangle cover plate, be formed with second direction, and coupling has the second resistance, and coupling has the second test point and the second comparator, the second comparator also to export to promote described executive circuit, the first resistance and the second resistors match have the first test point and the second test point.
When temperature changes, resistance value also can change, if as shown in Figure 4 and Figure 5, the variation of external environment, is the same on the impact of the first resistance R c1 and the second resistance R c2, simultaneously, impact on resistance R 1 and resistance R 2 is also the same, and therefore A point current potential can not occur significantly to change so, only when cover plate 6 distortion, Resistance Influence to different directions is different, can cause A point current potential that different variation occurs.
Nature, the temperature coefficient of resistance may not be consistent, but for a person skilled in the art, it is selected, and must be to select the basically identical resistance of temperature coefficient.
As previously mentioned, in certain embodiments, can also select the first resistance R c1 and the second resistance R c2 to belong to a situation in loop, both can connect, and in node between the two as test point.
The design of this pair of resistance can effectively promote the sensitivity of detection, can effectively prevent that other people from avoiding detecting path when destroying as metal cover plate.
As shown in Figure 4, the variation of the first test point current potential, can adopt comparison circuit, for generation of needed as interruption, in order to drive executive circuit, thereby, the first test point output is connected with comparison circuit, and comparison circuit output promotes executive circuit, as shown in Figure 4, IC1 represents comparison circuit, export a Vflag, this signal is output as flag bit signal, or is directly converted to as chip 1 external interrupt signal, thereby drives relevant executive circuit action.
Executive circuit comparative maturity in various safety chips, as coupling has relevant interrupt handling routine, for making, chip is out of service, self-locking or self-destruction.
In addition, as shown in Figure 1, some encapsulating structure needs routing, the radian that routing need to define and need to occupy certain thickness, obviously cover plate 6 can not with as beating gold thread short circuit, thereby need to there is certain isolation distance, for this reason, 1 of cover plate 6 and chip leave fills gap, produces on the one hand needed isolation distance, and one side encapsulating compound when encapsulation can be filled into, increase whole structural strength.
In addition, as metallic plate, strength ratio is higher, can improve the structural strength of packaging body integral body.
Described comparison circuit and executive circuit are positioned at the inside of chip, and on chip, be provided with for mating the pad (pad) being connected, as shown in Figure 1 voltage acquisition weld pad 21, voltage acquisition weld pad 22, voltage acquisition weld pad 23 and voltage acquisition weld pad 24 with cover plate.
Referring to accompanying drawing 1 and accompanying drawing 3, described pad is distributed in four jiaos of chip, to mate four jiaos of rectangle cover plate, with this, reduces the length of bonding line, the length of bonding line 4 as shown in FIG..
Further, four jiaos at rectangle cover plate are respectively provided with a paster 71-74, correspondingly, below paster 71-74, be respectively formed with a conductive contact piece 31-34 who fits with this paster, each conductive contact piece 31-34 is connected with the pad matched of respective corners, as shown in Figure 1, structure forms reliable electrical connection successively.
In addition, paster 71-74 fitted and can reduce contact resistance with mating of conductive contact piece 31-34.
Relatively large in view of cover plate 6, in order to cover chip 1, conductive contact piece 31-34 is distributed in chip 1 around, thus weld pad by with conductive contact piece between be connected to being connected by metallic bond zygonema 4.
In Fig. 2; encapsulation datum level 5 represents the upper bottom surface of packaging body; in figure chips is encapsulated in, form protective effect, chip 1 is based on packaging technology routing; carry out after Bonding; increase cover plate 6, and make the paster 71-74 on cover plate 6 mate by conducting resinl and bond with conductive contact piece 31-34, the upper bottom surface of cover plate 6 in Fig. 2 can with encapsulate datum level coplanar; also can be slightly low, be packaging body institute integral coating.
After injecting plastic packaging glue, aforesaid filling gap carries out whole plastic packaging.
Comparison circuit, is called voltage comparator circuit conventionally, very ripe at present, for simplified structure, directly adopts comparator, and structure is very simple.
In the preceding article, related to the certain methods of attack protection, more specifically, a kind of safety chip anti-attack method, has the cover plate of conductivity apart from chip active face preset distance place covering one;
On at least first direction of selecting at cover plate, predetermined length arranges the first test point of this predetermined length resistance of coupling, and output first signal;
By the first test point output, connect the first comparison circuit, by the turn threshold of setting, at described resistance, change and while making exported first signal exceed described turn threshold, the first comparison circuit upset, and send a switching value;
By described switching value, drive executive circuit, and produce predetermined safeguard procedures.
Under normal circumstances, namely cover plate 6 does not have when destroyed, and A point current potential remains unchanged substantially, comparator IC1 is output voltage signal not, when cover plate 6 is destroyed, be usually expressed as reducing of corresponding resistor, A point or B point current potential are generally reduction, naturally in some embodiments, by different configurations, also can show as the raising of A point current potential, as A point is arranged on the following of RC1, A is ordered is connected in series a resistance (under perfect condition, this resistance is constant) below again.
When the first comparator output signal upset, export in other words a flag bit signal (Vflag), or be converted to an interrupt signal, drive executive circuit action.
About executive circuit, no longer deeply describe, such as carrying out self-locking or other measures of chip, can also carry out the damage of physics.
Further, described cover plate is rectangle cover plate, thereby, mate the diagonal of this cover plate, form described first direction and second direction, to having the first resistance and the second resistance;
Corresponding to the second resistance, be formed with the second test point, and output connection the second comparison circuit, the output signal of this second comparison circuit also drives described executive circuit.

Claims (8)

1. a safety chip attack protection structure, is characterized in that, in the active face of chip, is coated with the cover plate with conductivity, and in cover plate at least the predetermined length on first direction be provided with the first test point of this predetermined length resistance of coupling;
Wherein, the first test point output is connected with the first comparison circuit, and the first comparison circuit output promotes executive circuit;
Cover plate and chip chamber leave fills gap.
2. safety chip attack protection structure according to claim 1, is characterized in that, described cover plate is rectangle cover plate, and wherein first direction mates one of this rectangle cover plate diagonal, and has the first resistance;
And then also at another diagonal of this rectangle cover plate, be formed with second direction, and coupling has the second resistance, and coupling has the second test point and the second comparator, the second comparator also to export to promote described executive circuit.
3. safety chip attack protection structure according to claim 2, is characterized in that, described the first comparison circuit, the second comparison circuit, and executive circuit is positioned at the inside of chip, and on chip, be provided with the pad for being connected with cover plate coupling.
4. safety chip attack protection structure according to claim 3, is characterized in that, described pad is distributed in four jiaos of chip, to mate four jiaos of rectangle cover plate.
5. safety chip attack protection structure according to claim 4, it is characterized in that, at rectangle cover plate four jiaos, be respectively provided with a paster, correspondingly, below paster, be respectively formed with a conductive contact piece of fitting with this paster, each conductive contact piece is connected with the pad matched of respective corners.
6. safety chip attack protection structure according to claim 5, is characterized in that, between pad and conductive contact piece, is connected to being connected by metallic bond zygonema.
7. according to the arbitrary described safety chip attack protection structure of claim 1 to 6, it is characterized in that, described cover plate is coated by packaging body.
8. according to the arbitrary described safety chip attack protection structure of claim 1 to 6, it is characterized in that, described the first comparison circuit is a comparator.
CN201420289731.8U 2014-06-03 2014-06-03 Security chip anti-attack structure Expired - Lifetime CN203871311U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201420289731.8U CN203871311U (en) 2014-06-03 2014-06-03 Security chip anti-attack structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201420289731.8U CN203871311U (en) 2014-06-03 2014-06-03 Security chip anti-attack structure

Publications (1)

Publication Number Publication Date
CN203871311U true CN203871311U (en) 2014-10-08

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Country Status (1)

Country Link
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103985674A (en) * 2014-06-03 2014-08-13 山东华芯半导体有限公司 Anti-attack structure of security chip and anti-attack method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103985674A (en) * 2014-06-03 2014-08-13 山东华芯半导体有限公司 Anti-attack structure of security chip and anti-attack method
CN103985674B (en) * 2014-06-03 2017-02-15 山东华芯半导体有限公司 Anti-attack structure of security chip and anti-attack method

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