CN203859108U - 一种晶片座 - Google Patents
一种晶片座 Download PDFInfo
- Publication number
- CN203859108U CN203859108U CN201420290790.7U CN201420290790U CN203859108U CN 203859108 U CN203859108 U CN 203859108U CN 201420290790 U CN201420290790 U CN 201420290790U CN 203859108 U CN203859108 U CN 203859108U
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- China
- Prior art keywords
- wafer
- groove
- annular groove
- wafer holder
- wafer seat
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
- H01L2224/26152—Auxiliary members for layer connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
- H01L2224/26175—Flow barriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Abstract
本实用新型涉及一种晶片座,包括晶片座本体,所述晶片座本体的上表面开设有环形凹槽,所述晶片座本体的上表面在环形凹槽内还开设有凹槽,所述凹槽的端部分别与环形凹槽相连通。本实用新型可以在产品封装制程进行点胶时让银胶顺着环形凹槽与十字形凹槽的形状流动,减少了银胶的流失,并可以增强晶片座与晶片的结合度,提高固晶效果,可有效防止晶片脱落现象,在黏晶时,十字形凹槽与环形凹槽可作为黏晶的坐标点,可对黏晶位置有准确的定位点,提高作业效率及品质。
Description
技术领域
本实用新型涉及一种晶片座。
背景技术
一般情况下,晶片座与晶片的结合都是通过银胶铺设在晶片座上与晶片进行固定的,而一般的晶片座平面都为光滑平坦的,所以当把银胶铺设在晶片座上时银胶容易流失,造成浪费,并且晶片的固定效果也相对较差。
实用新型内容
本实用新型所要解决的技术问题是:提供一种不易造成银胶流失且固晶效果好的晶片座。
为解决上述问题,本实用新型采用的技术方案是:一种晶片座,包括晶片座本体,所述晶片座本体的上表面开设有环形凹槽,所述晶片座本体的上表面在环形凹槽内还开设有凹槽,所述凹槽的端部分别与环形凹槽相连通。
优选的,所述凹槽的端部分别与环形凹槽相连通。
优选的,所述环形凹槽开设在晶片座本体的中部。
优选的,所述凹槽的中心与环形凹槽的中心重合。
优选的,所述的凹槽为十字形凹槽。
本实用新型的有益效果是:本实用新型可以在产品封装制程进行点胶时让银胶顺着环形凹槽与十字形凹槽的形状流动,减少了银胶的流失,并可以增强晶片座与晶片的结合度,提高固晶效果,可有效防止晶片脱落现象,在黏晶时,十字形凹槽与环形凹槽可作为黏晶的坐标点,可对黏晶位置有准确的定位点,提高作业效率及品质。
附图说明
图1是本实用新型所述一种晶片座的俯视结构示意图;
图2是图1在主视方向上的剖视结构示意图;
图3是图2与晶片结合时的剖视结构示意图;
图中:1、晶片座本体,2、银胶,3、晶片,11、环形凹槽,12、凹槽。
具体实施方式
下面结合附图通过具体实施例对本实用新型作进一步描述。
如图1、图2所示,所述一种晶片座,包括晶片座本体1,所述晶片座本体1的上表面开设有环形凹槽11,所述晶片座本体1的上表面在环形凹槽11内还开设有凹槽12,所述凹槽12可以是十字形凹槽、米字型凹槽等,本实用新型开设的凹槽12为十字形凹槽,所述十字形凹槽的四端分别与环形凹槽11相连通,所述环形凹槽11开设在晶片座本体1的中部,以便在黏晶时对黏晶位置更容易定位,所述十字形凹槽的中心与环形凹槽的中心重合,以便使晶片3与晶片座本体1的固定效果更佳。
如图3所示,银胶2点胶时顺着十字形凹槽和环形凹槽11的形状流动,铺设在晶片座本体1上,然后晶片3再与银胶2粘结,最终使晶片3固定在晶片座本体1上。
本实用新型可以在产品封装制程进行点胶时让银胶顺着环形凹槽与十字形凹槽的形状流动,减少了银胶的流失,并可以增强晶片座与晶片的结合度,提高固晶效果,可有效防止晶片脱落现象,在黏晶时,十字形凹槽与环形凹槽可作为黏晶的坐标点,可对黏晶位置有准确的定位点,提高作业效率及品质。
Claims (5)
1.一种晶片座,包括晶片座本体,其特征在于:所述晶片座本体的上表面开设有环形凹槽,所述晶片座本体的上表面在环形凹槽内还开设有凹槽。
2.根据权利要求1所述的一种晶片座,其特征在于:所述凹槽的端部分别与环形凹槽相连通。
3.根据权利要求1所述的一种晶片座,其特征在于:所述环形凹槽开设在晶片座本体的中部。
4.根据权利要求1所述的一种晶片座,其特征在于:所述凹槽的中心与环形凹槽的中心重合。
5.根据权利要求1或2或4所述的一种晶片座,其特征在于:所述的凹槽为十字形凹槽。
Priority Applications (1)
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CN201420290790.7U CN203859108U (zh) | 2014-06-03 | 2014-06-03 | 一种晶片座 |
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CN201420290790.7U CN203859108U (zh) | 2014-06-03 | 2014-06-03 | 一种晶片座 |
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CN203859108U true CN203859108U (zh) | 2014-10-01 |
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CN201420290790.7U Expired - Fee Related CN203859108U (zh) | 2014-06-03 | 2014-06-03 | 一种晶片座 |
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CN (1) | CN203859108U (zh) |
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2014
- 2014-06-03 CN CN201420290790.7U patent/CN203859108U/zh not_active Expired - Fee Related
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20141001 Termination date: 20170603 |