CN203774766U - Power device protection circuit - Google Patents
Power device protection circuit Download PDFInfo
- Publication number
- CN203774766U CN203774766U CN201420088302.4U CN201420088302U CN203774766U CN 203774766 U CN203774766 U CN 203774766U CN 201420088302 U CN201420088302 U CN 201420088302U CN 203774766 U CN203774766 U CN 203774766U
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- Prior art keywords
- resistance
- triode
- utmost point
- resistor
- pole
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- 239000004065 semiconductor Substances 0.000 claims description 17
- 230000001681 protective effect Effects 0.000 claims description 11
- 229920006395 saturated elastomer Polymers 0.000 description 6
- 239000003990 capacitor Substances 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
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- Emergency Protection Circuit Devices (AREA)
Abstract
The utility model provides a power device protection circuit. The power device protection circuit comprises a first resistor, a plug-and-play (PNP) triode, an NPN triode, a second resistor and a third resistor, wherein one end of the first resistor is connected to an E pole of the PNP triode while the other end of the first resistor is connected to a B pole of the PNP triode, a C pole of the NPN triode and a G pole of a MOS tube; an E pole of the NPN triode is connected to the ground; a B pole of the NPN triode is connected with the C pole of the PNP triode and the second resistor; one end of the third resistor is connected to the ground while the other end of the third resistor is connected with an S pole of the MOS tube and one end of the second resistor. Every cycle protection in each PWM active level is realized, the response is very quick and timely, and security of power devices is adequately protected.
Description
Technical field
The utility model relates to electricity field, particularly a kind of power device protective circuit.
Background technology
In prior art; in the application of power device; protection to overload and load short circuits is very important; owing to lacking, protective circuit or protective circuit cause not in time often in the damage of some equipment; although some application-specific integrated circuit (ASIC) is integrated certain defencive function, often Protection parameters is single can not realize designer's intention easily.And there is no to use the scheme that possesses defencive function integrated circuit, power device, in the state of running nakedly, faces the damage under fortuitous event at any time.Even if having a mind to independent design protection circuit, often circuit relative complex, cost is also corresponding higher.
Utility model content
For above-mentioned technical problem, the utility model provides a kind of power device protective circuit, has solved the above-mentioned problem that possesses defencive function integrated circuit that do not have to use.
On the one hand, the utility model provides a kind of power device protective circuit, comprise: the first resistance, plug and play PNP triode, NPN triode, the second resistance and the 3rd resistance, wherein, one end of the first resistance is extremely connected with the E of PNP triode, and the other end of the first resistance is extremely connected with the B utmost point of PNP triode, the C utmost point and the metal-oxide-semiconductor G of NPN triode; The E utmost point ground connection of NPN triode, the NPN triode B utmost point is connected with the C utmost point and second resistance of PNP triode, the 3rd resistance one end ground connection, the 3rd resistance other end is connected with the metal-oxide-semiconductor S utmost point, second resistance one end.
The beneficial effects of the utility model: realized in each PWM significant level by week protection, and response is very fast in time, the safety of the power device that adequately protected.
Brief description of the drawings
Fig. 1 is the structural representation of a kind of power device protective circuit of the present utility model;
Fig. 2 is the structural representation of the power device protective circuit of a kind of application of the present utility model.
Embodiment
Below in conjunction with drawings and Examples, the utility model is described in further detail, is to be noted that described embodiment is only intended to be convenient to understanding of the present utility model, and it is not played to any restriction effect.
Below in conjunction with the drawings and specific embodiments, the utility model is described in further detail.
As shown in Figure 1; the utility model provides a kind of power device protective circuit; comprise: the first resistance R 1; PNP (Plug-and-Play, plug and play) triode Q1, NPN triode Q2; the second resistance R 2 and the 3rd resistance R 3; wherein, one end of the first resistance R 1 is extremely connected with the E of PNP triode Q1, and the other end of the first resistance R 1 is extremely connected with the B utmost point of PNP triode Q1, the C utmost point and the metal-oxide-semiconductor G of NPN triode Q2.The E utmost point ground connection of NPN triode Q2, the NPN triode B utmost point is connected with the C utmost point and the second resistance R 2 of PNP triode Q1, the 3rd resistance R 3 one end ground connection, the 3rd resistance R 3 other ends are connected with the metal-oxide-semiconductor S utmost point, resistance R 2 one end.
When pulse width modulation (PWM) driving signal is high level and passes through the first resistance R 1 as after extremely going up to metal-oxide-semiconductor G, metal-oxide-semiconductor starts conducting and electric current starts to increase, in the 3rd resistance R 3, pressure drop also synchronously increases, when pressure drop in the 3rd resistance R 3 is greater than after NPN triode Q2 conducting voltage, NPN triode Q2 starts conducting, the first resistance R 1 pressure drop starts to increase, when the first resistance R 1 pressure drop exceedes after PNP triode Q1 conducting voltage, PNP triode Q1 conducting, the result of PNP triode Q1 conducting is to make the B pole tension rising of NPN triode Q2 impel NPN triode Q2 conducting degree further to strengthen, and the increasing of NPN triode Q2 conducting degree impels the further increasing of PNP triode Q1 conducting degree, so the result of positive feedback is Q2, PNP triode Q1 has entered saturated self-locking state fast, due to NPN triode, Q2 is saturated, metal-oxide-semiconductor G pole tension is 0, metal-oxide-semiconductor enters off state, in the 3rd resistance R 3, pressure drop is 0, but raise NPN triode Q2 B pole tension because PNP triode Q1 is saturated, self-locking state still continues to maintain, metal-oxide-semiconductor is in continuing off state.Be low level when PWM drives signal, self-locking state is removed.
As shown in Figure 2; the utility model provides an a kind of object lesson of power device protective circuit; wherein, resistance R 1 one end is connected with R4 and D1 are anodal, and the other end is extremely connected with the C of the B utmost point, the B utmost point of PNP triode Q4 and the B utmost point of PNP triode Q1 and the NPN triode Q2 of NPN triode Q3.The D1 other end is connected with the C utmost point of NPN triode Q3, one end of capacitor C 1.The other end ground connection of capacitor C 1.One end of resistance R 5 is extremely connected with the E of NPN triode Q3.The other end of resistance R 5 is extremely connected with the E utmost point of PNP triode Q4, the G of metal-oxide-semiconductor Q5.The C utmost point ground connection of PNP triode Q4.The E utmost point ground connection of NPN triode Q2, the B utmost point is connected with the C utmost point, the resistance R 2 of PNP triode Q1.Resistance R 3 one end ground connection, the other end is connected with the S utmost point, resistance R 2 one end of metal-oxide-semiconductor Q5.
Be high level and be applied to by Q3 by R1 when PWM drives signal, the totem-pote circuit driven MOS pipe G of Q4 composition extremely after, metal-oxide-semiconductor starts conducting and electric current starts to increase, the upper pressure drop of R3 also synchronously increases, when the upper pressure drop of R3 is greater than after Q2 conducting voltage, Q2 starts conducting, R1 pressure drop starts to increase, when R1 pressure drop exceedes after Q1 conducting voltage, Q1 conducting, the result of Q1 conducting is to make Q2 B pole tension increase to impel Q2 conducting degree further to strengthen, and the increasing of Q2 conducting degree impels the further increasing of Q1 conducting degree, so the result of positive feedback is Q2, Q1 has entered saturated self-locking state fast, because Q2 is saturated, Q4 drags down metal-oxide-semiconductor G pole tension, metal-oxide-semiconductor enters off state, in resistance R 3, pressure drop is 0, but raise Q2 B pole tension because Q1 is saturated, self-locking state still continues to maintain, metal-oxide-semiconductor is in continuing off state.Be low level when PWM drives signal, self-locking state is removed.
Describing is above only a specific embodiment of the present utility model, and obviously anyone amendment of doing of this area or local replacement under the technical solution of the utility model instructs, all belong to the scope that the utility model claims limit.
Claims (1)
1. a power device protective circuit, it is characterized in that, comprise: the first resistance, plug and play PNP triode, NPN triode, the second resistance and the 3rd resistance, wherein, one end of described the first resistance is extremely connected with the E of described PNP triode, the B utmost point of the other end of described the first resistance and described PNP triode, the C utmost point and the metal-oxide-semiconductor G of described NPN triode are extremely connected, the E utmost point ground connection of described NPN triode, the described NPN triode B utmost point is connected with the C utmost point and described second resistance of described PNP triode, described the 3rd resistance one end ground connection, described the 3rd resistance other end is connected with the metal-oxide-semiconductor S utmost point and described second resistance one end.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201420088302.4U CN203774766U (en) | 2014-02-27 | 2014-02-27 | Power device protection circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201420088302.4U CN203774766U (en) | 2014-02-27 | 2014-02-27 | Power device protection circuit |
Publications (1)
Publication Number | Publication Date |
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CN203774766U true CN203774766U (en) | 2014-08-13 |
Family
ID=51291918
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN201420088302.4U Expired - Lifetime CN203774766U (en) | 2014-02-27 | 2014-02-27 | Power device protection circuit |
Country Status (1)
Country | Link |
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CN (1) | CN203774766U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106411127A (en) * | 2016-11-22 | 2017-02-15 | 郑州搜趣信息技术有限公司 | PWM modulation conversion circuit |
-
2014
- 2014-02-27 CN CN201420088302.4U patent/CN203774766U/en not_active Expired - Lifetime
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106411127A (en) * | 2016-11-22 | 2017-02-15 | 郑州搜趣信息技术有限公司 | PWM modulation conversion circuit |
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Legal Events
Date | Code | Title | Description |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20170303 Address after: 214000 Jiangsu province Wuxi Yanqiao Huishan Economic Development Zone, supporting the District Yan Cheung Road 37 Patentee after: WUXI HUAHUI JINZE ELECTRONIC TECHNOLOGY Ltd. Address before: 214000 Jiangsu city of Wuxi province Huishan Yanqiao Xiang weir Industrial Park Road No. 37 Patentee before: WUXI YUJIN ELECTRONIC TECHNOLOGY Co.,Ltd. |
|
CX01 | Expiry of patent term |
Granted publication date: 20140813 |
|
CX01 | Expiry of patent term |