CN203747768U

CN203747768U - High-resolution accuracy pulse triggering delay circuit with calibration function

Info

Publication number: CN203747768U
Application number: CN201420124556.7U
Authority: CN
Inventors: 刘先红; 宋岩; 陈志斌; 王伟明; 薛明晰; 张超; 肖文建
Original assignee: Ordnance Technology Research Institute of General Armament Department of Chinese PLA
Current assignee: Ordnance Technology Research Institute of General Armament Department of Chinese PLA
Priority date: 2014-03-19
Filing date: 2014-03-19
Publication date: 2014-07-30
Anticipated expiration: 2024-03-19

Abstract

The utility model relates to a high-resolution accuracy pulse triggering delay circuit with a calibration function. The high-resolution accuracy pulse triggering delay circuit comprises a time-to-digital converter circuit, a fine time-delay circuit, a coarse time-delay circuit, a multiplexer, a pulse generator and a calibration controller, wherein the calibration controller is connected with control ports of the time-to-digital converter circuit, the fine time-delay circuit, the time-coarse delay circuit, the multiplexer and the pulse generator respectively and is used for reading digital quantity value of the time-to-digital converter circuit, setting the delay time of the fine time-delay circuit and the coarse time-delay circuit, controlling the gating position of the multiplexer, and controlling the pulse generator to generate pulse signals.

Description

There is the high-resolution precision pulse-triggered delay circuit of calibration function

Technical field

The utility model relates to a kind of laser equipment Non-Destructive Testing circuit, specifically a kind of high-resolution precision pulse-triggered delay circuit with calibration function.

Background technology

Pulse laser range finder is a kind of photoelectric instrument that time between Laser emission pulse and the pulse of target reflection echo realizes distance measurement function that utilizes.For realizing the field of range finder using laser range performance, the detection of online, noncooperative target, generally adopt the mode of time simulation space length, realize by the simulated laser light source identical with range finder using laser emission wavelength and delay circuit.Its concrete principle is, when detecting instrument receives after range finding pulse, produces corresponding simulated range by the delay time of setting, and reaches after delay time, excites simulated laser light source transmitting echo impulse; If range finder using laser is display simulation distance correctly, illustrate that this range finder range performance is qualified.Therefore, high-precision delay circuit is to realize range finder using laser range performance to detect one of key factor.

At present, pulse-triggered delay circuit generally adopts CPLD (CPLD) or field programmable gate array (FPGA) counters design circuit to realize.Although CPLD delay precision is higher, because it drives clock lower, be difficult to produce the time delay that resolution is higher; The driving clock of FPGA is higher, can produce the time delay that resolution is higher, but its delay precision is subject to the impact of the factors such as interior layout wiring, clock jitter and variations in temperature.

Utility model content

The purpose of this utility model is just to provide a kind of high-resolution precision pulse-triggered delay circuit with calibration function, can not on high-resolution basis, reach the problem of split-second precision output to solve existing pulse-triggered delay circuit.

The utility model is achieved in that a kind of high-resolution precision pulse-triggered delay circuit with calibration function, m-quantizer circuit, fine tuning delay circuit, coarse adjustment delay circuit, MUX, pulse generator and controller calibration while comprising.

Described controller calibration respectively when described the control port of m-quantizer circuit, described fine tuning delay circuit, described coarse adjustment delay circuit, described MUX and described pulse generator be connected; The signal input port of described MUX is connected with start pulse signal input and described pulse generator signal output part respectively, and the signal output part of described MUX is connected with the pulse signal input terminal of described fine tuning delay circuit; The signal output part of described fine tuning delay circuit is connected with the pulse-triggered input of described coarse adjustment delay circuit; When described, m-quantizer circuit is connected with the pulse signal output end of described coarse adjustment delay circuit with the pulse signal input terminal of described fine tuning delay circuit respectively.

The digital quantity value of m-quantizer circuit when described controller calibration is described for reading, the delay time of described fine tuning delay circuit and described coarse adjustment delay circuit is set, control the strobe position of described MUX, control described pulse generator and produce pulse signal.

Described coarse adjustment delay circuit, described MUX and described controller calibration are co-located in field programmable gate array, provide driving clock by the High Precision Crystal Oscillator in field programmable gate array.

The utility model is a kind of able to programme, high-resolution, high accuracy, have the pulse-triggered delay circuit of calibration function, can make pulse-triggered time delay output time reach high accuracy on high-resolution basis, and can calibrate, meet thus the work requirements of the range performance analog detection of the pulse laser range finder that range accuracy is more and more higher.

Brief description of the drawings

Fig. 1 is circuit structure block diagram of the present utility model.

Embodiment

As shown in Figure 1, m-quantizer circuit 1, fine tuning delay circuit 2, coarse adjustment delay circuit 3, MUX 4, pulse generator 5 and controller calibration 6 when the utility model comprises.

Wherein, pulse generator 5 is made up of pulse generating circuit; Time m-quantizer circuit 1 can be when conventional m-digital quantizer integrated circuit and peripheral circuit thereof form; Fine tuning delay circuit 2 can be made up of time delay application-specific integrated circuit (ASIC) and the peripheral circuit thereof based on delay line of routine.

Coarse adjustment delay circuit 3, MUX 4 and controller calibration 6 are co-located in field programmable gate array (FPGA), provide high-precision driving clock by the High Precision Crystal Oscillator in field programmable gate array (FPGA).

Coarse adjustment delay circuit 3 is made up of universal counter circuit and the delay line measuring unit of FPGA inside; MUX 4 is made up of the MUX circuit of FPGA inside; Controller calibration 6 is made up of the microcontroller circuit of FPGA inside.

In Fig. 1, controller calibration 6 respectively with time m-quantizer circuit 1, fine tuning delay circuit 2, coarse adjustment delay circuit 3, MUX 4, pulse generator 5 control port be connected, the digital quantity value of m-quantizer circuit 1 when reading, the delay time of described fine tuning delay circuit 2 and coarse adjustment delay circuit 3 is set, the strobe position of controlling MUX 4, clamp-pulse generator 5 produces pulse signal.

The signal input port of MUX 4 is connected with described pulse generator 5 signal output parts with start pulse signal input respectively, and the signal output part of MUX 4 is connected with the pulse signal input terminal of described fine tuning delay circuit 2.The signal output part of fine tuning delay circuit 2 is connected with the pulse-triggered input of described coarse adjustment delay circuit 3.Time m-quantizer circuit 1 be connected with the pulse signal output end of coarse adjustment delay circuit 3 with the pulse signal input terminal of fine tuning delay circuit 2 respectively.

Delay line measuring unit in coarse adjustment delay circuit 3 accurately measure the counting trigger impulse of universal counter and counting clock first along between time interval t1; When the delay time of setting when controller calibration 6 is greater than the setting-up time of fine tuning delay circuit 2, by controller calibration 6, universal counter count cycle subduction t1 is worth by way of compensation, writes fine tuning delay circuit 2, the overflow value of universal counter is deducted to 1 simultaneously.

Delay time calibration steps of the present utility model is:

One, control described controller calibration 6 and described MUX 4 strobe pulses are set to trigger input signals be the trigger impulse that described pulse generator 5 sends, enter calibration mode;

Two, control described controller calibration 6 and write the delay time of described fine tuning delay circuit 2 and described coarse adjustment delay circuit 3;

Three, controlling described controller calibration 6 starts described pulse generator 5 and sends pulse signal;

Four, control described controller calibration 6 and read the delay time that m-quantizer circuit 1 measures when described, with the set delay time contrast of step b, obtain correction value.

Using method of the present utility model is:

One, according to above-mentioned delay time calibration steps, this pulse-triggered delay circuit is calibrated;

Two, control controller calibration 6 arrange MUX 4 strobe pulses trigger input signals be external trigger pulse, enter use pattern;

Three, control controller calibration 6 required delay time is write to fine tuning delay circuit 2 and coarse adjustment delay circuit 3, delay time error is revised; In the time that error is greater than the count cycle of coarse adjustment delay circuit 3, correction value writes respectively fine tuning delay circuit 2 and coarse adjustment delay circuit 3; In the time that error is less than the count cycle of coarse adjustment delay circuit 3, correction value only writes fine tuning delay circuit 2;

Four, wait for external trigger pulse signal.

Claims

1. a high-resolution precision pulse-triggered delay circuit with calibration function, is characterized in that, m-quantizer circuit, fine tuning delay circuit, coarse adjustment delay circuit, MUX, pulse generator and controller calibration while comprising;

Described controller calibration respectively when described the control port of m-quantizer circuit, described fine tuning delay circuit, described coarse adjustment delay circuit, described MUX and described pulse generator be connected; The signal input port of described MUX is connected with start pulse signal input and described pulse generator signal output part respectively, and the signal output part of described MUX is connected with the pulse signal input terminal of described fine tuning delay circuit; The signal output part of described fine tuning delay circuit is connected with the pulse-triggered input of described coarse adjustment delay circuit; When described, m-quantizer circuit is connected with the pulse signal output end of described coarse adjustment delay circuit with the pulse signal input terminal of described fine tuning delay circuit respectively;

2. the high-resolution precision pulse-triggered delay circuit with calibration function according to claim 1, it is characterized in that, described coarse adjustment delay circuit, described MUX and described controller calibration are co-located in field programmable gate array, provide driving clock by the High Precision Crystal Oscillator in field programmable gate array.