CN101727068A - Time interval digitally quantized event counter - Google Patents

Time interval digitally quantized event counter Download PDF

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Publication number
CN101727068A
CN101727068A CN200910273221A CN200910273221A CN101727068A CN 101727068 A CN101727068 A CN 101727068A CN 200910273221 A CN200910273221 A CN 200910273221A CN 200910273221 A CN200910273221 A CN 200910273221A CN 101727068 A CN101727068 A CN 101727068A
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CN
China
Prior art keywords
time interval
time
event counter
counter
circuit
Prior art date
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Pending
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CN200910273221A
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Chinese (zh)
Inventor
郭唐永
王培源
邹彤
李欣
朱威
夏界宁
谭业春
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Institute of Earthquake of China Earthquake Administration
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Institute of Earthquake of China Earthquake Administration
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Application filed by Institute of Earthquake of China Earthquake Administration filed Critical Institute of Earthquake of China Earthquake Administration
Priority to CN200910273221A priority Critical patent/CN101727068A/en
Publication of CN101727068A publication Critical patent/CN101727068A/en
Pending legal-status Critical Current

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Abstract

The invention relates to a time interval digitally quantized event counter applied to high repetition frequency satellite laser ranging. The time interval digitally quantized event counter belongs to equipment which is capable of measuring a moment when an event occurs, and is established by using a digitized time interval measuring chip, a high-speed comparator input circuit, a high-speed digital counter circuit, a high-speed digital interface circuit and an accurate pulse generator circuit. The event counter can be widely applied in fields of satellite laser ranging, space debris determination, accurate time event, time interval measurement and the like.

Description

The event counter of time interval digital quantization
Technical field
The present invention relates to a kind of event counter that is applied to the time interval digital quantization of high repetition frequency satellite laser ranging (SLR).
Specifically, by Applied Digital time interval measurement chip, high-speed comparator input circuit, high-speed numerical counter circuit, high speed digital interface circuit and pulse generator circuit accurately, equipment constantly can measurement event take place in structure; Can be widely used in satellite laser ranging (SLR), space junk mensuration, the time-event of precision and the fields such as measurement in the time interval.
Background technology
In order to measure ground to the distance between the satellite, by the sampled measurements laser pulse on ground to the two-way time of flying between the satellite method at interval finish.The interval of being surveyed multiply by the light velocity half be exactly on the ground this point to this distance constantly of satellite.For the satellite of different distance, this time interval generally arrives between the hundreds of millisecond at several milliseconds; If will measure the distance of the moon, this reaches several seconds at interval.Because extraterrestrial target (satellite etc.) is in constant motion, measurement must be carried out continuously.Traditional method is the interval time of coming recording laser flight with the sampling time interval counter, must measure finish a distance after, just can carry out the measurement of next distance.That is to say that if measure the moon, the fastest duplicate measurements speed also can only be surveyed once several seconds,, be approximately about 5 measurements of per second general satellite.Along with the raising of technical merit, the emission rate of laser pulse has reached per second several thousand times, and this time interval measurement mode can not meet the demands, must use the event mode counter to finish the measurement of this high repetition frequency.At present, carry out counter many service time of the interval counter similar techniques of this measurement, come the measurement by magnification time scale with the method for mimic channel.Therefore it all needs deal with data could export the result behind each affair, has certain hour to postpone, and is difficult to further improve survey frequency.In addition, measuring accuracy also is a very important index, along with further going deep into of scientific research, the millimeter level has been arrived in the accuracy requirement of measuring, corresponding time measurement resolution requirement reaches psec (ps) level, and this also is that present analogue technique is unapproachable.
Summary of the invention
Purpose of the present invention just is to overcome the above-mentioned shortcoming and defect that prior art exists, and high resolving power, High Data Rate, high incident repetition rate and the high-accuracy pulse of the two autonomous channels counter towards events incidence is provided; Use complete digital technology with its miniaturization and integrated, satisfy the requirement of the satellite laser ranging (SLR) of KHz repetition frequency, also can be applied in high frequency split-second precision logout occasions such as atomic spectral line measurement.
The function of event counter just provides the moment value that each trigger event takes place, and principle has a system time by the stable operation of 100MHz clock reference signal generation as shown in Figure 1 in the system.As at 02:30:00~02:30:01 2 incident E have taken place during this period of time 1And E 2, will amplify during this period of time.For incident E 1, because we have known the moment value of each 100MHz reference signal rising edge, i.e. t M+2The moment known, one section obtains Δ T by certain mode so 1, then the moment value of incident E1 can be expressed as:
E 1=t M+2-ΔT 1
And the like incident E 2Moment value can be expressed as:
E 2=t M+n+2-ΔTn
The event counter composition frame chart of the present invention's design as shown in Figure 2.After the incident input, through comparator circuit 1 at a high speed, the signal that produces with passing threshold and polarity regulon 7 in advance relatively produces trigger pip.This signal is divided into two-way then, and one the tunnel delivers to decimal pulse generation unit 5, in the time interval by time-digital quantizer 8 measuring-signals and 100MHz clock; Other one the tunnel delivers to the integer multiples time value that clock (number of cycles counter) 6 obtains clock.Whole process is subjected to embedded type CPU processor 4 control, and with above aggregation of data after data-interface 10 outputs.Wherein 10MHz precision interval clock source 10 produces the system-timing reference source after process 100MHz phase locked-loop unit 3 frequencys multiplication.Programmable signal generator 9 also is provided simultaneously, produces incident at random, be used for the test of system.
The present invention has following characteristics:
1. the event pulse input can guarantee that waveform is complete by this circuit through the high-speed comparator shaping, selects polarity, threshold value, the impedance of input signal.
2. two autonomous channels metering system
3. possess stability and accuracy that accurate clock source guarantees the counter system frequency.
4. all are provided with, control and all move under the software operation of embedded type CPU.
5. possess the random occurrence generating means, use for system testing.
Description of drawings
The event counter fundamental diagram of Fig. 1-time interval digital quantization;
Fig. 2-composition frame chart of the present invention;
Wherein: 1-high-speed comparator input circuit
2-10MHz precision interval clock source
The phase-locked output of 3-100MHz
4-embedded type CPU controller
5-decimal pulse-generating circuit
6-integer clock log circuit
The 7-incoming level is threshold values, triggering edge comparator circuit relatively
8-time figure converting unit
9-programmable event pulse producer (being used for test macro)
The 10-data output interface circuit
Embodiment
Below in conjunction with accompanying drawing 2 explanation the specific embodiment of the present invention.
1. the high-speed comparator input circuit is realized by special-purpose comparator circuit chip.
2.10MHz the precision interval clock source adopts voltage-controlled constant temperature precision oscillator or rubidium atomic clock to realize.
3. the embedded type CPU controller adopts the embedded soft nucleus CPU of field programmable logic array (FPLA) (FPGA) to realize.
4. decimal pulse-generating circuit, integer pulse recording circuit, programmable event pulse producer, data output interface circuit are realized based on field programmable logic array (FPLA) (FPGA) circuit of VHDL language.
5. the time figure converting unit adopts time figure conversion chip TDC (TimeDigitalConverter) chip to realize.

Claims (4)

1. the event counter of a time interval digital quantization is characterized in that: be made up of to digital quantizer, accurate event generator high-speed comparator input circuit, integrated time.
2. by the described a kind of time figure quantification type event counter of claim 1, it is characterized in that embedding micro computer and produce by field programmable logic array (FPLA) (FPGA).
3. by the described a kind of time figure quantification type event counter of claim 1, it is characterized in that high-speed digital logic circuit is produced by field programmable logic array (FPLA) (FPGA).
4. by the described a kind of time figure quantification type event counter of claim 1, it is characterized in that the time arrives digital quantizer and produced by integrated time-to-digit converter chip (TDC).
CN200910273221A 2009-12-15 2009-12-15 Time interval digitally quantized event counter Pending CN101727068A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN200910273221A CN101727068A (en) 2009-12-15 2009-12-15 Time interval digitally quantized event counter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN200910273221A CN101727068A (en) 2009-12-15 2009-12-15 Time interval digitally quantized event counter

Publications (1)

Publication Number Publication Date
CN101727068A true CN101727068A (en) 2010-06-09

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CN200910273221A Pending CN101727068A (en) 2009-12-15 2009-12-15 Time interval digitally quantized event counter

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CN (1) CN101727068A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102621878A (en) * 2012-01-04 2012-08-01 西安近代化学研究所 High-precision time interval measurement device
CN102830610A (en) * 2012-09-17 2012-12-19 中国电子科技集团公司第四十一研究所 Chronometer time automatic measurement circuit based on TDC-GP 21 and method
CN103092060A (en) * 2013-02-08 2013-05-08 西安电子科技大学 Time interval measuring system and time interval measuring method which are based on field programmable gate array (FPGA)
CN104181807A (en) * 2013-05-27 2014-12-03 北京空间飞行器总体设计部 Satellite-to-ground laser time difference measurement apparatus of satellite borne time system

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102621878A (en) * 2012-01-04 2012-08-01 西安近代化学研究所 High-precision time interval measurement device
CN102830610A (en) * 2012-09-17 2012-12-19 中国电子科技集团公司第四十一研究所 Chronometer time automatic measurement circuit based on TDC-GP 21 and method
CN102830610B (en) * 2012-09-17 2015-01-07 中国电子科技集团公司第四十一研究所 Chronometer time automatic measurement circuit based on TDC-GP 21 and method
CN103092060A (en) * 2013-02-08 2013-05-08 西安电子科技大学 Time interval measuring system and time interval measuring method which are based on field programmable gate array (FPGA)
CN103092060B (en) * 2013-02-08 2015-04-08 西安电子科技大学 Time interval measuring system and time interval measuring method which are based on field programmable gate array (FPGA)
CN104181807A (en) * 2013-05-27 2014-12-03 北京空间飞行器总体设计部 Satellite-to-ground laser time difference measurement apparatus of satellite borne time system
CN104181807B (en) * 2013-05-27 2017-02-08 北京空间飞行器总体设计部 Satellite-to-ground laser time difference measurement apparatus of satellite borne time system

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Application publication date: 20100609