CN203675243U - Camera image transmission device based on PCI-E port - Google Patents
Camera image transmission device based on PCI-E port Download PDFInfo
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- CN203675243U CN203675243U CN201420021903.3U CN201420021903U CN203675243U CN 203675243 U CN203675243 U CN 203675243U CN 201420021903 U CN201420021903 U CN 201420021903U CN 203675243 U CN203675243 U CN 203675243U
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Abstract
The utility model discloses a camera image transmission device based on a PCI-E port. The device comprises a first main board and a second main board, the first main board is connected with a camera to be tested through a camera parallel interface and is equipped with a first field programmable gate array (FPGA) provided with a first programming configuration chip, a storage and a level switching circuit; the second main board is connected with a computer host equipped with a testing software through the PCI-E port and is equipped with a clock module, a second FPGA provided with a second programming configuration chip and a PCI-E bridge chip with a local configuration chip; data exchange is carried out between the PCI-E bridge chip and the computer host through a PCI-E transport protocol while data exchange is carried out between the PCI-E bridge chip and the second FPGA through a local bus transport protocol; and the second FPGA on the second main board and the first FPGA on the first main board are connected through low voltage differential signaling (LVDS) ports. With adoption of the camera image transmission device based on the PCI-E port, image data transmission based on the PCI-E port can be realized, the testing speed of a camera with high resolution can be greatly raised, and the production efficiency is also raised.
Description
Technical field
The utility model relates to a kind of for connecting the camera image transmitting device of transmit image data of host computer testing software and camera to be measured, specifically relates to a kind of camera image transmitting device based on PCI-E interface.
Background technology
Along with scientific and technological progress, the pixel of digital camera is more and more higher, has been promoted to ten million Pixel-level, just requires higher to the transmission rate of view data in producing and testing.At present, camera image transmitting device is used for connecting camera to be measured and host computer testing software, and host computer testing software starts, controls camera work by camera image transmitting device; Camera image transmitting device obtains the configuration information of camera from host computer testing software, and the image data information of camera is transferred to host computer testing software, to process in real time, host computer testing software can realize the focusing to camera accordingly, has or not the decision-making functions such as dirty point, stolen goods dirt, color point, lines.But, at present, the interface based on USB2.0 that is connected of camera image transmitting device and upper computer software, and transmission rate based on USB2.0 interface can not meet requirement and the test request of image data transmission.
Summary of the invention
In order to solve the problems of the technologies described above, the utility model proposes a kind of camera image transmitting device based on PCI-E interface, can realize the image data transmission based on PCI-E interface, compared with the traditional image transmission based on USB2.0, transmission rate of the present utility model can reach at least 2.5Gbps, can greatly improve the test rate of the camera with high pixel, enhance productivity.
The technical solution of the utility model is achieved in that
A kind of camera image transmitting device based on PCI-E interface, comprise the first mainboard and the second mainboard, described the first mainboard is connected with camera to be measured by camera parallel interface, described the first mainboard is provided with a FPGA, memory and the level shifting circuit with the first programmed configurations chip, and described the first programmed configurations chip is in order to store the internal logic circuit data of a described FPGA; Described memory is under the control of a described FPGA, in order to store the view data of camera transmission to be measured; Described level shifting circuit in order to change data level between camera operation level to be measured and a described FPGA operation level;
Described the second mainboard is connected with the host computer that is equiped with testing software by PCI-E interface; Described the second mainboard is provided with clock module, have the 2nd FPGA of the second programmed configurations chip and have the PCI-E bridging chip of local configuration chip, and described clock module provides synchronous working clock for described the 2nd FPGA and described PCI-E bridging chip; Described the second programmed configurations chip is in order to store the internal logic circuit data of described the 2nd FPGA; Described local configuration chip is in order to store the configuration data of local register of described PCI-E bridging chip;
Between described PCI-E bridging chip and described host computer, carry out exchanges data by PCI-E host-host protocol, between described PCI-E bridging chip and described the 2nd FPGA, carry out exchanges data by local bus host-host protocol; Between a described FPGA on described the 2nd FPGA and described the first mainboard on described the second mainboard, be connected by LVDS interface.
As further improvement of the utility model, on described PCI-E interface, provide two-way power supply, on described the second mainboard, be also provided with voltage regulator module, wherein a road power supply provides operating voltage into described the second mainboard after described voltage regulator module is changed, and another road power supply is transferred to described the first mainboard as power supply through described LVDS interface after described voltage regulator module conversion.
As further improvement of the utility model, provide+3.3V on described PCI-E interface, 3A and+12V, 500mA two-way power supply, described voltage regulator module general+3.3V, the voltage transitions of 3A power supply is+1.5V, + 1.2V ,+2.5V provides operating voltage as described the second mainboard, described voltage regulator module general+12V, 500mA supply voltage conversion+5V, is transferred to described the first mainboard as the power supply of described the first mainboard through described LVDS interface.
As further improvement of the utility model, on described the first mainboard, be also provided with voltage-regulating circuit, the voltage transitions of the power supply that described voltage-regulating circuit provides described LVDS interface is the operating voltage of described the first mainboard.
As further improvement of the utility model, the voltage transitions of the power supply that described voltage-regulating circuit provides described LVDS interface is+3.3V ,+1.2V and+2.5V voltage is as the circuit voltage of described the first mainboard.
As further improvement of the utility model, described the first mainboard provides the power supply that three tunnels can software adjustment for camera to be measured, be respectively AVDD, DVDD and DOVDD, on described the first mainboard, be also provided with camera power control circuit, described camera power control circuit completes the adjusting of Dui San road voltage under the control of a described FPGA.
As further improvement of the utility model, described AVDD provides at least one in 2.5V, 2.8V, 1.8V, 1.5V and 3.3V supply power voltage for camera to be measured; Described DVDD provides at least one in 1.8V, 1.5V, 1.2V, 2.8V and 3.3V supply power voltage for camera to be measured; Described DOVDD provides at least one in 1.8V, 1.5V, 2.5V, 2.8V and 3.3V supply power voltage for camera to be measured.
As further improvement of the utility model, described the first mainboard power on or camera to be measured carry out close after image output command, the supply power voltage of described camera power control circuit control camera to be measured is zero.
As further improvement of the utility model, on described the first mainboard, be also provided with the USB2.0 main control chip with USB2.0 interface, described USB2.0 main control chip is connected with other host computers that are equiped with testing software by described USB2.0 interface, described USB2.0 main control chip is connected with a described FPGA, and described USB2.0 main control chip has I
2c interface, described I
2c interface accesses the I between described level shifting circuit and a described FPGA
2in C bus.
The beneficial effects of the utility model are: the utility model provides a kind of camera image transmitting device based on PCI-E interface, the first mainboard and the second mainboard, the first mainboard is connected with camera to be measured by camera parallel interface, the first mainboard is provided with a FPGA, memory and the level shifting circuit with the first programmed configurations chip, and the first programmed configurations chip is in order to store the internal logic circuit data of a FPGA; Memory is under the control of a FPGA, in order to store the view data of camera transmission to be measured; Level shifting circuit in order to change data level between camera operation level to be measured and a FPGA operation level; The second mainboard is connected with the host computer that is equiped with testing software by PCI-E interface; The second mainboard is provided with clock module, have the 2nd FPGA of the second programmed configurations chip and have the PCI-E bridging chip of local configuration chip, and clock module provides synchronous working clock for the 2nd FPGA and PCI-E bridging chip; The second programmed configurations chip is in order to store the internal logic circuit data of the 2nd FPGA; Local configuration chip is in order to store the configuration data of local register of PCI-E bridging chip; Between PCI-E bridging chip and host computer, carry out exchanges data by PCI-E host-host protocol, between PCI-E bridging chip and the 2nd FPGA, carry out exchanges data by local bus host-host protocol; Between a FPGA on the 2nd FPGA and the first mainboard on the second mainboard, be connected by LVDS interface.Between PCI-E bridging chip and the testing software of host computer, use PCI-E host-host protocol to carry out exchanges data, and use local bus host-host protocol swap data between the 2nd FPGA.PCI-E bridging chip is mainly realized the conversion of PCI-E bus transfer agreement and local bus host-host protocol, completes communicating by letter between the 2nd FPGA and the testing software of host computer as bridge.When application, PCI-E interface obtains the configuration information of the camera to be measured of the testing software transmission of host computer, starts and control the work of camera to be measured; The real-time processes and displays of testing software that the view data of camera to be measured is transferred to host computer through PCI-E interface, the testing software of host computer can realize the focusing of camera to be measured accordingly, has or not the judgements such as dirty point, stolen goods dirt, color point, lines etc. function.Wherein the communication between two mainboards is used LVDS(low-voltage differential signal) transmission, common-mode noise when low-voltage differential signal can effectively suppress the long Distance Transmission of high-frequency signal, the transmission range of increase high-frequency signal; To sum up, the transmission rate of the camera image transmitting device of the utility model based on PCI-E interface can reach at least 2.5Gbps, with traditional contrast of the image transmission based on USB2.0, the utility model image transmission can improve the test rate of high-pixel camera head greatly, enhances productivity.Preferably, on PCI-E interface, provide+3.3V, 3A and+12V, 500mA two-way power supply, voltage regulator module general+3.3V, the voltage transitions of 3A power supply is+1.5V, + 1.2V ,+2.5V provides operating voltage as the second mainboard, voltage regulator module general+12V, 500mA supply voltage conversion+5V, is transferred to the first mainboard as the power supply of the first mainboard through LVDS interface.Preferably, the first mainboard is provided with voltage-regulating circuit, the voltage transitions of the power supply that voltage-regulating circuit provides LVDS interface is+3.3V ,+1.2V and+2.5V voltage is as the circuit voltage of the first mainboard.Preferably, the processing by camera power control circuit to camera power supply AVDD, DVDD and DOVDD, in conjunction with software control, Neng Weige road power supply provides different supply power voltages, to adapt to the needs of different cameras.Preferably, AVDD provides 2.5V, 2.8V, 1.8V, 1.5V and 3.3V totally 5 kinds of voltage modes for camera to be measured; DVDD provides 1.8V, 1.5V, 1.2V, 2.8V and 3.3V totally 5 kinds of voltage modes for camera to be measured; DOVDD provides 1.8V, 1.5V, 2.5V, 2.8V and 3.3V totally 5 kinds of voltage modes for camera to be measured.Preferably, the first mainboard power on or camera to be measured carry out close after image output command, the supply power voltage of camera power control circuit control camera to be measured is zero.Like this, can avoid in camera to be measured picks and places test process, causing the abnormal contact of connector part and burn out.Preferably, USB2.0 interface and USB2.0 main control chip are set on the first mainboard, its objective is for can compatible traditional image transmission based on USB2.0 and reserved.
Brief description of the drawings
Fig. 1 is the utility model operation principle frame diagram;
Embodiment
As shown in Figure 1, a kind of camera image transmitting device based on PCI-E interface, comprise the first mainboard and the second mainboard, described the first mainboard is connected with camera to be measured by camera parallel interface, described the first mainboard is provided with a FPGA, memory and the level shifting circuit with the first programmed configurations chip, and described the first programmed configurations chip is in order to store the internal logic circuit data of a described FPGA; Described memory is under the control of a described FPGA, in order to store the view data of camera transmission to be measured; Described level shifting circuit in order to change data level between camera operation level to be measured and a described FPGA operation level;
Described the second mainboard is connected with the host computer that is equiped with testing software by PCI-E interface; Described the second mainboard is provided with clock module, have the 2nd FPGA of the second programmed configurations chip and have the PCI-E bridging chip of local configuration chip, and described clock module provides synchronous working clock for described the 2nd FPGA and described PCI-E bridging chip; Described the second programmed configurations chip is in order to store the internal logic circuit data of described the 2nd FPGA; Described local configuration chip is in order to store the configuration data of local register of described PCI-E bridging chip;
Between described PCI-E bridging chip and described host computer, carry out exchanges data by PCI-E host-host protocol, between described PCI-E bridging chip and described the 2nd FPGA, carry out exchanges data by local bus host-host protocol; Between a described FPGA on described the 2nd FPGA and described the first mainboard on described the second mainboard, be connected by LVDS interface.In said structure, after powering on, a FPGA is reading out data from the first programmed configurations chip, enters operating state.After power down, a FPGA reverts to white, and internal logic disappears.Memory, under the control of a FPGA, is stored the view data of camera transmission to be measured.Level shifting circuit is realized the conversion of data level between camera operation level and FPGA operation level, makes the circuit of two kinds of varying levels can be compatible.The configuration data of the local register of the local configuration chip-stored PCI-E bridging chip of PCI-E bridging chip, after powering on, in PCI-E bridging chip local configuration chip, reading out data configures internal register, and PCI-E bridging chip is operated under the mode of operation of user's appointment.The internal logic circuit data of the second programmed configurations chip-stored the 2nd FPGA of the 2nd FPGA.After powering on, the 2nd FPGA is reading out data from the second programmed configurations chip, enters operating state; After power down, the 2nd FPGA internal logic disappears.Between PCI-E bridging chip and the testing software of host computer, use PCI-E host-host protocol to carry out exchanges data, and use local bus host-host protocol swap data between the 2nd FPGA.PCI-E bridging chip is mainly realized the conversion of PCI-E bus transfer agreement and local bus host-host protocol, completes communicating by letter between the 2nd FPGA and the testing software of host computer as bridge.When application, PCI-E interface obtains the configuration information of the camera to be measured of the testing software transmission of host computer, starts and control the work of camera to be measured; The real-time processes and displays of testing software that the view data of camera to be measured is transferred to host computer through PCI-E interface, the testing software of host computer can realize the focusing of camera to be measured accordingly, has or not the judgements such as dirty point, stolen goods dirt, color point, lines etc. function.Wherein the communication between two mainboards is used LVDS(low-voltage differential signal) transmission, common-mode noise when low-voltage differential signal can effectively suppress the long Distance Transmission of high-frequency signal, the transmission range of increase high-frequency signal; To sum up, the transmission rate of the camera image transmitting device of the utility model based on PCI-E interface can reach at least 2.5Gbps, with traditional contrast of the image transmission based on USB2.0, the utility model image transmission can improve the test rate of high-pixel camera head greatly, enhances productivity.
Preferably, on described PCI-E interface, provide two-way power supply, on described the second mainboard, be also provided with voltage regulator module, wherein a road power supply provides operating voltage into described the second mainboard after described voltage regulator module is changed, and another road power supply is transferred to described the first mainboard as power supply through described LVDS interface after described voltage regulator module conversion.
Preferably, provide+3.3V on described PCI-E interface, 3A and+12V, 500mA two-way power supply, described voltage regulator module general+3.3V, the voltage transitions of 3A power supply is+1.5V, + 1.2V ,+2.5V provides operating voltage as described the second mainboard, described voltage regulator module general+12V, 500mA supply voltage conversion+5V, is transferred to described the first mainboard as the power supply of described the first mainboard through described LVDS interface.
Preferably, on described the first mainboard, be also provided with voltage-regulating circuit, the voltage transitions of the power supply that described voltage-regulating circuit provides described LVDS interface is the operating voltage of described the first mainboard.
The voltage transitions of the power supply that preferably, described voltage-regulating circuit provides described LVDS interface is+3.3V ,+1.2V and+2.5V voltage is as the circuit voltage of described the first mainboard.
Preferably, described the first mainboard provides the power supply that three tunnels can software adjustment for camera to be measured, be respectively AVDD, DVDD and DOVDD, on described the first mainboard, be also provided with camera power control circuit, described camera power control circuit completes the adjusting of Dui San road voltage under the control of a described FPGA.Like this, the processing by camera power control circuit to camera power supply AVDD, DVDD and DOVDD, in conjunction with software control, Neng Weige road power supply provides different supply power voltages, to adapt to the needs of different cameras.
Preferably, described AVDD provides at least one in 2.5V, 2.8V, 1.8V, 1.5V and 3.3V supply power voltage for camera to be measured; Described DVDD provides at least one in 1.8V, 1.5V, 1.2V, 2.8V and 3.3V supply power voltage for camera to be measured; Described DOVDD provides at least one in 1.8V, 1.5V, 2.5V, 2.8V and 3.3V supply power voltage for camera to be measured.
Preferably, described the first mainboard power on or camera to be measured carry out close after image output command, the supply power voltage of described camera power control circuit control camera to be measured is zero.Like this, can avoid in camera to be measured picks and places test process, causing the abnormal contact of connector part and burn out, the supply power voltage control of camera to be measured and camera to be measured power supply function of automatically cutting off are all transferred to the first mainboard through a second mainboard FPGA by host computer transmission command, controls each road Voltage-output by a FPGA automatically by camera power control circuit.
Preferably, on described the first mainboard, be also provided with the USB2.0 main control chip with USB2.0 interface, described USB2.0 main control chip is connected with other host computers that are equiped with testing software by described USB2.0 interface, described USB2.0 main control chip is connected with a described FPGA, and described USB2.0 main control chip has I
2c interface, described I
2c interface accesses the I between described level shifting circuit and a described FPGA
2in C bus.The object that USB2.0 interface and USB2.0 main control chip are set on the first mainboard is for can compatible traditional image transmission based on USB2.0 and reserved.When application USB2.0 interface, the testing software of host computer can not use PCI-E interface and the second mainboard, the configuration information of camera to be measured can be sent to USB2.0 main control chip through USB2.0 interface, USB2.0 main control chip by the configuration information of camera to be measured with I
2the mode of C agreement sends, through level shifting circuit convert to the level of camera compatibility to be measured after send in camera parallel interface to be measured; After camera startup work to be measured, view data is sent on the first mainboard through camera parallel interface, through level shifting circuit convert to the level of a FPGA compatibility after send to a FPGA to process, the one FPGA sends to USB2.0 main control chip by view data after treatment again, and view data is uploaded to the testing software of host computer by USB2.0 interface.
The transfer control method of the camera image transmitting device of the utility model based on PCI-E interface, comprises the transmission control of the second mainboard and the transmission control of the first mainboard, and the transmission controlling packets of the second mainboard is drawn together following steps:
The testing software of a, host computer sends the configuration information of camera to be measured, and the driving layer being provided with by host computer is packaged as PCI-E packet, sends to PCI-E bridging chip through PCI-E interface;
B, PCI-E bridging chip deposit the configuration information data in PCI-E packet after its inner corresponding register in, obtain the control of local bus, directly to send the configuration information data of camera to be measured from read-write mode to local bus;
The LVDS signal that c, the 2nd FPGA receive the configuration information data on local bus and be converted into serial sends to LVDS interface, and is transferred to the first mainboard processing;
After d, camera configuration information to be measured are all sent, the testing software of host computer starts the DMA mode of operation of PCI-E bridging chip, waits for and receives view data.
F, the first mainboard start camera work to be measured after receiving configuration information data, and camera to be measured starts to send view data to the first mainboard,
G, the first mainboard are read view data from memory, send to LVDS interface, the 2nd FPGA of the second mainboard receives view data from LVDS interface and deposits its internal storage space in, and after the DMA of PCI-E bridging chip mode of operation starts, sends view data to local bus;
H, PCI-E bridging chip are delivered to PCI-E interface with the mode of operation of DMA from local bus reading image Data Concurrent and are read processing for the testing software of host computer;
The transmission controlling packets of the first mainboard is drawn together following steps:
The one FPGA of j, the first mainboard receives from LVDS interface the serial LVDS signal that the second mainboard is sent, and serial LVDS signal is converted to parallel signal, therefrom obtains the configuration information of camera, with I
2the mode of C communication sends, and after the level of level shifting circuit conversion city and camera compatibility to be measured, then gives camera to be measured through camera parallel interface;
The configuration information of the camera to be measured that the one FPGA of k, the first mainboard sends according to the second mainboard, power supply and work clock to camera to be measured are controlled;
After l, camera startup work to be measured, camera to be measured by view data and synchronizing signal after camera parallel interface to be measured, then through level shifting circuit convert to the level of the first mainboard compatibility after give a FPGA;
M, a FPGA deposit view data in memory, receive after the startup image transmit command that the second mainboard sends, by view data readout memory and be converted to LVDS signal and send to the second mainboard at a FPGA.
Above embodiment is with reference to accompanying drawing, and preferred embodiment of the present utility model is elaborated.Those skilled in the art is by above-described embodiment being carried out to amendment or the change on various forms, but do not deviate from the situation of essence of the present utility model, within all dropping on protection range of the present utility model.
Claims (9)
1. the camera image transmitting device based on PCI-E interface, it is characterized in that: comprise the first mainboard and the second mainboard, described the first mainboard is connected with camera to be measured by camera parallel interface, described the first mainboard is provided with a FPGA, memory and the level shifting circuit with the first programmed configurations chip, and described the first programmed configurations chip is in order to store the internal logic circuit data of a described FPGA; Described memory is under the control of a described FPGA, in order to store the view data of camera transmission to be measured; Described level shifting circuit in order to change data level between camera operation level to be measured and a described FPGA operation level;
Described the second mainboard is connected with the host computer that is equiped with testing software by PCI-E interface; Described the second mainboard is provided with clock module, have the 2nd FPGA of the second programmed configurations chip and have the PCI-E bridging chip of local configuration chip, and described clock module provides synchronous working clock for described the 2nd FPGA and described PCI-E bridging chip; Described the second programmed configurations chip is in order to store the internal logic circuit data of described the 2nd FPGA; Described local configuration chip is in order to store the configuration data of local register of described PCI-E bridging chip;
Between described PCI-E bridging chip and described host computer, carry out exchanges data by PCI-E host-host protocol, between described PCI-E bridging chip and described the 2nd FPGA, carry out exchanges data by local bus host-host protocol; Between a described FPGA on described the 2nd FPGA and described the first mainboard on described the second mainboard, be connected by LVDS interface.
2. the camera image transmitting device based on PCI-E interface according to claim 1, it is characterized in that: on described PCI-E interface, provide two-way power supply, on described the second mainboard, be also provided with voltage regulator module, wherein a road power supply provides operating voltage into described the second mainboard after described voltage regulator module is changed, and another road power supply is transferred to described the first mainboard as power supply through described LVDS interface after described voltage regulator module conversion.
3. the camera image transmitting device based on PCI-E interface according to claim 2, it is characterized in that: provide+3.3V on described PCI-E interface, 3A and+12V, 500mA two-way power supply, described voltage regulator module general+3.3V, the voltage transitions of 3A power supply is+1.5V, + 1.2V, + 2.5V provides operating voltage as described the second mainboard, described voltage regulator module general+12V, 500mA supply voltage conversion+5V, is transferred to described the first mainboard as the power supply of described the first mainboard through described LVDS interface.
4. the camera image transmitting device based on PCI-E interface according to claim 3, it is characterized in that: on described the first mainboard, be also provided with voltage-regulating circuit, the voltage transitions of the power supply that described voltage-regulating circuit provides described LVDS interface is the operating voltage of described the first mainboard.
5. the camera image transmitting device based on PCI-E interface according to claim 4, is characterized in that: the voltage transitions of the power supply that described voltage-regulating circuit provides described LVDS interface is+3.3V ,+1.2V and+2.5V voltage is as the circuit voltage of described the first mainboard.
6. the camera image transmitting device based on PCI-E interface according to claim 1, it is characterized in that: described the first mainboard provides the power supply that three tunnels can software adjustment for camera to be measured, be respectively AVDD, DVDD and DOVDD, on described the first mainboard, be also provided with camera power control circuit, described camera power control circuit completes the adjusting of Dui San road voltage under the control of a described FPGA.
7. the camera image transmitting device based on PCI-E interface according to claim 6, is characterized in that: described AVDD provides at least one in 2.5V, 2.8V, 1.8V, 1.5V and 3.3V supply power voltage for camera to be measured; Described DVDD provides at least one in 1.8V, 1.5V, 1.2V, 2.8V and 3.3V supply power voltage for camera to be measured; Described DOVDD provides at least one in 1.8V, 1.5V, 2.5V, 2.8V and 3.3V supply power voltage for camera to be measured.
8. the camera image transmitting device based on PCI-E interface according to claim 7, it is characterized in that: described the first mainboard power on or camera to be measured carry out close after image output command, the supply power voltage of described camera power control circuit control camera to be measured is zero.
9. the camera image transmitting device based on PCI-E interface according to claim 1, it is characterized in that: on described the first mainboard, be also provided with the USB2.0 main control chip with USB2.0 interface, described USB2.0 main control chip is connected with other host computers that are equiped with testing software by described USB2.0 interface, described USB2.0 main control chip is connected with a described FPGA, and described USB2.0 main control chip has I
2c interface, described I
2c interface accesses the I between described level shifting circuit and a described FPGA
2in C bus.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201420021903.3U CN203675243U (en) | 2014-01-14 | 2014-01-14 | Camera image transmission device based on PCI-E port |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420021903.3U CN203675243U (en) | 2014-01-14 | 2014-01-14 | Camera image transmission device based on PCI-E port |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106887255A (en) * | 2015-12-15 | 2017-06-23 | 西安富成防务科技有限公司 | A kind of process plate structure of dual port RAM test equipment |
| CN108259890A (en) * | 2018-02-13 | 2018-07-06 | 深圳市辰卓电子有限公司 | A kind of information collection bridge-set and imaging sensor quality automatic checkout equipment |
| CN112311989A (en) * | 2020-10-29 | 2021-02-02 | 苏州浪潮智能科技有限公司 | High-speed imaging and transmission system |
| CN113608606A (en) * | 2021-07-23 | 2021-11-05 | 深圳海翼智新科技有限公司 | Interface circuit and network camera |
-
2014
- 2014-01-14 CN CN201420021903.3U patent/CN203675243U/en not_active Withdrawn - After Issue
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106887255A (en) * | 2015-12-15 | 2017-06-23 | 西安富成防务科技有限公司 | A kind of process plate structure of dual port RAM test equipment |
| CN108259890A (en) * | 2018-02-13 | 2018-07-06 | 深圳市辰卓电子有限公司 | A kind of information collection bridge-set and imaging sensor quality automatic checkout equipment |
| CN108259890B (en) * | 2018-02-13 | 2023-08-18 | 深圳市辰卓电子有限公司 | Information acquisition bridging device and image sensor quality automatic detection equipment |
| CN112311989A (en) * | 2020-10-29 | 2021-02-02 | 苏州浪潮智能科技有限公司 | High-speed imaging and transmission system |
| CN113608606A (en) * | 2021-07-23 | 2021-11-05 | 深圳海翼智新科技有限公司 | Interface circuit and network camera |
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