CN103747246B - Based on camera image transmitting device and the transfer control method thereof of PCI-E interface - Google Patents
Based on camera image transmitting device and the transfer control method thereof of PCI-E interface Download PDFInfo
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- CN103747246B CN103747246B CN201410016236.4A CN201410016236A CN103747246B CN 103747246 B CN103747246 B CN 103747246B CN 201410016236 A CN201410016236 A CN 201410016236A CN 103747246 B CN103747246 B CN 103747246B
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Abstract
The invention discloses a kind of camera image transmitting device based on PCI-E interface, comprise the first mainboard and the second mainboard, first mainboard is connected with camera to be measured by camera parallel interface, first mainboard is provided with a FPGA, memory and the level shifting circuit with the first programmed configurations chip, and the second mainboard is connected with the host computer being equiped with testing software by PCI-E interface; Second mainboard is provided with clock module, have the 2nd FPGA of the second programmed configurations chip and have the PCI-E bridging chip of local configuration chip; Carry out exchanges data by PCI-E host-host protocol between PCI-E bridging chip and host computer, between PCI-E bridging chip and the 2nd FPGA, carry out exchanges data by local bus host-host protocol; Be connected by LVDS interface between the 2nd FPGA on second mainboard and the FPGA on the first mainboard.The present invention can realize the image data transmission based on PCI-E interface, greatly can improve the test rate of the camera with high pixel, enhance productivity.
Description
Technical field
The present invention relates to a kind of camera image transmitting device of the transmit image data for connecting host computer testing software and camera to be measured, specifically relating to a kind of camera image transmitting device based on PCI-E interface and transfer control method thereof.
Background technology
Along with the progress of science and technology, the pixel of digital camera is more and more higher, has been promoted to ten million Pixel-level, just requires higher to the transmission rate of view data in production and test.At present, camera image transmitting device is for connecting camera to be measured and host computer testing software, and host computer testing software is started by camera image transmitting device, control camera work; Camera image transmitting device obtains the configuration information of camera from host computer testing software, and the image data information of camera is transferred to host computer testing software, to process in real time, host computer testing software can realize the focusing to camera accordingly, with or without the decision-making function such as dirty point, stolen goods dirt, color point, lines.But at present, the connection of camera image transmitting device and upper computer software based on the interface of USB2.0, and can not meet requirement and the test request of image data transmission based on the transmission rate of USB2.0 interface.
Summary of the invention
In order to solve the problems of the technologies described above, the present invention proposes a kind of camera image transmitting device based on PCI-E interface and transfer control method thereof, the image data transmission based on PCI-E interface can be realized, compared with traditional image transmission based on USB2.0, transmission rate of the present invention can reach at least 2.5Gbps, greatly can improve the test rate of the camera with high pixel, enhance productivity.
Technical scheme of the present invention is achieved in that
A kind of camera image transmitting device based on PCI-E interface, comprise the first mainboard and the second mainboard, described first mainboard is connected with camera to be measured by camera parallel interface, described first mainboard is provided with a FPGA, memory and the level shifting circuit with the first programmed configurations chip, and described first programmed configurations chip is in order to store the internal logic circuit data of a described FPGA; Described memory under the control of a described FPGA, in order to store the view data of thecamera head to be measured; Described level shifting circuit is in order to change data level between camera operation level to be measured and a described FPGA operation level;
Described second mainboard is connected with the host computer being equiped with testing software by PCI-E interface; Described second mainboard is provided with clock module, have the 2nd FPGA of the second programmed configurations chip and have the PCI-E bridging chip of local configuration chip, and described clock module provides synchronous working clock for described 2nd FPGA and described PCI-E bridging chip; Described second programmed configurations chip is in order to store the internal logic circuit data of described 2nd FPGA; Described local configuration chip is in order to store the configuration data of the local register of described PCI-E bridging chip;
Carry out exchanges data by PCI-E host-host protocol between described PCI-E bridging chip and described host computer, between described PCI-E bridging chip and described 2nd FPGA, carry out exchanges data by local bus host-host protocol; Be connected by LVDS interface between described 2nd FPGA on described second mainboard and the described FPGA on described first mainboard.
As a further improvement on the present invention, described PCI-E interface provides two-way power supply, described second mainboard is also provided with voltage regulator module, wherein a road power supply provides operating voltage into described second mainboard after described voltage regulator module is changed, and another road power supply is transferred to described first mainboard as power supply through described LVDS interface after described voltage regulator module conversion.
As a further improvement on the present invention, described PCI-E interface provides+3.3V, 3A and+12V, 500mA two-way power supply, described voltage regulator module is by+3.3V, the voltage transitions of 3A power supply is+1.5V, + 1.2V ,+2.5V provide operating voltage as described second mainboard, and described voltage regulator module is by+12V, 500mA supply voltage conversion+5V, the power supply as described first mainboard is transferred to described first mainboard through described LVDS interface.
As a further improvement on the present invention, described first mainboard is also provided with voltage-regulating circuit, the voltage transitions of the power supply that described LVDS interface provides by described voltage-regulating circuit is the operating voltage of described first mainboard.
As a further improvement on the present invention, the voltage transitions of power supply that described LVDS interface provides by described voltage-regulating circuit is the circuit voltage of+3.3V ,+1.2V and+2.5V voltage as described first mainboard.
As a further improvement on the present invention, described first mainboard for camera to be measured provides three tunnels can the power supply of software adjustment, be respectively AVDD, DVDD and DOVDD, described first mainboard is also provided with camera power control circuit, and described camera power control circuit completes the adjustment to three road voltages under the control of a described FPGA.
As a further improvement on the present invention, described AVDD provides at least one in 2.5V, 2.8V, 1.8V, 1.5V and 3.3V supply power voltage for camera to be measured; Described DVDD provides at least one in 1.8V, 1.5V, 1.2V, 2.8V and 3.3V supply power voltage for camera to be measured; Described DOVDD provides at least one in 1.8V, 1.5V, 2.5V, 2.8V and 3.3V supply power voltage for camera to be measured.
As a further improvement on the present invention, after described first mainboard powers on or camera to be measured performs closedown image output command, the supply power voltage that described camera power control circuit controls camera to be measured is zero.
As a further improvement on the present invention, described first mainboard is also provided with the USB2.0 main control chip with USB2.0 interface, described USB2.0 main control chip is connected with other host computers being equiped with testing software by described USB2.0 interface, described USB2.0 main control chip is connected with a described FPGA, and described USB2.0 main control chip has I
2c interface, described I
2c interface accesses the I between described level shifting circuit and a described FPGA
2in C bus.
Based on a transfer control method for the camera image transmitting device of PCI-E interface, the transmission of the transmission control and the first mainboard that comprise the second mainboard controls, and the transmission controlling packets of the second mainboard draws together following steps:
The testing software of a, host computer sends the configuration information of camera to be measured, and the driving layer be provided with by host computer is packaged as PCI-E packet, sends to PCI-E bridging chip through PCI-E interface;
Configuration information data in PCI-E packet stored in after the corresponding register in its inside, are obtained the control of local bus by b, PCI-E bridging chip, with the direct configuration information data sending camera to be measured from read-write mode to local bus;
C, the 2nd FPGA receive the configuration information data on local bus and the LVDS signal being converted into serial is sent to LVDS interface, and be transferred to the first mainboard process;
After d, camera configuration information to be measured are all sent, the testing software of host computer starts the DMA mode of operation of PCI-E bridging chip, wait-receiving mode view data;
E, the first mainboard start camera work to be measured after receiving configuration information data, camera to be measured starts to send view data to the first mainboard;
View data reads by f, the first mainboard from memory, be sent to LVDS interface, 2nd FPGA of the second mainboard from LVDS interface view data stored in its internal storage space, and PCI-E bridging chip DMA mode of operation start after, send view data on local bus;
G, PCI-E bridging chip delivers to the testing software reading process of PCI-E interface for host computer with the mode of operation of DMA from local bus reading image Data Concurrent;
The transmission controlling packets of the first mainboard draws together following steps:
The serial LVDS signal that one FPGA of h, the first mainboard sends from LVDS interface second mainboard, and serial LVDS signal is converted to parallel signal, therefrom obtain the configuration information of camera, with I
2the mode of C communication sends, and after the level that level shifting circuit changes city and camera compatibility to be measured, then gives camera to be measured through camera parallel interface;
The configuration information of the camera to be measured that the one FPGA of i, the first mainboard sends according to the second mainboard, controls the power supply of camera to be measured and work clock;
After j, camera startup work to be measured, camera to be measured by view data and synchronizing signal after camera parallel interface to be measured, then through level shifting circuit convert to the level of the first mainboard compatibility after give a FPGA;
View data readout memory stored in memory, after a FPGA receives the startup image transmit command that the second mainboard sends, is converted to LVDS signal and sends to the second mainboard by view data by k, a FPGA.
The invention has the beneficial effects as follows: the invention provides a kind of camera image transmitting device based on PCI-E interface and transfer control method thereof, first mainboard and the second mainboard, first mainboard is connected with camera to be measured by camera parallel interface, first mainboard is provided with a FPGA, memory and the level shifting circuit with the first programmed configurations chip, and the first programmed configurations chip is in order to store the internal logic circuit data of a FPGA; Memory under the control of a FPGA, in order to store the view data of thecamera head to be measured; Level shifting circuit is in order to change data level between camera operation level to be measured and a FPGA operation level; Second mainboard is connected with the host computer being equiped with testing software by PCI-E interface; Second mainboard is provided with clock module, have the 2nd FPGA of the second programmed configurations chip and have the PCI-E bridging chip of local configuration chip, and clock module provides synchronous working clock for the 2nd FPGA and PCI-E bridging chip; Second programmed configurations chip is in order to store the internal logic circuit data of the 2nd FPGA; Local configuration chip is in order to store the configuration data of the local register of PCI-E bridging chip; Carry out exchanges data by PCI-E host-host protocol between PCI-E bridging chip and host computer, between PCI-E bridging chip and the 2nd FPGA, carry out exchanges data by local bus host-host protocol; Be connected by LVDS interface between the 2nd FPGA on second mainboard and the FPGA on the first mainboard.Use PCI-E host-host protocol to carry out exchanges data between PCI-E bridging chip and the testing software of host computer, and use local bus host-host protocol swap data between the 2nd FPGA.PCI-E bridging chip mainly realizes the conversion of PCI-E bus transfer agreement and local bus host-host protocol, completes the 2nd communication between FPGA and the testing software of host computer as bridge.The configuration information of camera to be measured that the testing software that during application, PCI-E interface obtains host computer sends, starts and controls the work of camera to be measured; The view data of camera to be measured is transferred to the real-time processes and displays of testing software of host computer through PCI-E interface, the testing software of host computer can realize the focusing of camera to be measured accordingly, with or without the judgement such as dirty point, stolen goods dirt, color point, lines etc. function.Communication wherein between two pieces of mainboards uses LVDS(low-voltage differential signal) transmission, low-voltage differential signal effectively can suppress common-mode noise during high-frequency signal long range propagation, increases the transmission range of high-frequency signal; To sum up, the transmission rate that the present invention is based on the camera image transmitting device of PCI-E interface can reach at least 2.5Gbps, contrast with traditional image transmission based on USB2.0, image transmission of the present invention can improve the test rate of high-pixel camera head greatly, enhances productivity.Preferably, PCI-E interface provides+3.3V, 3A and+12V, 500mA two-way power supply, voltage regulator module is by+3.3V, the voltage transitions of 3A power supply is+1.5V, + 1.2V ,+2.5V provide operating voltage as the second mainboard, and voltage regulator module is by+12V, 500mA supply voltage conversion+5V, the power supply as the first mainboard is transferred to the first mainboard through LVDS interface.Preferably, the first mainboard is provided with voltage-regulating circuit, and the voltage transitions of the power supply that LVDS interface provides by voltage-regulating circuit is the circuit voltage of+3.3V ,+1.2V and+2.5V voltage as the first mainboard.Preferably, by the process of camera power control circuit to camera power supply AVDD, DVDD and DOVDD, in conjunction with software control, Neng Weige road power supply provides different supply power voltages, to adapt to the needs of different camera.Preferably, AVDD provides 2.5V, 2.8V, 1.8V, 1.5V and 3.3V totally 5 kinds of voltage modes for camera to be measured; DVDD provides 1.8V, 1.5V, 1.2V, 2.8V and 3.3V totally 5 kinds of voltage modes for camera to be measured; DOVDD provides 1.8V, 1.5V, 2.5V, 2.8V and 3.3V totally 5 kinds of voltage modes for camera to be measured.Preferably, after the first mainboard powers on or camera to be measured performs closedown image output command, the supply power voltage that camera power control circuit controls camera to be measured is zero.Like this, can avoid camera to be measured pick and place in test process cause the exception of connector part contact and burn out.Preferably, the first mainboard is arranged USB2.0 interface and USB2.0 main control chip, its objective is in order to can compatible traditional image transmission based on USB2.0 and reserved.
Accompanying drawing explanation
Fig. 1 is operation principle frame diagram of the present invention;
Embodiment
As shown in Figure 1, a kind of camera image transmitting device based on PCI-E interface, comprise the first mainboard and the second mainboard, described first mainboard is connected with camera to be measured by camera parallel interface, described first mainboard is provided with a FPGA, memory and the level shifting circuit with the first programmed configurations chip, and described first programmed configurations chip is in order to store the internal logic circuit data of a described FPGA; Described memory under the control of a described FPGA, in order to store the view data of thecamera head to be measured; Described level shifting circuit is in order to change data level between camera operation level to be measured and a described FPGA operation level;
Described second mainboard is connected with the host computer being equiped with testing software by PCI-E interface; Described second mainboard is provided with clock module, have the 2nd FPGA of the second programmed configurations chip and have the PCI-E bridging chip of local configuration chip, and described clock module provides synchronous working clock for described 2nd FPGA and described PCI-E bridging chip; Described second programmed configurations chip is in order to store the internal logic circuit data of described 2nd FPGA; Described local configuration chip is in order to store the configuration data of the local register of described PCI-E bridging chip;
Carry out exchanges data by PCI-E host-host protocol between described PCI-E bridging chip and described host computer, between described PCI-E bridging chip and described 2nd FPGA, carry out exchanges data by local bus host-host protocol; Be connected by LVDS interface between described 2nd FPGA on described second mainboard and the described FPGA on described first mainboard.In said structure, after powering on, a FPGA reads data from the first programmed configurations chip, enters operating state.After power down, a FPGA reverts to white tiles, and internal logic disappears.Memory, under the control of a FPGA, stores the view data of thecamera head to be measured.Level shifting circuit realizes the conversion of data level between camera operation level and FPGA operation level, enables the circuit of two kinds of varying levels compatible.The configuration data of the local register of the local configuration chip-stored PCI-E bridging chip of PCI-E bridging chip, after powering on, data are read to configure internal register, under PCI-E bridging chip is operated in mode of operation that user specifies in PCI-E bridging chip local configuration chip.The internal logic circuit data of second programmed configurations chip-stored the 2nd FPGA of the 2nd FPGA.After powering on, the 2nd FPGA reads data from the second programmed configurations chip, enters operating state; After power down, the 2nd FPGA internal logic disappears.Use PCI-E host-host protocol to carry out exchanges data between PCI-E bridging chip and the testing software of host computer, and use local bus host-host protocol swap data between the 2nd FPGA.PCI-E bridging chip mainly realizes the conversion of PCI-E bus transfer agreement and local bus host-host protocol, completes the 2nd communication between FPGA and the testing software of host computer as bridge.The configuration information of camera to be measured that the testing software that during application, PCI-E interface obtains host computer sends, starts and controls the work of camera to be measured; The view data of camera to be measured is transferred to the real-time processes and displays of testing software of host computer through PCI-E interface, the testing software of host computer can realize the focusing of camera to be measured accordingly, with or without the judgement such as dirty point, stolen goods dirt, color point, lines etc. function.Communication wherein between two pieces of mainboards uses LVDS(low-voltage differential signal) transmission, low-voltage differential signal effectively can suppress common-mode noise during high-frequency signal long range propagation, increases the transmission range of high-frequency signal; To sum up, the transmission rate that the present invention is based on the camera image transmitting device of PCI-E interface can reach at least 2.5Gbps, contrast with traditional image transmission based on USB2.0, image transmission of the present invention can improve the test rate of high-pixel camera head greatly, enhances productivity.
Preferably, described PCI-E interface provides two-way power supply, described second mainboard is also provided with voltage regulator module, wherein a road power supply provides operating voltage into described second mainboard after described voltage regulator module is changed, and another road power supply is transferred to described first mainboard as power supply through described LVDS interface after described voltage regulator module conversion.
Preferably, described PCI-E interface provides+3.3V, 3A and+12V, 500mA two-way power supply, described voltage regulator module is by+3.3V, the voltage transitions of 3A power supply is+1.5V, + 1.2V ,+2.5V provide operating voltage as described second mainboard, and described voltage regulator module is by+12V, 500mA supply voltage conversion+5V, the power supply as described first mainboard is transferred to described first mainboard through described LVDS interface.
Preferably, described first mainboard is also provided with voltage-regulating circuit, the voltage transitions of the power supply that described LVDS interface provides by described voltage-regulating circuit is the operating voltage of described first mainboard.
Preferably, the voltage transitions of power supply that described LVDS interface provides by described voltage-regulating circuit is the circuit voltage of+3.3V ,+1.2V and+2.5V voltage as described first mainboard.
Preferably, described first mainboard for camera to be measured provides three tunnels can the power supply of software adjustment, be respectively AVDD, DVDD and DOVDD, described first mainboard is also provided with camera power control circuit, and described camera power control circuit completes the adjustment to three road voltages under the control of a described FPGA.Like this, by the process of camera power control circuit to camera power supply AVDD, DVDD and DOVDD, in conjunction with software control, Neng Weige road power supply provides different supply power voltages, to adapt to the needs of different camera.
Preferably, described AVDD provides at least one in 2.5V, 2.8V, 1.8V, 1.5V and 3.3V supply power voltage for camera to be measured; Described DVDD provides at least one in 1.8V, 1.5V, 1.2V, 2.8V and 3.3V supply power voltage for camera to be measured; Described DOVDD provides at least one in 1.8V, 1.5V, 2.5V, 2.8V and 3.3V supply power voltage for camera to be measured.
Preferably, after described first mainboard powers on or camera to be measured performs closedown image output command, the supply power voltage that described camera power control circuit controls camera to be measured is zero.Like this, can avoid camera to be measured pick and place in test process cause the exception of connector part contact and burn out, the supply power voltage of camera to be measured controls and camera to be measured is powered, and function of automatically cutting off is all transferred to a FPGA of the first mainboard through the second mainboard by host computer transmission command, automatically controls each road voltage export by a FPGA by camera power control circuit.
Preferably, described first mainboard is also provided with the USB2.0 main control chip with USB2.0 interface, described USB2.0 main control chip is connected with other host computers being equiped with testing software by described USB2.0 interface, described USB2.0 main control chip is connected with a described FPGA, and described USB2.0 main control chip has I
2c interface, described I
2c interface accesses the I between described level shifting circuit and a described FPGA
2in C bus.The object first mainboard being arranged USB2.0 interface and USB2.0 main control chip is in order to can compatible traditional image transmission based on USB2.0 and reserved.During application USB2.0 interface, the testing software of host computer can not use PCI-E interface and the second mainboard, the configuration information of camera to be measured can be sent to USB2.0 main control chip through USB2.0 interface, USB2.0 main control chip by the configuration information of camera to be measured with I
2the mode of C agreement sends, through level shifting circuit convert to the level of camera compatibility to be measured after be sent in camera parallel interface to be measured; After camera startup work to be measured, view data is sent on the first mainboard through camera parallel interface, through level shifting circuit convert to the level of a FPGA compatibility after send to a FPGA process, view data after process is sent to USB2.0 main control chip by the one FPGA again, and view data is uploaded to the testing software of host computer by USB2.0 interface.
Based on a transfer control method for the camera image transmitting device of PCI-E interface, it is characterized in that: the transmission of the transmission control and the first mainboard that comprise the second mainboard controls, and the transmission controlling packets of the second mainboard draws together following steps:
The testing software of a, host computer sends the configuration information of camera to be measured, and the driving layer be provided with by host computer is packaged as PCI-E packet, sends to PCI-E bridging chip through PCI-E interface;
Configuration information data in PCI-E packet stored in after the corresponding register in its inside, are obtained the control of local bus by b, PCI-E bridging chip, with the direct configuration information data sending camera to be measured from read-write mode to local bus;
C, the 2nd FPGA receive the configuration information data on local bus and the LVDS signal being converted into serial is sent to LVDS interface, and be transferred to the first mainboard process;
After d, camera configuration information to be measured are all sent, the testing software of host computer starts the DMA mode of operation of PCI-E bridging chip, wait-receiving mode view data;
E, the first mainboard start camera work to be measured after receiving configuration information data, camera to be measured starts to send view data to the first mainboard;
View data reads by f, the first mainboard from memory, be sent to LVDS interface, 2nd FPGA of the second mainboard from LVDS interface view data stored in its internal storage space, and PCI-E bridging chip DMA mode of operation start after, send view data on local bus;
G, PCI-E bridging chip delivers to the testing software reading process of PCI-E interface for host computer with the mode of operation of DMA from local bus reading image Data Concurrent;
The transmission controlling packets of the first mainboard draws together following steps:
The serial LVDS signal that one FPGA of h, the first mainboard sends from LVDS interface second mainboard, and serial LVDS signal is converted to parallel signal, therefrom obtain the configuration information of camera, with I
2the mode of C communication sends, and after the level that level shifting circuit changes city and camera compatibility to be measured, then gives camera to be measured through camera parallel interface;
The configuration information of the camera to be measured that the one FPGA of i, the first mainboard sends according to the second mainboard, controls the power supply of camera to be measured and work clock;
After j, camera startup work to be measured, camera to be measured by view data and synchronizing signal after camera parallel interface to be measured, then through level shifting circuit convert to the level of the first mainboard compatibility after give a FPGA;
View data readout memory stored in memory, after a FPGA receives the startup image transmit command that the second mainboard sends, is converted to LVDS signal and sends to the second mainboard by view data by k, a FPGA.
Above embodiment is with reference to accompanying drawing, to a preferred embodiment of the present invention will be described in detail.Those skilled in the art by carrying out amendment on various forms or change to above-described embodiment, but when not deviating from essence of the present invention, drops within protection scope of the present invention.
Claims (10)
1. the camera image transmitting device based on PCI-E interface, it is characterized in that: comprise the first mainboard and the second mainboard, described first mainboard is connected with camera to be measured by camera parallel interface, described first mainboard is provided with a FPGA, memory and the level shifting circuit with the first programmed configurations chip, and described first programmed configurations chip is in order to store the internal logic circuit data of a described FPGA; Described memory under the control of a described FPGA, in order to store the view data of thecamera head to be measured; Described level shifting circuit is in order to change data level between camera operation level to be measured and a described FPGA operation level;
Described second mainboard is connected with the host computer being equiped with testing software by PCI-E interface; Described second mainboard is provided with clock module, have the 2nd FPGA of the second programmed configurations chip and have the PCI-E bridging chip of local configuration chip, and described clock module provides synchronous working clock for described 2nd FPGA and described PCI-E bridging chip; Described second programmed configurations chip is in order to store the internal logic circuit data of described 2nd FPGA; Described local configuration chip is in order to store the configuration data of the local register of described PCI-E bridging chip;
Carry out exchanges data by PCI-E host-host protocol between described PCI-E bridging chip and described host computer, between described PCI-E bridging chip and described 2nd FPGA, carry out exchanges data by local bus host-host protocol; Be connected by LVDS interface between described 2nd FPGA on described second mainboard and the described FPGA on described first mainboard.
2. the camera image transmitting device based on PCI-E interface according to claim 1, it is characterized in that: described PCI-E interface provides two-way power supply, described second mainboard is also provided with voltage regulator module, wherein a road power supply provides operating voltage into described second mainboard after described voltage regulator module is changed, and another road power supply is transferred to described first mainboard as power supply through described LVDS interface after described voltage regulator module conversion.
3. the camera image transmitting device based on PCI-E interface according to claim 2, it is characterized in that: described PCI-E interface provides+3.3V, 3A and+12V, 500mA two-way power supply, described voltage regulator module is by+3.3V, the voltage transitions of 3A power supply is+1.5V, + 1.2V, + 2.5V provides operating voltage as described second mainboard, described voltage regulator module is by+12V, 500mA supply voltage conversion+5V, the power supply as described first mainboard is transferred to described first mainboard through described LVDS interface.
4. the camera image transmitting device based on PCI-E interface according to claim 3, it is characterized in that: described first mainboard is also provided with voltage-regulating circuit, the voltage transitions of the power supply that described LVDS interface provides by described voltage-regulating circuit is the operating voltage of described first mainboard.
5. the camera image transmitting device based on PCI-E interface according to claim 4, is characterized in that: the voltage transitions of the power supply that described LVDS interface provides by described voltage-regulating circuit is the circuit voltage of+3.3V ,+1.2V and+2.5V voltage as described first mainboard.
6. the camera image transmitting device based on PCI-E interface according to claim 1, it is characterized in that: described first mainboard for camera to be measured provides three tunnels can the power supply of software adjustment, be respectively AVDD, DVDD and DOVDD, described first mainboard is also provided with camera power control circuit, and described camera power control circuit completes the adjustment to three road voltages under the control of a described FPGA.
7. the camera image transmitting device based on PCI-E interface according to claim 6, is characterized in that: described AVDD provides at least one in 2.5V, 2.8V, 1.8V, 1.5V and 3.3V supply power voltage for camera to be measured; Described DVDD provides at least one in 1.8V, 1.5V, 1.2V, 2.8V and 3.3V supply power voltage for camera to be measured; Described DOVDD provides at least one in 1.8V, 1.5V, 2.5V, 2.8V and 3.3V supply power voltage for camera to be measured.
8. the camera image transmitting device based on PCI-E interface according to claim 7, it is characterized in that: after described first mainboard powers on or camera to be measured performs closedown image output command, the supply power voltage that described camera power control circuit controls camera to be measured is zero.
9. the camera image transmitting device based on PCI-E interface according to claim 1, it is characterized in that: described first mainboard is also provided with the USB2.0 main control chip with USB2.0 interface, described USB2.0 main control chip is connected with other host computers being equiped with testing software by described USB2.0 interface, described USB2.0 main control chip is connected with a described FPGA, and described USB2.0 main control chip has I
2c interface, described I
2c interface accesses the I between described level shifting circuit and a described FPGA
2in C bus.
10. the transfer control method of the camera image transmitting device based on PCI-E interface as described in any one of claim 1 to 9, it is characterized in that: the transmission of the transmission control and the first mainboard that comprise the second mainboard controls, and the transmission controlling packets of the second mainboard draws together following steps:
The testing software of a, host computer sends the configuration information of camera to be measured, and the driving layer be provided with by host computer is packaged as PCI-E packet, sends to PCI-E bridging chip through PCI-E interface;
Configuration information data in PCI-E packet stored in after the corresponding register in its inside, are obtained the control of local bus by b, PCI-E bridging chip, with the direct configuration information data sending camera to be measured from read-write mode to local bus;
C, the 2nd FPGA receive the configuration information data on local bus and the LVDS signal being converted into serial is sent to LVDS interface, and be transferred to the first mainboard process;
After d, camera configuration information to be measured are all sent, the testing software of host computer starts the DMA mode of operation of PCI-E bridging chip, wait-receiving mode view data;
E, the first mainboard start camera work to be measured after receiving configuration information data, camera to be measured starts to send view data to the first mainboard;
View data reads by f, the first mainboard from memory, be sent to LVDS interface, 2nd FPGA of the second mainboard from LVDS interface view data stored in its internal storage space, and PCI-E bridging chip DMA mode of operation start after, send view data on local bus;
G, PCI-E bridging chip delivers to the testing software reading process of PCI-E interface for host computer with the mode of operation of DMA from local bus reading image Data Concurrent;
The transmission controlling packets of the first mainboard draws together following steps:
The serial LVDS signal that one FPGA of h, the first mainboard sends from LVDS interface second mainboard, and serial LVDS signal is converted to parallel signal, therefrom obtain the configuration information of camera, with I
2the mode of C communication sends, through level shifting circuit convert to the level of camera compatibility to be measured after, then give camera to be measured through camera parallel interface;
The configuration information of the camera to be measured that the one FPGA of i, the first mainboard sends according to the second mainboard, controls the power supply of camera to be measured and work clock;
After j, camera startup work to be measured, camera to be measured by view data and synchronizing signal after camera parallel interface to be measured, then through level shifting circuit convert to the level of the first mainboard compatibility after give a FPGA;
View data readout memory stored in memory, after a FPGA receives the startup image transmit command that the second mainboard sends, is converted to LVDS signal and sends to the second mainboard by view data by k, a FPGA.
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| CN106034199B (en) * | 2015-03-18 | 2019-07-05 | 中国科学院苏州纳米技术与纳米仿生研究所 | A kind of image collecting device and method of analog data source |
| CN104853077B (en) * | 2015-05-27 | 2017-11-07 | 周毅 | A kind of broadcast level high speed high-definition camera |
| CN105282545A (en) * | 2015-11-25 | 2016-01-27 | 上海战诚电子科技股份有限公司 | FPGA automatic test system and test method for liquid crystal television board |
| CN106791550B (en) * | 2016-12-05 | 2019-06-21 | 中国航空工业集团公司洛阳电光设备研究所 | The device and method that a kind of low frame rate LVDS turns high frame frequency DVI video |
| CN108521548A (en) * | 2018-04-16 | 2018-09-11 | 昆山软龙格自动化技术有限公司 | Multi-cam based on PCIE and camera coaxial transmission technology is same to survey device |
| CN112291552B (en) * | 2020-09-30 | 2023-09-26 | 上海集成电路研发中心有限公司 | Image configuration display method based on FPGA |
| CN116069704A (en) * | 2021-10-29 | 2023-05-05 | 华为技术有限公司 | Signal transmission device, method and electronic equipment |
| CN115357534B (en) * | 2022-07-29 | 2024-04-09 | 中国科学院合肥物质科学研究院 | High-speed multipath LVDS acquisition system and storage medium |
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