CN203616608U - Port expansion circuit - Google Patents

Port expansion circuit Download PDF

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Publication number
CN203616608U
CN203616608U CN201320880113.6U CN201320880113U CN203616608U CN 203616608 U CN203616608 U CN 203616608U CN 201320880113 U CN201320880113 U CN 201320880113U CN 203616608 U CN203616608 U CN 203616608U
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CN
China
Prior art keywords
port
shift register
signal
output
expansion circuit
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Expired - Lifetime
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CN201320880113.6U
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Chinese (zh)
Inventor
汪军
黄三贵
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Guangdong Real Design Intelligent Technology Co Ltd
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Guangdong Real Design Intelligent Technology Co Ltd
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Priority to CN201320880113.6U priority Critical patent/CN203616608U/en
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Abstract

The utility model discloses a port expansion circuit. The port expansion circuit is used for expanding output ports of a one-chip microcomputer. The port expansion circuit comprises a serial input module, a signal conversion module converting a serial signal into a parallel signal and a parallel output module which are connected. The clock signal port and the data signal port of the serial input module are corresponding ports of a one-chip microcomputer. The data signal port and the clock signal port are respectively connected with a data signal port and a clock signal port of the signal conversion module. The signal conversion module comprises N serial input and parallel output shift registers which are respectively a shift register U1 to a shift register UN. One output port of the shift register Ui is connected with the data input port of the shift register U(i+1). The parallel output module is composed of the output ports of the shift register. The port expansion circuit can achieve a function of large expansion of output ports. Only a few control ports are needed, and a lot of output ports can be expanded and produced. The port expansion circuit is simple and reliable.

Description

A kind of port expansion circuit
Technical field
The utility model relates to control technology field, more specifically, relates to a kind of port expansion circuit.
Background technology
At present, along with scientific and technological development, people are more and more higher to the requirement of man-machine interface, and the display interface of luxurious complexity need to have more port to realize the interface of various demonstrations, and the port of existing various single-chip microcomputers has obviously limited to this development trend.
Select the single-chip microcomputer that port is many to realize complicated demonstration, waste very much no matter from cost or in resource be all.Can to show complicated multistage in order reaching, to make again the maintenance of cost cheap, should adopt a kind of mode to carry out Extended Capabilities Port and make to export multistage.
The scheme of traditional serial input-parallel output can more effectively address this problem, but solution is not very abundant, in the case of numerous display segments needs, still seems and is willing and yet unable to help, and the control port demonstration of single-chip microcomputer utilizes abundant not.
In practical application, still there are some problems in the use of port: 1) output of the port of traditional single-chip microcomputer is high to cost requirement, and cost performance is low, and can only provide limited port to export.2) in the scheme of traditional serial input-parallel output, control port need to have 2 above one-chip machine ports on one side, is extended to the port of 8 left and right, and the effect of expansion is not clearly, in the situation that one-chip machine port demand is very strong, shows bad.
Utility model content
In order to overcome the deficiencies in the prior art, the utility model proposes a kind of reliable and practical port expansion circuit, can reach the complicated multistage of demonstration to realize a small amount of one-chip machine port.
To achieve these goals, the technical solution of the utility model is:
A kind of port expansion circuit, for expanding the output port of single-chip microcomputer, comprises the serial input module connecting in turn, signal conversion module and the parallel output module that serial signal is converted to parallel signal;
The clock signal port of described serial input module and data-signal port are the port that single-chip microcomputer is corresponding; Described data-signal port and clock signal port connect respectively data-signal port and the clock signal port of signal conversion module;
Signal conversion module comprises the shift register of N serial input-parallel output, be respectively shift register U1, shift register U2 ..., shift register UN, an output port of shift register Ui connects the data-signal input port of shift register U (i+1), i=1,2 ..., N-1;
Described parallel output module is to be made up of the output port of each shift register; Described output port and common single-chip microcomputer output port have identical function.
Described shift register is the shift register of 8 bit parallel outputs, and output port position is Q0 ~ Q7.
A Q7 output port of described shift register Ui connects the data-signal input port of shift register U (i+1).
The beneficial effects of the utility model are: the utility model adopts a kind of port expansion circuit in the lesser amt element using, to reach the expansion of port, circuit is realized simple and reliable, it is very high that the rate of spread of port has reached, and output port and the common single-chip microcomputer output port of expansion have identical function.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of a kind of port expansion circuit of the utility model.
Fig. 2 is structural representation of the present utility model.
Embodiment
Below in conjunction with accompanying drawing, the utility model is further described, but embodiment of the present utility model is not limited to this.
A kind of port expansion circuit, for expanding the output port of single-chip microcomputer, comprises the serial input module 3 connecting in turn, signal conversion module 2 and the parallel output module 1 that serial signal is converted to parallel signal;
The clock signal port of described serial input module and data-signal port are the port that single-chip microcomputer is corresponding; Described data-signal port and clock signal port connect respectively data-signal port and the clock signal port of signal conversion module;
Signal conversion module comprises the shift register of N serial input-parallel output, be respectively shift register U1, shift register U2 ..., shift register UN, an output port of shift register Ui connects the data-signal input port of shift register U (i+1), i=1,2 ..., N-1;
Described parallel output module is to be made up of the output port of each shift register; Make to obtain more output port after expansion, described output port and common single-chip microcomputer output port have identical function.Adopting is in the present embodiment 8 bit shift register 74LS164.
The principle of work of the present embodiment:
As Fig. 1, signal conversion module 2 is through 8 clock signals, shown position is passed to the Q7 position of U1, after the 9th clock signal, shown position is delivered to the Q0 position of U2, by that analogy, when after N*8+1 clock signal, shown position is delivered to the Q0 position of U (N+1), after expansion, parallel output module can be used for exporting controlling and show.
Above-described embodiment of the present utility model, does not form the restriction to the utility model protection domain.Any modification of having done within spiritual principles of the present utility model, be equal to and replace and improvement etc., within all should being included in claim protection domain of the present utility model.

Claims (3)

1. a port expansion circuit, for expanding the output port of single-chip microcomputer, is characterized in that, comprises the serial input module connecting in turn, signal conversion module and the parallel output module that serial signal is converted to parallel signal;
The clock signal port of described serial input module and data-signal port are the port that single-chip microcomputer is corresponding; Described data-signal port and clock signal port connect respectively data-signal port and the clock signal port of signal conversion module;
Signal conversion module comprises the shift register of N serial input-parallel output, be respectively shift register U1, shift register U2 ..., shift register UN, an output port of shift register Ui connects the data-signal input port of shift register U (i+1), i=1,2 ..., N-1;
Described parallel output module is to be made up of the output port of each shift register.
2. port expansion circuit according to claim 1, is characterized in that, described shift register is the shift register of 8 bit parallel outputs, and output port position is Q0 ~ Q7.
3. port expansion circuit according to claim 2, is characterized in that, a Q7 output port of described shift register Ui connects the data-signal input port of shift register U (i+1).
CN201320880113.6U 2013-12-30 2013-12-30 Port expansion circuit Expired - Lifetime CN203616608U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201320880113.6U CN203616608U (en) 2013-12-30 2013-12-30 Port expansion circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201320880113.6U CN203616608U (en) 2013-12-30 2013-12-30 Port expansion circuit

Publications (1)

Publication Number Publication Date
CN203616608U true CN203616608U (en) 2014-05-28

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201320880113.6U Expired - Lifetime CN203616608U (en) 2013-12-30 2013-12-30 Port expansion circuit

Country Status (1)

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CN (1) CN203616608U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111124974A (en) * 2019-12-25 2020-05-08 西安易朴通讯技术有限公司 Interface expansion device and method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111124974A (en) * 2019-12-25 2020-05-08 西安易朴通讯技术有限公司 Interface expansion device and method
CN111124974B (en) * 2019-12-25 2024-01-26 西安易朴通讯技术有限公司 Interface expanding device and method

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Granted publication date: 20140528