CN203104528U - Kilomega Ethernet interface circuit - Google Patents

Kilomega Ethernet interface circuit Download PDF

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Publication number
CN203104528U
CN203104528U CN 201320068943 CN201320068943U CN203104528U CN 203104528 U CN203104528 U CN 203104528U CN 201320068943 CN201320068943 CN 201320068943 CN 201320068943 U CN201320068943 U CN 201320068943U CN 203104528 U CN203104528 U CN 203104528U
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CN
China
Prior art keywords
chip
data
mac
interface circuit
phy
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Expired - Lifetime
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CN 201320068943
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Chinese (zh)
Inventor
姜勇
王庆军
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tianjin Photoelectric Gathered Energy Communication Co ltd
Original Assignee
TIANJIN TOEC JN SPECIAL COMMUNICATION EQUIPMENT CO Ltd
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Priority to CN 201320068943 priority Critical patent/CN203104528U/en
Application granted granted Critical
Publication of CN203104528U publication Critical patent/CN203104528U/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

The utility model discloses a kilomega Ethernet interface circuit. The kilomega Ethernet interface circuit comprises a singlechip, wherein the singlechip is connected with an MAC (measurement and control) chip, and the MAC chip is connected with a PHY(physical layer) chip; the singlechip receives first data transferred by external equipment, the first data is transferred to the PHY chip through the MAC chip, and the PHY chip sends out the first data through a kilomega net opening; and the PHY chip receives second data through the kilomega net opening, the second data is transferred to the singlechip by the MAC chip, and the singlechip can transfer the second data to the external equipment through an interface of the external equipment. The kilomega Ethernet interface circuit provided by the utility model realizes the interception and treatment of the data of the kilomega Ethernet as well as sending and receiving of data packet, with the transmission speed achieving 300 Mb/s, and provides an external data processing interface; and in addition, the circuit has the advantages that the integration level is high, and the modification and upgrade are convenient.

Description

A kind of gigabit ethernet interface circuit
Technical field
The utility model relates to the communications field, particularly a kind of gigabit ethernet interface circuit.
Background technology
Along with the continuous development of technology such as multimedia, image transmission and video monitoring, data traffic is increasing, and the user is also more and more higher to the bandwidth requirement of local area network (LAN).Simultaneously, the 100Mb/s Fast Ethernet has also proposed higher bandwidth requirement to the equipment of server one-level, so gigabit Ethernet occurred.Gigabit Ethernet is a kind of novel Fast Ethernet, and it has taken into full account the application scenario that needs high speed operation, and has done many improvement on the basis of original Ethernet, to satisfy these special application demands.It can provide the communication bandwidth of 1Gb/s; and communication protocol is identical with original Ethernet with most of technology such as data frame formats; so Fast Ethernet can be realized stablizing, the upgrading of continuity zone network, thereby can farthest protect the input before the user.
In realizing process of the present utility model, find to exist at least in the prior art following shortcoming and defect:
Gigabit Ethernet of the prior art can not satisfy in the practical application requirement to high speed transmission data and transmission range.
The utility model content
The utility model provides a kind of gigabit ethernet interface circuit, and this circuit has improved transmission rate and transmission range, sees for details hereinafter to describe:
A kind of gigabit ethernet interface circuit comprises: single-chip microcomputer, and described single-chip microcomputer connects the MAC chip, and described MAC chip connects the PHY chip;
Described single-chip microcomputer receives first data of external equipment transmission, and transfers to described PHY chip by described MAC chip, and described PHY chip sends first data by the gigabit network interface;
Described PHY chip receives second data by described gigabit network interface, and transfers to described single-chip microcomputer by described MAC chip, and described single-chip microcomputer transmits second data by the interface of described external equipment to described external equipment.
Adopt local bus bus communication between described MAC chip and the described single-chip microcomputer.
Described MAC chip is specially: the chip of AX88180 model.Described PHY chip is specially: the chip of 88E1111 model.Described single-chip microcomputer is specially: the processor of AT91SAM9G45 model.
The beneficial effect of the technical scheme that the utility model provides is: by the transfer of data between single-chip microcomputer, MAC chip and the PHY chip, intercepting, the processing of gigabit Ethernet data have been realized, realize the transmission and the reception of packet, transmission speed can reach 300Mb/s, and the outbound data Processing Interface is provided; This circuit also has integrated level height, the convenient advantage of revising and upgrading in addition.
Description of drawings
Fig. 1 is a kind of schematic diagram of gigabit ethernet interface circuit;
Fig. 2 is the operation principle schematic diagram of single-chip microcomputer inside;
Fig. 3 is the interface schematic diagram between MAC chip and the single-chip microcomputer;
Fig. 4 is the interface schematic diagram between MAC chip and the PHY chip.
Shown in components listed is listed as follows in the accompanying drawing:
1: single-chip microcomputer; The 2:MAC chip;
The 3:PHY chip; 4: external equipment;
5: the gigabit network interface.
Embodiment
For making the purpose of this utility model, technical scheme and advantage clearer, the utility model execution mode is described in further detail below in conjunction with accompanying drawing.
In order to improve transmission rate and transmission range, the utility model embodiment provides a kind of gigabit ethernet interface circuit, referring to Fig. 1, comprising: single-chip microcomputer 1, and single-chip microcomputer 1 connects MAC chip 2, and MAC chip 2 connects PHY chip 3;
Single-chip microcomputer 1 receives first data of external equipment 4 transmission, and transfers to PHY chip 3 by MAC chip 2, and PHY chip 3 sends first data by gigabit network interface 5;
PHY chip 3 receives second data by gigabit network interface 5, and transfers to single-chip microcomputer 1 by MAC chip 2, and single-chip microcomputer 1 transmits second data by the interface of external equipment 4 to external equipment 4.
The utility model embodiment does not limit the model of above-mentioned components and parts, all can as long as can finish the components and parts of above-mentioned functions.
During specific implementation, the preferred local bus bus communication that adopts between MAC chip 2 and the single-chip microcomputer 1, it is simple to have sequential, easily the advantage that realizes.
Wherein, external equipment 4 is generally PC or other processors etc., and during specific implementation, this practical embodiment does not limit this.
During practical application, the chip of MAC chip 2 preferred AX88180 models; The chip of PHY chip 3 preferred 88E1111 models; The processor of single-chip microcomputer 1 preferred AT91SAM9G45 model.Wherein, AX88180 is a high performance Non-PCI gigabit MAC chip, supports the 10/100/10O0Mb/s message transmission rate, with single-chip microcomputer 1 direct communication, realize that simply chip internal provides 256 byte registers for software programming, is responsible for the transmission and the reception of packet.88E1111 passes through the RGMII interface and communicates by letter with AX88180, and data are transmitted in network and adopted udp protocol, protocol header information to determine in advance, and direct generation is attached to the transmission of data front and gets final product.AT91SAM9G45 has the advantage of flexible design, operation high speed, and this has great significance for the gigabit Ethernet system.
Referring to Fig. 2,1 pair of MAC chip 2 of single-chip microcomputer, PHY chip 3 carry out initial configuration, to satisfy the requirement of particular system, network transmission process is carried out according to the gigabit Ethernet agreement by MAC chip 2 and PHY chip 3, and network data is handled arbitrarily by AT91SAM9G45.During practical application, utilize single-chip microcomputer 1 its other resources and control advantage, can support and the docking of various chips, come network data is transmitted the difficulty that can alleviate subsequent treatment to greatest extent by single-chip microcomputer 1.
Referring to Fig. 3 and Fig. 4, carry out being connected of corresponding interface by local bus bus between single-chip microcomputer 1 and the MAC chip 2; Corresponding interface is connected between MAC chip 2 and the PHY chip 3, and whole modular structure is clear, and applicability is good.
It will be appreciated by those skilled in the art that accompanying drawing is the schematic diagram of a preferred embodiment, above-mentioned the utility model embodiment sequence number is not represented the quality of embodiment just to description.
The above only is preferred embodiment of the present utility model, and is in order to restriction the utility model, not all within spirit of the present utility model and principle, any modification of being done, is equal to replacement, improvement etc., all should be included within the protection range of the present utility model.

Claims (5)

1. gigabit ethernet interface circuit comprises: single-chip microcomputer (1), it is characterized in that described single-chip microcomputer (1) connects MAC chip (2), and described MAC chip (2) connects PHY chip (3);
Described single-chip microcomputer (1) receives first data of external equipment (4) transmission, and transfers to described PHY chip (3) by described MAC chip (2), and described PHY chip (3) sends first data by gigabit network interface (5);
Described PHY chip (3) receives second data by described gigabit network interface (5), and transferring to described single-chip microcomputer (1) by described MAC chip (2), the interface of described single-chip microcomputer (1) by described external equipment (4) is to described external equipment (4) transmission second data.
2. a kind of gigabit ethernet interface circuit according to claim 1 is characterized in that, adopts local bus bus communication between described MAC chip (2) and the described single-chip microcomputer (1).
3. a kind of gigabit ethernet interface circuit according to claim 1 is characterized in that described MAC chip (2) is specially: the chip of AX88180 model.
4. a kind of gigabit ethernet interface circuit according to claim 1 is characterized in that described PHY chip (3) is specially: the chip of 88E1111 model.
5. a kind of gigabit ethernet interface circuit according to claim 1 is characterized in that described single-chip microcomputer (1) is specially: the processor of AT91SAM9G45 model.
CN 201320068943 2013-02-06 2013-02-06 Kilomega Ethernet interface circuit Expired - Lifetime CN203104528U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 201320068943 CN203104528U (en) 2013-02-06 2013-02-06 Kilomega Ethernet interface circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 201320068943 CN203104528U (en) 2013-02-06 2013-02-06 Kilomega Ethernet interface circuit

Publications (1)

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CN203104528U true CN203104528U (en) 2013-07-31

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CN 201320068943 Expired - Lifetime CN203104528U (en) 2013-02-06 2013-02-06 Kilomega Ethernet interface circuit

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105262598A (en) * 2015-09-23 2016-01-20 苏州昭创光电技术有限公司 Ethernet rate conversion method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105262598A (en) * 2015-09-23 2016-01-20 苏州昭创光电技术有限公司 Ethernet rate conversion method

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C14 Grant of patent or utility model
GR01 Patent grant
CP03 Change of name, title or address

Address after: Room 4, Floor 1, No. 139 Shenzhou Avenue, Binhai High-tech Zone, Binhai New Area, Tianjin, 300392

Patentee after: Tianjin Photoelectric Gathered Energy Communication Co.,Ltd.

Address before: No. 335, Jinjiang Road, Tanggu, Binhai New Area, Tianjin, 300453

Patentee before: JUNENG SPECIAL COMMUNICATION EQUIPMENT CO.,LTD., TOEC GROUP CO.,LTD.

CP03 Change of name, title or address
CX01 Expiry of patent term

Granted publication date: 20130731

CX01 Expiry of patent term