CN113285839A - Design method of programmable data plane software switch based on DPDK - Google Patents
Design method of programmable data plane software switch based on DPDK Download PDFInfo
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- CN113285839A CN113285839A CN202110603730.0A CN202110603730A CN113285839A CN 113285839 A CN113285839 A CN 113285839A CN 202110603730 A CN202110603730 A CN 202110603730A CN 113285839 A CN113285839 A CN 113285839A
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- software switch
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
- H04L41/08—Configuration management of networks or network elements
- H04L41/0803—Configuration setting
- H04L41/0813—Configuration setting characterised by the conditions triggering a change of settings
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
- H04L41/08—Configuration management of networks or network elements
- H04L41/0803—Configuration setting
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/10—Packet switching elements characterised by the switching fabric construction
Abstract
The invention provides a design method of a DPDK-based programmable data plane software switch, which comprises the following steps: step one, configuring a DPDK environment of an x86 chip; step two, writing a P4 file to describe a data plane; and step three, generating a configuration file for accessing the DPDK interface and a device descriptor transmitted to the control plane by compiling the P4 file. The method provided by the invention can realize programmable data plane forwarding by using a cheap general processor chip with an x86 architecture without using a special switch chip.
Description
Technical Field
The invention relates to the field of switches, in particular to a design method of a DPDK-based programmable data plane software switch.
Background
Software Defined Networking (SDN) is a new Network architecture proposed by the research group of clean-slate project of stanford university, usa, and its core idea is to control Network traffic by separating the forwarding plane of Network devices from the data plane, so it is popular among operators and data centers because the control plane and data plane can be respectively designed by Network administrators in a programmable manner.
Programmable implementation of the control plane has several open source frameworks, and the programmable design for the data plane is currently mainly described by the P4 paper "P4: programming protocol independent Packet Processors ". The research of the expert in the industry on P4 is mainly directed to features such as flow control, state forwarding, protocol independence and the like. The P4 language alliance (https:// P4.org /) proposes a framework that a P4 source file is compiled, a JSON format file is generated and configured in a bmv2 software switch, and a mininet tool is used for simulating network topology to carry out experiments. Deploying a P4 target switch in a real network scenario requires the use of a proprietary P4 switch chip plugged into a host of a PCIE interface, which is very limited.
In summary, the existing programmable data plane is realized in a physical environment by relying on a proprietary switch chip, the proprietary chips released by various manufacturers are mutually independent and incompatible with each other, and the switch is large in size, high in power consumption and high in manufacturing cost due to the addition of a matched device and an additional power module. The popularization and application of the programmable data plane language P4 pose a great obstacle.
Disclosure of Invention
In order to solve the above problems, it is necessary to provide a design method of a DPDK-based programmable data plane software switch.
The first aspect of the present invention provides a method for designing a DPDK-based programmable data plane software switch, including:
step one, configuring a DPDK environment of an x86 chip;
step two, writing a P4 file to describe a data plane;
and step three, generating a configuration file for accessing the DPDK interface and a device descriptor transmitted to the control plane by compiling the P4 file.
Based on the above, the method for configuring the DPDK environment of the x86 chip includes:
recompiling the kernel module, and compiling the UIO into the kernel module;
setting a 1G or 2G large-page memory;
the cpu of the x86 chip is bound to a network adapter.
Based on the above, writing a P4 file to describe a data plane specifically includes: and writing a P4 source file for describing the data plane according to the message type and the business logic of the data exchange platform.
Based on the above, generating the configuration file for accessing the DPDK interface and the device descriptor transmitted to the control plane by compiling the P4 file specifically includes: receiving a data message from a network adapter bound by a cpu, and transmitting a network address to a parser defined by a P4 file by using a zero copy technology; the parser strips the message header according to the definition of P4, and delivers the message address to the DPDK interface for processing according to the content of the flow table; and finally, performing header encapsulation on the data message payload, adding the data message payload into a DPDK transmission queue, and transmitting the data message payload through a network adapter.
The second aspect of the present invention provides a design system for a DPDK-based programmable data plane software switch, which includes an x86 chip and a network adapter, where the x86 chip is communicatively connected to the network adapter, and is used to execute the design method for the DPDK-based programmable data plane software switch.
Compared with the prior art, the invention has prominent substantive characteristics and remarkable progress, particularly: the method provided by the invention can realize programmable data plane forwarding by using a cheap general processor chip with an x86 architecture without using a special switch chip.
Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.
Drawings
The above and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
fig. 1 shows a schematic block diagram of the system of the present invention.
Fig. 2 shows a data packet transmission path diagram of the method of the present invention.
Detailed Description
In order that the above objects, features and advantages of the present invention can be more clearly understood, a more particular description of the invention will be rendered by reference to the appended drawings. It should be noted that the embodiments and features of the embodiments of the present application may be combined with each other without conflict.
The invention provides a design system of a DPDK-based programmable data plane software switch, which comprises an x86 chip and a network adapter, wherein the x86 chip is in communication connection with the network adapter and is used for executing the following design method of the DPDK-based programmable data plane software switch:
as shown in fig. 1, includes:
step one, configuring a DPDK environment of an x86 chip:
recompiling the kernel module, compiling the UIO into the kernel module, thereby reducing the context switching operation of the receiving and sending messages from the user mode and the kernel mode;
meanwhile, considering that a page table of the virtual memory is stored in the memory, increasing a large page can obviously reduce the number of page table entries and the clock period of a query page table, so that a 1G or 2G large-page memory is also arranged;
in addition, the cpu of the x86 chip is bound with the network adapter, so that the clock period of context switching by the cpu can be reduced.
Step two, writing a P4 file to describe a data plane:
and writing a P4 source file for describing a data plane according to the message type and the service logic of the data exchange platform, wherein the P4 file completely defines the structures of the received self-defined message type, the message header format, the flow table form, the processing mode and the like.
Step three, generating a configuration file for accessing a DPDK interface and a device descriptor transmitted to a control plane by compiling the P4 file:
receiving a data message from a network adapter bound by a cpu, and transmitting a network address to a parser defined by a P4 file by using a zero copy technology; the parser strips the message header according to the definition of P4, and delivers the message address to the DPDK interface for processing according to the content of the flow table; and finally, performing header encapsulation on the data message payload, adding the data message payload into a DPDK transmission queue, and transmitting the data message payload through a network adapter.
The invention adopts a general X86 framework to realize the processing of the data plane, and has cost advantage and production advantage compared with a special forwarding chip; by adopting the DPDK technology to process the receiving and sending packets, compared with an bmv2 software switch, the CPU is used for binding a network adapter, so that the CPU cost of context switching is reduced; DMA is used to reduce the processing clock period of the cpu and distribute the receiving and sending cost of the message to the network adapter; by using a zero copy technology and a UIO kernel module, the copy time of the message from the kernel state to the user state and then to the kernel state is reduced; using large pages reduces page table walk time and the probability of TLB misses. In summary, the method provided by the invention realizes programmable data plane forwarding by using a cheap general-purpose processor chip of x86 architecture.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.
Claims (5)
1. A design method of a DPDK-based programmable data plane software switch is characterized by comprising the following steps:
step one, configuring a DPDK environment of an x86 chip;
step two, writing a P4 file to describe a data plane;
and step three, generating a configuration file for accessing the DPDK interface and a device descriptor transmitted to the control plane by compiling the P4 file.
2. The design method of a DPDK-based programmable data plane software switch as claimed in claim 1, wherein the method of configuring DPDK environment of x86 chip:
recompiling the kernel module, and compiling the UIO into the kernel module;
setting a 1G or 2G large-page memory;
the cpu of the x86 chip is bound to a network adapter.
3. The design method of a DPDK-based programmable data plane software switch as claimed in claim 2, wherein writing a P4 file to describe the data plane specifically includes:
and writing a P4 source file for describing the data plane according to the message type and the business logic of the data exchange platform.
4. The design method of a DPDK-based programmable data plane software switch as claimed in claim 3, wherein the generating of the configuration file for accessing to the DPDK interface and the device descriptor transferred to the control plane by compiling the P4 file specifically includes:
receiving a data message from a network adapter bound by a cpu, and transmitting a network address to a parser defined by a P4 file by using a zero copy technology; the parser strips the message header according to the definition of P4, and delivers the message address to the DPDK interface for processing according to the content of the flow table; and finally, performing header encapsulation on the data message payload, adding the data message payload into a DPDK transmission queue, and transmitting the data message payload through a network adapter.
5. A design system of a DPDK-based programmable data plane software switch is characterized in that: the DPDK-based programmable data plane software switch comprises an x86 chip and a network adapter, wherein the x86 chip is in communication connection with the network adapter and is used for executing the design method of the DPDK-based programmable data plane software switch claimed in any one of claims 1 to 4.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN114448691A (en) * | 2022-01-21 | 2022-05-06 | 珠海高凌信息科技股份有限公司 | Data forwarding method, data plane and switch |
| CN115086392A (en) * | 2022-06-01 | 2022-09-20 | 珠海高凌信息科技股份有限公司 | Data plane and switch based on heterogeneous chip |
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| CN112615781A (en) * | 2020-12-09 | 2021-04-06 | 网宿科技股份有限公司 | Method and server for realizing BGP message interaction in DPDK |
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- 2021-05-31 CN CN202110603730.0A patent/CN113285839A/en active Pending
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| US20200097269A1 (en) * | 2018-09-26 | 2020-03-26 | Intel Corporation | Data plane semantics for software virtual switches |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114448691A (en) * | 2022-01-21 | 2022-05-06 | 珠海高凌信息科技股份有限公司 | Data forwarding method, data plane and switch |
| CN114448691B (en) * | 2022-01-21 | 2023-09-29 | 珠海高凌信息科技股份有限公司 | Data forwarding method, data plane and switch |
| CN115086392A (en) * | 2022-06-01 | 2022-09-20 | 珠海高凌信息科技股份有限公司 | Data plane and switch based on heterogeneous chip |
| CN115086392B (en) * | 2022-06-01 | 2023-07-07 | 珠海高凌信息科技股份有限公司 | Data plane and switch based on heterogeneous chip |
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Application publication date: 20210820 |